//***********************************************************
//      Header file for the KungFu32
//      //      Microcontroller
//
//      Copyright 2012-2024 ChipON, All rights reserved
//***********************************************************

//  register-------------------------------------
	.EQU	GPIOA_PIR,		0x50000000
//  0x5000 0000  GPIOA_PIR   Bits-------------------------------------
	.EQU	GPIOA_PIR_PXPIR15,		15
	.EQU	GPIOA_PIR_PXPIR14,		14
	.EQU	GPIOA_PIR_PXPIR13,		13
	.EQU	GPIOA_PIR_PXPIR12,		12
	.EQU	GPIOA_PIR_PXPIR11,		11
	.EQU	GPIOA_PIR_PXPIR10,		10
	.EQU	GPIOA_PIR_PXPIR9,		9
	.EQU	GPIOA_PIR_PXPIR8,		8
	.EQU	GPIOA_PIR_PXPIR7,		7
	.EQU	GPIOA_PIR_PXPIR6,		6
	.EQU	GPIOA_PIR_PXPIR5,		5
	.EQU	GPIOA_PIR_PXPIR4,		4
	.EQU	GPIOA_PIR_PXPIR3,		3
	.EQU	GPIOA_PIR_PXPIR2,		2
	.EQU	GPIOA_PIR_PXPIR1,		1
	.EQU	GPIOA_PIR_PXPIR0,		0
//  register-------------------------------------
	.EQU	GPIOA_POR,		0x50000004
//  0x5000 0004  GPIOA_POR   Bits-------------------------------------
	.EQU	GPIOA_POR_PXPOR15,		15
	.EQU	GPIOA_POR_PXPOR14,		14
	.EQU	GPIOA_POR_PXPOR13,		13
	.EQU	GPIOA_POR_PXPOR12,		12
	.EQU	GPIOA_POR_PXPOR11,		11
	.EQU	GPIOA_POR_PXPOR10,		10
	.EQU	GPIOA_POR_PXPOR9,		9
	.EQU	GPIOA_POR_PXPOR8,		8
	.EQU	GPIOA_POR_PXPOR7,		7
	.EQU	GPIOA_POR_PXPOR6,		6
	.EQU	GPIOA_POR_PXPOR5,		5
	.EQU	GPIOA_POR_PXPOR4,		4
	.EQU	GPIOA_POR_PXPOR3,		3
	.EQU	GPIOA_POR_PXPOR2,		2
	.EQU	GPIOA_POR_PXPOR1,		1
	.EQU	GPIOA_POR_PXPOR0,		0
//  register-------------------------------------
	.EQU	GPIOA_PUR,		0x50000008
//  0x5000 0008  GPIOA_PUR   Bits-------------------------------------
	.EQU	GPIOA_PUR_PXPUR15,		15
	.EQU	GPIOA_PUR_PXPUR14,		14
	.EQU	GPIOA_PUR_PXPUR13,		13
	.EQU	GPIOA_PUR_PXPUR12,		12
	.EQU	GPIOA_PUR_PXPUR11,		11
	.EQU	GPIOA_PUR_PXPUR10,		10
	.EQU	GPIOA_PUR_PXPUR9,		9
	.EQU	GPIOA_PUR_PXPUR8,		8
	.EQU	GPIOA_PUR_PXPUR7,		7
	.EQU	GPIOA_PUR_PXPUR6,		6
	.EQU	GPIOA_PUR_PXPUR5,		5
	.EQU	GPIOA_PUR_PXPUR4,		4
	.EQU	GPIOA_PUR_PXPUR3,		3
	.EQU	GPIOA_PUR_PXPUR2,		2
	.EQU	GPIOA_PUR_PXPUR1,		1
	.EQU	GPIOA_PUR_PXPUR0,		0
//  register-------------------------------------
	.EQU	GPIOA_PDR,		0x5000000C
//  0x5000 000C  GPIOA_PDR   Bits-------------------------------------
	.EQU	GPIOA_PDR_PXPDR15,		15
	.EQU	GPIOA_PDR_PXPDR14,		14
	.EQU	GPIOA_PDR_PXPDR13,		13
	.EQU	GPIOA_PDR_PXPDR12,		12
	.EQU	GPIOA_PDR_PXPDR11,		11
	.EQU	GPIOA_PDR_PXPDR10,		10
	.EQU	GPIOA_PDR_PXPDR9,		9
	.EQU	GPIOA_PDR_PXPDR8,		8
	.EQU	GPIOA_PDR_PXPDR7,		7
	.EQU	GPIOA_PDR_PXPDR6,		6
	.EQU	GPIOA_PDR_PXPDR5,		5
	.EQU	GPIOA_PDR_PXPDR4,		4
	.EQU	GPIOA_PDR_PXPDR3,		3
	.EQU	GPIOA_PDR_PXPDR2,		2
	.EQU	GPIOA_PDR_PXPDR1,		1
	.EQU	GPIOA_PDR_PXPDR0,		0
//  register-------------------------------------
	.EQU	GPIOA_PODR,	0x50000010
//  0x5000 0010  GPIOA_PODR   Bits-------------------------------------
	.EQU	GPIOA_PODR_PXPODR15,		15
	.EQU	GPIOA_PODR_PXPODR14,		14
	.EQU	GPIOA_PODR_PXPODR13,		13
	.EQU	GPIOA_PODR_PXPODR12,		12
	.EQU	GPIOA_PODR_PXPODR11,		11
	.EQU	GPIOA_PODR_PXPODR10,		10
	.EQU	GPIOA_PODR_PXPODR9,		9
	.EQU	GPIOA_PODR_PXPODR8,		8
	.EQU	GPIOA_PODR_PXPODR7,		7
	.EQU	GPIOA_PODR_PXPODR6,		6
	.EQU	GPIOA_PODR_PXPODR5,		5
	.EQU	GPIOA_PODR_PXPODR4,		4
	.EQU	GPIOA_PODR_PXPODR3,		3
	.EQU	GPIOA_PODR_PXPODR2,		2
	.EQU	GPIOA_PODR_PXPODR1,		1
	.EQU	GPIOA_PODR_PXPODR0,		0
//  register-------------------------------------
	.EQU	GPIOA_PMOD,	0x50000014
//  0x5000 0014  GPIOA_PMOD   Bits-------------------------------------
	.EQU	GPIOA_PMOD_PXPMD15_1,		31
	.EQU	GPIOA_PMOD_PXPMD15_0,		30
	.EQU	GPIOA_PMOD_PXPMD14_1,		29
	.EQU	GPIOA_PMOD_PXPMD14_0,		28
	.EQU	GPIOA_PMOD_PXPMD13_1,		27
	.EQU	GPIOA_PMOD_PXPMD13_0,		26
	.EQU	GPIOA_PMOD_PXPMD12_1,		25
	.EQU	GPIOA_PMOD_PXPMD12_0,		24
	.EQU	GPIOA_PMOD_PXPMD11_1,		23
	.EQU	GPIOA_PMOD_PXPMD11_0,		22
	.EQU	GPIOA_PMOD_PXPMD10_1,		21
	.EQU	GPIOA_PMOD_PXPMD10_0,		20
	.EQU	GPIOA_PMOD_PXPMD9_1,		19
	.EQU	GPIOA_PMOD_PXPMD9_0,		18
	.EQU	GPIOA_PMOD_PXPMD8_1,		17
	.EQU	GPIOA_PMOD_PXPMD8_0,		16
	.EQU	GPIOA_PMOD_PXPMD7_1,		15
	.EQU	GPIOA_PMOD_PXPMD7_0,		14
	.EQU	GPIOA_PMOD_PXPMD6_1,		13
	.EQU	GPIOA_PMOD_PXPMD6_0,		12
	.EQU	GPIOA_PMOD_PXPMD5_1,		11
	.EQU	GPIOA_PMOD_PXPMD5_0,		10
	.EQU	GPIOA_PMOD_PXPMD4_1,		9
	.EQU	GPIOA_PMOD_PXPMD4_0,		8
	.EQU	GPIOA_PMOD_PXPMD3_1,		7
	.EQU	GPIOA_PMOD_PXPMD3_0,		6
	.EQU	GPIOA_PMOD_PXPMD2_1,		5
	.EQU	GPIOA_PMOD_PXPMD2_0,		4
	.EQU	GPIOA_PMOD_PXPMD1_1,		3
	.EQU	GPIOA_PMOD_PXPMD1_0,		2
	.EQU	GPIOA_PMOD_PXPMD0_1,		1
	.EQU	GPIOA_PMOD_PXPMD0_0,		0
//  register-------------------------------------
	.EQU	GPIOA_OMOD,	0x50000018
//  0x5000 0018  GPIOA_OMOD   Bits-------------------------------------
	.EQU	GPIOA_OMOD_PXOMD15,		30
	.EQU	GPIOA_OMOD_PXOMD14,		28
	.EQU	GPIOA_OMOD_PXOMD13,		26
	.EQU	GPIOA_OMOD_PXOMD12,		24
	.EQU	GPIOA_OMOD_PXOMD11,		22
	.EQU	GPIOA_OMOD_PXOMD10,		20
	.EQU	GPIOA_OMOD_PXOMD9,		18
	.EQU	GPIOA_OMOD_PXOMD8,		16
	.EQU	GPIOA_OMOD_PXOMD7,		14
	.EQU	GPIOA_OMOD_PXOMD6,		12
	.EQU	GPIOA_OMOD_PXOMD5,		10
	.EQU	GPIOA_OMOD_PXOMD4,		8
	.EQU	GPIOA_OMOD_PXOMD3,		6
	.EQU	GPIOA_OMOD_PXOMD2,		4
	.EQU	GPIOA_OMOD_PXOMD1,		2
	.EQU	GPIOA_OMOD_PXOMD0,		0
//  register-------------------------------------
	.EQU	GPIOA_LOCK,	0x5000001C
//  0x5000 001C  GPIOA_LOCK   Bits-------------------------------------
	.EQU	GPIOA_LOCK_PXLCKKEY15,		31
	.EQU	GPIOA_LOCK_PXLCKKEY14,		30
	.EQU	GPIOA_LOCK_PXLCKKEY13,		29
	.EQU	GPIOA_LOCK_PXLCKKEY12,		28
	.EQU	GPIOA_LOCK_PXLCKKEY11,		27
	.EQU	GPIOA_LOCK_PXLCKKEY10,		26
	.EQU	GPIOA_LOCK_PXLCKKEY9,		25
	.EQU	GPIOA_LOCK_PXLCKKEY8,		24
	.EQU	GPIOA_LOCK_PXLCKKEY7,		23
	.EQU	GPIOA_LOCK_PXLCKKEY6,		22
	.EQU	GPIOA_LOCK_PXLCKKEY5,		21
	.EQU	GPIOA_LOCK_PXLCKKEY4,		20
	.EQU	GPIOA_LOCK_PXLCKKEY3,		19
	.EQU	GPIOA_LOCK_PXLCKKEY2,		18
	.EQU	GPIOA_LOCK_PXLCKKEY1,		17
	.EQU	GPIOA_LOCK_PXLCKKEY0,		16
	.EQU	GPIOA_LOCK_PXLCK15,		15
	.EQU	GPIOA_LOCK_PXLCK14,		14
	.EQU	GPIOA_LOCK_PXLCK13,		13
	.EQU	GPIOA_LOCK_PXLCK12,		12
	.EQU	GPIOA_LOCK_PXLCK11,		11
	.EQU	GPIOA_LOCK_PXLCK10,		10
	.EQU	GPIOA_LOCK_PXLCK9,		9
	.EQU	GPIOA_LOCK_PXLCK8,		8
	.EQU	GPIOA_LOCK_PXLCK7,		7
	.EQU	GPIOA_LOCK_PXLCK6,		6
	.EQU	GPIOA_LOCK_PXLCK5,		5
	.EQU	GPIOA_LOCK_PXLCK4,		4
	.EQU	GPIOA_LOCK_PXLCK3,		3
	.EQU	GPIOA_LOCK_PXLCK2,		2
	.EQU	GPIOA_LOCK_PXLCK1,		1
	.EQU	GPIOA_LOCK_PXLCK0,		0
//  register-------------------------------------
	.EQU	GPIOA_RMPL,	0x50000020
//  0x5000 0020  GPIOA_RMPL   Bits-------------------------------------
	.EQU	GPIOA_RMPL_PXRMP7_3,		31
	.EQU	GPIOA_RMPL_PXRMP7_2,		30
	.EQU	GPIOA_RMPL_PXRMP7_1,		29
	.EQU	GPIOA_RMPL_PXRMP7_0,		28
	.EQU	GPIOA_RMPL_PXRMP6_3,		27
	.EQU	GPIOA_RMPL_PXRMP6_2,		26
	.EQU	GPIOA_RMPL_PXRMP6_1,		25
	.EQU	GPIOA_RMPL_PXRMP6_0,		24
	.EQU	GPIOA_RMPL_PXRMP5_3,		23
	.EQU	GPIOA_RMPL_PXRMP5_2,		22
	.EQU	GPIOA_RMPL_PXRMP5_1,		21
	.EQU	GPIOA_RMPL_PXRMP5_0,		20
	.EQU	GPIOA_RMPL_PXRMP4_3,		19
	.EQU	GPIOA_RMPL_PXRMP4_2,		18
	.EQU	GPIOA_RMPL_PXRMP4_1,		17
	.EQU	GPIOA_RMPL_PXRMP4_0,		16
	.EQU	GPIOA_RMPL_PXRMP3_3,		15
	.EQU	GPIOA_RMPL_PXRMP3_2,		14
	.EQU	GPIOA_RMPL_PXRMP3_1,		13
	.EQU	GPIOA_RMPL_PXRMP3_0,		12
	.EQU	GPIOA_RMPL_PXRMP2_3,		11
	.EQU	GPIOA_RMPL_PXRMP2_2,		10
	.EQU	GPIOA_RMPL_PXRMP2_1,		9
	.EQU	GPIOA_RMPL_PXRMP2_0,		8
	.EQU	GPIOA_RMPL_PXRMP1_3,		7
	.EQU	GPIOA_RMPL_PXRMP1_2,		6
	.EQU	GPIOA_RMPL_PXRMP1_1,		5
	.EQU	GPIOA_RMPL_PXRMP1_0,		4
	.EQU	GPIOA_RMPL_PXRMP0_3,		3
	.EQU	GPIOA_RMPL_PXRMP0_2,		2
	.EQU	GPIOA_RMPL_PXRMP0_1,		1
	.EQU	GPIOA_RMPL_PXRMP0_0,		0
//  register-------------------------------------
	.EQU	GPIOA_RMPH,	0x50000024
//  0x5000 0024  GPIOA_RMPH   Bits-------------------------------------
	.EQU	GPIOA_RMPH_PXRMP15_3,		31
	.EQU	GPIOA_RMPH_PXRMP15_2,		30
	.EQU	GPIOA_RMPH_PXRMP15_1,		29
	.EQU	GPIOA_RMPH_PXRMP15_0,		28
	.EQU	GPIOA_RMPH_PXRMP14_3,		27
	.EQU	GPIOA_RMPH_PXRMP14_2,		26
	.EQU	GPIOA_RMPH_PXRMP14_1,		25
	.EQU	GPIOA_RMPH_PXRMP14_0,		24
	.EQU	GPIOA_RMPH_PXRMP13_3,		23
	.EQU	GPIOA_RMPH_PXRMP13_2,		22
	.EQU	GPIOA_RMPH_PXRMP13_1,		21
	.EQU	GPIOA_RMPH_PXRMP13_0,		20
	.EQU	GPIOA_RMPH_PXRMP12_3,		19
	.EQU	GPIOA_RMPH_PXRMP12_2,		18
	.EQU	GPIOA_RMPH_PXRMP12_1,		17
	.EQU	GPIOA_RMPH_PXRMP12_0,		16
	.EQU	GPIOA_RMPH_PXRMP11_3,		15
	.EQU	GPIOA_RMPH_PXRMP11_2,		14
	.EQU	GPIOA_RMPH_PXRMP11_1,		13
	.EQU	GPIOA_RMPH_PXRMP11_0,		12
	.EQU	GPIOA_RMPH_PXRMP10_3,		11
	.EQU	GPIOA_RMPH_PXRMP10_2,		10
	.EQU	GPIOA_RMPH_PXRMP10_1,		9
	.EQU	GPIOA_RMPH_PXRMP10_0,		8
	.EQU	GPIOA_RMPH_PXRMP9_3,		7
	.EQU	GPIOA_RMPH_PXRMP9_2,		6
	.EQU	GPIOA_RMPH_PXRMP9_1,		5
	.EQU	GPIOA_RMPH_PXRMP9_0,		4
	.EQU	GPIOA_RMPH_PXRMP8_3,		3
	.EQU	GPIOA_RMPH_PXRMP8_2,		2
	.EQU	GPIOA_RMPH_PXRMP8_1,		1
	.EQU	GPIOA_RMPH_PXRMP8_0,		0
//  register-------------------------------------
	.EQU	GPIOA_SDE,		0x50000038
//  0x5000 0038  GPIOA_SDE   Bits-------------------------------------
	.EQU	GPIOA_SDE_SDEF15,		31
	.EQU	GPIOA_SDE_SDEF14,		30
	.EQU	GPIOA_SDE_SDEF13,		29
	.EQU	GPIOA_SDE_SDEF12,		28
	.EQU	GPIOA_SDE_SDEF11,		27
	.EQU	GPIOA_SDE_SDEF10,		26
	.EQU	GPIOA_SDE_SDEF9,		25
	.EQU	GPIOA_SDE_SDEF8,		24
	.EQU	GPIOA_SDE_SDEF7,		23
	.EQU	GPIOA_SDE_SDEF6,		22
	.EQU	GPIOA_SDE_SDEF5,		21
	.EQU	GPIOA_SDE_SDEF4,		20
	.EQU	GPIOA_SDE_SDEF3,		19
	.EQU	GPIOA_SDE_SDEF2,		18
	.EQU	GPIOA_SDE_SDEF1,		17
	.EQU	GPIOA_SDE_SDEF0,		16
	.EQU	GPIOA_SDE_SDEN15,		15
	.EQU	GPIOA_SDE_SDEN14,		14
	.EQU	GPIOA_SDE_SDEN13,		13
	.EQU	GPIOA_SDE_SDEN12,		12
	.EQU	GPIOA_SDE_SDEN11,		11
	.EQU	GPIOA_SDE_SDEN10,		10
	.EQU	GPIOA_SDE_SDEN9,		9
	.EQU	GPIOA_SDE_SDEN8,		8
	.EQU	GPIOA_SDE_SDEN7,		7
	.EQU	GPIOA_SDE_SDEN6,		6
	.EQU	GPIOA_SDE_SDEN5,		5
	.EQU	GPIOA_SDE_SDEN4,		4
	.EQU	GPIOA_SDE_SDEN3,		3
	.EQU	GPIOA_SDE_SDEN2,		2
	.EQU	GPIOA_SDE_SDEN1,		1
	.EQU	GPIOA_SDE_SDEN0,		0
//  register-------------------------------------
	.EQU	GPIOA_SDCTL,	0x5000003C
//  0x5000 003C  GPIOA_SDCTL   Bits-------------------------------------
	.EQU	GPIOA_SDCTL_PSDEF,		2
	.EQU	GPIOA_SDCTL_LINKEN,		1
	.EQU	GPIOA_SDCTL_SWSAMCLK,		0
//  register-------------------------------------
	.EQU	GPIOB_PIR,		0x50000040
//  0x5000 0040  GPIOB_PIR   Bits-------------------------------------
	.EQU	GPIOB_PIR_PXPIR15,		15
	.EQU	GPIOB_PIR_PXPIR14,		14
	.EQU	GPIOB_PIR_PXPIR13,		13
	.EQU	GPIOB_PIR_PXPIR12,		12
	.EQU	GPIOB_PIR_PXPIR11,		11
	.EQU	GPIOB_PIR_PXPIR10,		10
	.EQU	GPIOB_PIR_PXPIR9,		9
	.EQU	GPIOB_PIR_PXPIR8,		8
	.EQU	GPIOB_PIR_PXPIR7,		7
	.EQU	GPIOB_PIR_PXPIR6,		6
	.EQU	GPIOB_PIR_PXPIR5,		5
	.EQU	GPIOB_PIR_PXPIR4,		4
	.EQU	GPIOB_PIR_PXPIR3,		3
	.EQU	GPIOB_PIR_PXPIR2,		2
	.EQU	GPIOB_PIR_PXPIR1,		1
	.EQU	GPIOB_PIR_PXPIR0,		0
//  register-------------------------------------
	.EQU	GPIOB_POR,		0x50000044
//  0x5000 0044  GPIOB_POR   Bits-------------------------------------
	.EQU	GPIOB_POR_PXPOR15,		15
	.EQU	GPIOB_POR_PXPOR14,		14
	.EQU	GPIOB_POR_PXPOR13,		13
	.EQU	GPIOB_POR_PXPOR12,		12
	.EQU	GPIOB_POR_PXPOR11,		11
	.EQU	GPIOB_POR_PXPOR10,		10
	.EQU	GPIOB_POR_PXPOR9,		9
	.EQU	GPIOB_POR_PXPOR8,		8
	.EQU	GPIOB_POR_PXPOR7,		7
	.EQU	GPIOB_POR_PXPOR6,		6
	.EQU	GPIOB_POR_PXPOR5,		5
	.EQU	GPIOB_POR_PXPOR4,		4
	.EQU	GPIOB_POR_PXPOR3,		3
	.EQU	GPIOB_POR_PXPOR2,		2
	.EQU	GPIOB_POR_PXPOR1,		1
	.EQU	GPIOB_POR_PXPOR0,		0
//  register-------------------------------------
	.EQU	GPIOB_PUR,		0x50000048
//  0x5000 0048  GPIOB_PUR   Bits-------------------------------------
	.EQU	GPIOB_PUR_PXPUR15,		15
	.EQU	GPIOB_PUR_PXPUR14,		14
	.EQU	GPIOB_PUR_PXPUR13,		13
	.EQU	GPIOB_PUR_PXPUR12,		12
	.EQU	GPIOB_PUR_PXPUR11,		11
	.EQU	GPIOB_PUR_PXPUR10,		10
	.EQU	GPIOB_PUR_PXPUR9,		9
	.EQU	GPIOB_PUR_PXPUR8,		8
	.EQU	GPIOB_PUR_PXPUR7,		7
	.EQU	GPIOB_PUR_PXPUR6,		6
	.EQU	GPIOB_PUR_PXPUR5,		5
	.EQU	GPIOB_PUR_PXPUR4,		4
	.EQU	GPIOB_PUR_PXPUR3,		3
	.EQU	GPIOB_PUR_PXPUR2,		2
	.EQU	GPIOB_PUR_PXPUR1,		1
	.EQU	GPIOB_PUR_PXPUR0,		0
//  register-------------------------------------
	.EQU	GPIOB_PDR,		0x5000004C
//  0x5000 004C  GPIOB_PDR   Bits-------------------------------------
	.EQU	GPIOB_PDR_PXPDR15,		15
	.EQU	GPIOB_PDR_PXPDR14,		14
	.EQU	GPIOB_PDR_PXPDR13,		13
	.EQU	GPIOB_PDR_PXPDR12,		12
	.EQU	GPIOB_PDR_PXPDR11,		11
	.EQU	GPIOB_PDR_PXPDR10,		10
	.EQU	GPIOB_PDR_PXPDR9,		9
	.EQU	GPIOB_PDR_PXPDR8,		8
	.EQU	GPIOB_PDR_PXPDR7,		7
	.EQU	GPIOB_PDR_PXPDR6,		6
	.EQU	GPIOB_PDR_PXPDR5,		5
	.EQU	GPIOB_PDR_PXPDR4,		4
	.EQU	GPIOB_PDR_PXPDR3,		3
	.EQU	GPIOB_PDR_PXPDR2,		2
	.EQU	GPIOB_PDR_PXPDR1,		1
	.EQU	GPIOB_PDR_PXPDR0,		0
//  register-------------------------------------
	.EQU	GPIOB_PODR,	0x50000050
//  0x5000 0050  GPIOB_PODR   Bits-------------------------------------
	.EQU	GPIOB_PODR_PXPODR15,		15
	.EQU	GPIOB_PODR_PXPODR14,		14
	.EQU	GPIOB_PODR_PXPODR13,		13
	.EQU	GPIOB_PODR_PXPODR12,		12
	.EQU	GPIOB_PODR_PXPODR11,		11
	.EQU	GPIOB_PODR_PXPODR10,		10
	.EQU	GPIOB_PODR_PXPODR9,		9
	.EQU	GPIOB_PODR_PXPODR8,		8
	.EQU	GPIOB_PODR_PXPODR7,		7
	.EQU	GPIOB_PODR_PXPODR6,		6
	.EQU	GPIOB_PODR_PXPODR5,		5
	.EQU	GPIOB_PODR_PXPODR4,		4
	.EQU	GPIOB_PODR_PXPODR3,		3
	.EQU	GPIOB_PODR_PXPODR2,		2
	.EQU	GPIOB_PODR_PXPODR1,		1
	.EQU	GPIOB_PODR_PXPODR0,		0
//  register-------------------------------------
	.EQU	GPIOB_PMOD,	0x50000054
//  0x5000 0054  GPIOB_PMOD   Bits-------------------------------------
	.EQU	GPIOB_PMOD_PXPMD15_1,		31
	.EQU	GPIOB_PMOD_PXPMD15_0,		30
	.EQU	GPIOB_PMOD_PXPMD14_1,		29
	.EQU	GPIOB_PMOD_PXPMD14_0,		28
	.EQU	GPIOB_PMOD_PXPMD13_1,		27
	.EQU	GPIOB_PMOD_PXPMD13_0,		26
	.EQU	GPIOB_PMOD_PXPMD12_1,		25
	.EQU	GPIOB_PMOD_PXPMD12_0,		24
	.EQU	GPIOB_PMOD_PXPMD11_1,		23
	.EQU	GPIOB_PMOD_PXPMD11_0,		22
	.EQU	GPIOB_PMOD_PXPMD10_1,		21
	.EQU	GPIOB_PMOD_PXPMD10_0,		20
	.EQU	GPIOB_PMOD_PXPMD9_1,		19
	.EQU	GPIOB_PMOD_PXPMD9_0,		18
	.EQU	GPIOB_PMOD_PXPMD8_1,		17
	.EQU	GPIOB_PMOD_PXPMD8_0,		16
	.EQU	GPIOB_PMOD_PXPMD7_1,		15
	.EQU	GPIOB_PMOD_PXPMD7_0,		14
	.EQU	GPIOB_PMOD_PXPMD6_1,		13
	.EQU	GPIOB_PMOD_PXPMD6_0,		12
	.EQU	GPIOB_PMOD_PXPMD5_1,		11
	.EQU	GPIOB_PMOD_PXPMD5_0,		10
	.EQU	GPIOB_PMOD_PXPMD4_1,		9
	.EQU	GPIOB_PMOD_PXPMD4_0,		8
	.EQU	GPIOB_PMOD_PXPMD3_1,		7
	.EQU	GPIOB_PMOD_PXPMD3_0,		6
	.EQU	GPIOB_PMOD_PXPMD2_1,		5
	.EQU	GPIOB_PMOD_PXPMD2_0,		4
	.EQU	GPIOB_PMOD_PXPMD1_1,		3
	.EQU	GPIOB_PMOD_PXPMD1_0,		2
	.EQU	GPIOB_PMOD_PXPMD0_1,		1
	.EQU	GPIOB_PMOD_PXPMD0_0,		0
//  register-------------------------------------
	.EQU	GPIOB_OMOD,	0x50000058
//  0x5000 0058  GPIOB_OMOD   Bits-------------------------------------
	.EQU	GPIOB_OMOD_PXOMD15,		30
	.EQU	GPIOB_OMOD_PXOMD14,		28
	.EQU	GPIOB_OMOD_PXOMD13,		26
	.EQU	GPIOB_OMOD_PXOMD12,		24
	.EQU	GPIOB_OMOD_PXOMD11,		22
	.EQU	GPIOB_OMOD_PXOMD10,		20
	.EQU	GPIOB_OMOD_PXOMD9,		18
	.EQU	GPIOB_OMOD_PXOMD8,		16
	.EQU	GPIOB_OMOD_PXOMD7,		14
	.EQU	GPIOB_OMOD_PXOMD6,		12
	.EQU	GPIOB_OMOD_PXOMD5,		10
	.EQU	GPIOB_OMOD_PXOMD4,		8
	.EQU	GPIOB_OMOD_PXOMD3,		6
	.EQU	GPIOB_OMOD_PXOMD2,		4
	.EQU	GPIOB_OMOD_PXOMD1,		2
	.EQU	GPIOB_OMOD_PXOMD0,		0
//  register-------------------------------------
	.EQU	GPIOB_LOCK,	0x5000005C
//  0x5000 005C  GPIOB_LOCK   Bits-------------------------------------
	.EQU	GPIOB_LOCK_PXLCKKEY15,		31
	.EQU	GPIOB_LOCK_PXLCKKEY14,		30
	.EQU	GPIOB_LOCK_PXLCKKEY13,		29
	.EQU	GPIOB_LOCK_PXLCKKEY12,		28
	.EQU	GPIOB_LOCK_PXLCKKEY11,		27
	.EQU	GPIOB_LOCK_PXLCKKEY10,		26
	.EQU	GPIOB_LOCK_PXLCKKEY9,		25
	.EQU	GPIOB_LOCK_PXLCKKEY8,		24
	.EQU	GPIOB_LOCK_PXLCKKEY7,		23
	.EQU	GPIOB_LOCK_PXLCKKEY6,		22
	.EQU	GPIOB_LOCK_PXLCKKEY5,		21
	.EQU	GPIOB_LOCK_PXLCKKEY4,		20
	.EQU	GPIOB_LOCK_PXLCKKEY3,		19
	.EQU	GPIOB_LOCK_PXLCKKEY2,		18
	.EQU	GPIOB_LOCK_PXLCKKEY1,		17
	.EQU	GPIOB_LOCK_PXLCKKEY0,		16
	.EQU	GPIOB_LOCK_PXLCK15,		15
	.EQU	GPIOB_LOCK_PXLCK14,		14
	.EQU	GPIOB_LOCK_PXLCK13,		13
	.EQU	GPIOB_LOCK_PXLCK12,		12
	.EQU	GPIOB_LOCK_PXLCK11,		11
	.EQU	GPIOB_LOCK_PXLCK10,		10
	.EQU	GPIOB_LOCK_PXLCK9,		9
	.EQU	GPIOB_LOCK_PXLCK8,		8
	.EQU	GPIOB_LOCK_PXLCK7,		7
	.EQU	GPIOB_LOCK_PXLCK6,		6
	.EQU	GPIOB_LOCK_PXLCK5,		5
	.EQU	GPIOB_LOCK_PXLCK4,		4
	.EQU	GPIOB_LOCK_PXLCK3,		3
	.EQU	GPIOB_LOCK_PXLCK2,		2
	.EQU	GPIOB_LOCK_PXLCK1,		1
	.EQU	GPIOB_LOCK_PXLCK0,		0
//  register-------------------------------------
	.EQU	GPIOB_RMPL,	0x50000060
//  0x5000 0060  GPIOB_RMPL   Bits-------------------------------------
	.EQU	GPIOB_RMPL_PXRMP7_3,		31
	.EQU	GPIOB_RMPL_PXRMP7_2,		30
	.EQU	GPIOB_RMPL_PXRMP7_1,		29
	.EQU	GPIOB_RMPL_PXRMP7_0,		28
	.EQU	GPIOB_RMPL_PXRMP6_3,		27
	.EQU	GPIOB_RMPL_PXRMP6_2,		26
	.EQU	GPIOB_RMPL_PXRMP6_1,		25
	.EQU	GPIOB_RMPL_PXRMP6_0,		24
	.EQU	GPIOB_RMPL_PXRMP5_3,		23
	.EQU	GPIOB_RMPL_PXRMP5_2,		22
	.EQU	GPIOB_RMPL_PXRMP5_1,		21
	.EQU	GPIOB_RMPL_PXRMP5_0,		20
	.EQU	GPIOB_RMPL_PXRMP4_3,		19
	.EQU	GPIOB_RMPL_PXRMP4_2,		18
	.EQU	GPIOB_RMPL_PXRMP4_1,		17
	.EQU	GPIOB_RMPL_PXRMP4_0,		16
	.EQU	GPIOB_RMPL_PXRMP3_3,		15
	.EQU	GPIOB_RMPL_PXRMP3_2,		14
	.EQU	GPIOB_RMPL_PXRMP3_1,		13
	.EQU	GPIOB_RMPL_PXRMP3_0,		12
	.EQU	GPIOB_RMPL_PXRMP2_3,		11
	.EQU	GPIOB_RMPL_PXRMP2_2,		10
	.EQU	GPIOB_RMPL_PXRMP2_1,		9
	.EQU	GPIOB_RMPL_PXRMP2_0,		8
	.EQU	GPIOB_RMPL_PXRMP1_3,		7
	.EQU	GPIOB_RMPL_PXRMP1_2,		6
	.EQU	GPIOB_RMPL_PXRMP1_1,		5
	.EQU	GPIOB_RMPL_PXRMP1_0,		4
	.EQU	GPIOB_RMPL_PXRMP0_3,		3
	.EQU	GPIOB_RMPL_PXRMP0_2,		2
	.EQU	GPIOB_RMPL_PXRMP0_1,		1
	.EQU	GPIOB_RMPL_PXRMP0_0,		0
//  register-------------------------------------
	.EQU	GPIOB_RMPH,	0x50000064
//  0x5000 0064  GPIOB_RMPH   Bits-------------------------------------
	.EQU	GPIOB_RMPH_PXRMP15_3,		31
	.EQU	GPIOB_RMPH_PXRMP15_2,		30
	.EQU	GPIOB_RMPH_PXRMP15_1,		29
	.EQU	GPIOB_RMPH_PXRMP15_0,		28
	.EQU	GPIOB_RMPH_PXRMP14_3,		27
	.EQU	GPIOB_RMPH_PXRMP14_2,		26
	.EQU	GPIOB_RMPH_PXRMP14_1,		25
	.EQU	GPIOB_RMPH_PXRMP14_0,		24
	.EQU	GPIOB_RMPH_PXRMP13_3,		23
	.EQU	GPIOB_RMPH_PXRMP13_2,		22
	.EQU	GPIOB_RMPH_PXRMP13_1,		21
	.EQU	GPIOB_RMPH_PXRMP13_0,		20
	.EQU	GPIOB_RMPH_PXRMP12_3,		19
	.EQU	GPIOB_RMPH_PXRMP12_2,		18
	.EQU	GPIOB_RMPH_PXRMP12_1,		17
	.EQU	GPIOB_RMPH_PXRMP12_0,		16
	.EQU	GPIOB_RMPH_PXRMP11_3,		15
	.EQU	GPIOB_RMPH_PXRMP11_2,		14
	.EQU	GPIOB_RMPH_PXRMP11_1,		13
	.EQU	GPIOB_RMPH_PXRMP11_0,		12
	.EQU	GPIOB_RMPH_PXRMP10_3,		11
	.EQU	GPIOB_RMPH_PXRMP10_2,		10
	.EQU	GPIOB_RMPH_PXRMP10_1,		9
	.EQU	GPIOB_RMPH_PXRMP10_0,		8
	.EQU	GPIOB_RMPH_PXRMP9_3,		7
	.EQU	GPIOB_RMPH_PXRMP9_2,		6
	.EQU	GPIOB_RMPH_PXRMP9_1,		5
	.EQU	GPIOB_RMPH_PXRMP9_0,		4
	.EQU	GPIOB_RMPH_PXRMP8_3,		3
	.EQU	GPIOB_RMPH_PXRMP8_2,		2
	.EQU	GPIOB_RMPH_PXRMP8_1,		1
	.EQU	GPIOB_RMPH_PXRMP8_0,		0
//  register-------------------------------------
	.EQU	GPIOB_SDE,		0x50000078
//  0x5000 0078  GPIOB_SDE   Bits-------------------------------------
	.EQU	GPIOB_SDE_SDEF15,		31
	.EQU	GPIOB_SDE_SDEF14,		30
	.EQU	GPIOB_SDE_SDEF13,		29
	.EQU	GPIOB_SDE_SDEF12,		28
	.EQU	GPIOB_SDE_SDEF11,		27
	.EQU	GPIOB_SDE_SDEF10,		26
	.EQU	GPIOB_SDE_SDEF9,		25
	.EQU	GPIOB_SDE_SDEF8,		24
	.EQU	GPIOB_SDE_SDEF7,		23
	.EQU	GPIOB_SDE_SDEF6,		22
	.EQU	GPIOB_SDE_SDEF5,		21
	.EQU	GPIOB_SDE_SDEF4,		20
	.EQU	GPIOB_SDE_SDEF3,		19
	.EQU	GPIOB_SDE_SDEF2,		18
	.EQU	GPIOB_SDE_SDEF1,		17
	.EQU	GPIOB_SDE_SDEF0,		16
	.EQU	GPIOB_SDE_SDEN15,		15
	.EQU	GPIOB_SDE_SDEN14,		14
	.EQU	GPIOB_SDE_SDEN13,		13
	.EQU	GPIOB_SDE_SDEN12,		12
	.EQU	GPIOB_SDE_SDEN11,		11
	.EQU	GPIOB_SDE_SDEN10,		10
	.EQU	GPIOB_SDE_SDEN9,		9
	.EQU	GPIOB_SDE_SDEN8,		8
	.EQU	GPIOB_SDE_SDEN7,		7
	.EQU	GPIOB_SDE_SDEN6,		6
	.EQU	GPIOB_SDE_SDEN5,		5
	.EQU	GPIOB_SDE_SDEN4,		4
	.EQU	GPIOB_SDE_SDEN3,		3
	.EQU	GPIOB_SDE_SDEN2,		2
	.EQU	GPIOB_SDE_SDEN1,		1
	.EQU	GPIOB_SDE_SDEN0,		0
//  register-------------------------------------
	.EQU	GPIOB_SDCTL,	0x5000007C
//  0x5000 007C  GPIOB_SDCTL   Bits-------------------------------------
	.EQU	GPIOB_SDCTL_PSDEF,		2
	.EQU	GPIOB_SDCTL_LINKEN,		1
	.EQU	GPIOB_SDCTL_SWSAMCLK,		0
//  register-------------------------------------
	.EQU	GPIOC_PIR,		0x50000080
//  0x5000 0080  GPIOC_PIR   Bits-------------------------------------
	.EQU	GPIOC_PIR_PXPIR15,		15
	.EQU	GPIOC_PIR_PXPIR14,		14
	.EQU	GPIOC_PIR_PXPIR13,		13
	.EQU	GPIOC_PIR_PXPIR12,		12
	.EQU	GPIOC_PIR_PXPIR11,		11
	.EQU	GPIOC_PIR_PXPIR10,		10
	.EQU	GPIOC_PIR_PXPIR9,		9
	.EQU	GPIOC_PIR_PXPIR8,		8
	.EQU	GPIOC_PIR_PXPIR7,		7
	.EQU	GPIOC_PIR_PXPIR6,		6
	.EQU	GPIOC_PIR_PXPIR5,		5
	.EQU	GPIOC_PIR_PXPIR4,		4
	.EQU	GPIOC_PIR_PXPIR3,		3
	.EQU	GPIOC_PIR_PXPIR2,		2
	.EQU	GPIOC_PIR_PXPIR1,		1
	.EQU	GPIOC_PIR_PXPIR0,		0
//  register-------------------------------------
	.EQU	GPIOC_POR,		0x50000084
//  0x5000 0084  GPIOC_POR   Bits-------------------------------------
	.EQU	GPIOC_POR_PXPOR15,		15
	.EQU	GPIOC_POR_PXPOR14,		14
	.EQU	GPIOC_POR_PXPOR13,		13
	.EQU	GPIOC_POR_PXPOR12,		12
	.EQU	GPIOC_POR_PXPOR11,		11
	.EQU	GPIOC_POR_PXPOR10,		10
	.EQU	GPIOC_POR_PXPOR9,		9
	.EQU	GPIOC_POR_PXPOR8,		8
	.EQU	GPIOC_POR_PXPOR7,		7
	.EQU	GPIOC_POR_PXPOR6,		6
	.EQU	GPIOC_POR_PXPOR5,		5
	.EQU	GPIOC_POR_PXPOR4,		4
	.EQU	GPIOC_POR_PXPOR3,		3
	.EQU	GPIOC_POR_PXPOR2,		2
	.EQU	GPIOC_POR_PXPOR1,		1
	.EQU	GPIOC_POR_PXPOR0,		0
//  register-------------------------------------
	.EQU	GPIOC_PUR,		0x50000088
//  0x5000 0088  GPIOC_PUR   Bits-------------------------------------
	.EQU	GPIOC_PUR_PXPUR15,		15
	.EQU	GPIOC_PUR_PXPUR14,		14
	.EQU	GPIOC_PUR_PXPUR13,		13
	.EQU	GPIOC_PUR_PXPUR12,		12
	.EQU	GPIOC_PUR_PXPUR11,		11
	.EQU	GPIOC_PUR_PXPUR10,		10
	.EQU	GPIOC_PUR_PXPUR9,		9
	.EQU	GPIOC_PUR_PXPUR8,		8
	.EQU	GPIOC_PUR_PXPUR7,		7
	.EQU	GPIOC_PUR_PXPUR6,		6
	.EQU	GPIOC_PUR_PXPUR5,		5
	.EQU	GPIOC_PUR_PXPUR4,		4
	.EQU	GPIOC_PUR_PXPUR3,		3
	.EQU	GPIOC_PUR_PXPUR2,		2
	.EQU	GPIOC_PUR_PXPUR1,		1
	.EQU	GPIOC_PUR_PXPUR0,		0
//  register-------------------------------------
	.EQU	GPIOC_PDR,		0x5000008C
//  0x5000 008C  GPIOC_PDR   Bits-------------------------------------
	.EQU	GPIOC_PDR_PXPDR15,		15
	.EQU	GPIOC_PDR_PXPDR14,		14
	.EQU	GPIOC_PDR_PXPDR13,		13
	.EQU	GPIOC_PDR_PXPDR12,		12
	.EQU	GPIOC_PDR_PXPDR11,		11
	.EQU	GPIOC_PDR_PXPDR10,		10
	.EQU	GPIOC_PDR_PXPDR9,		9
	.EQU	GPIOC_PDR_PXPDR8,		8
	.EQU	GPIOC_PDR_PXPDR7,		7
	.EQU	GPIOC_PDR_PXPDR6,		6
	.EQU	GPIOC_PDR_PXPDR5,		5
	.EQU	GPIOC_PDR_PXPDR4,		4
	.EQU	GPIOC_PDR_PXPDR3,		3
	.EQU	GPIOC_PDR_PXPDR2,		2
	.EQU	GPIOC_PDR_PXPDR1,		1
	.EQU	GPIOC_PDR_PXPDR0,		0
//  register-------------------------------------
	.EQU	GPIOC_PODR,	0x50000090
//  0x5000 0090  GPIOC_PODR   Bits-------------------------------------
	.EQU	GPIOC_PODR_PXPODR15,		15
	.EQU	GPIOC_PODR_PXPODR14,		14
	.EQU	GPIOC_PODR_PXPODR13,		13
	.EQU	GPIOC_PODR_PXPODR12,		12
	.EQU	GPIOC_PODR_PXPODR11,		11
	.EQU	GPIOC_PODR_PXPODR10,		10
	.EQU	GPIOC_PODR_PXPODR9,		9
	.EQU	GPIOC_PODR_PXPODR8,		8
	.EQU	GPIOC_PODR_PXPODR7,		7
	.EQU	GPIOC_PODR_PXPODR6,		6
	.EQU	GPIOC_PODR_PXPODR5,		5
	.EQU	GPIOC_PODR_PXPODR4,		4
	.EQU	GPIOC_PODR_PXPODR3,		3
	.EQU	GPIOC_PODR_PXPODR2,		2
	.EQU	GPIOC_PODR_PXPODR1,		1
	.EQU	GPIOC_PODR_PXPODR0,		0
//  register-------------------------------------
	.EQU	GPIOC_PMOD,	0x50000094
//  0x5000 0094  GPIOC_PMOD   Bits-------------------------------------
	.EQU	GPIOC_PMOD_PXPMD15_1,		31
	.EQU	GPIOC_PMOD_PXPMD15_0,		30
	.EQU	GPIOC_PMOD_PXPMD14_1,		29
	.EQU	GPIOC_PMOD_PXPMD14_0,		28
	.EQU	GPIOC_PMOD_PXPMD13_1,		27
	.EQU	GPIOC_PMOD_PXPMD13_0,		26
	.EQU	GPIOC_PMOD_PXPMD12_1,		25
	.EQU	GPIOC_PMOD_PXPMD12_0,		24
	.EQU	GPIOC_PMOD_PXPMD11_1,		23
	.EQU	GPIOC_PMOD_PXPMD11_0,		22
	.EQU	GPIOC_PMOD_PXPMD10_1,		21
	.EQU	GPIOC_PMOD_PXPMD10_0,		20
	.EQU	GPIOC_PMOD_PXPMD9_1,		19
	.EQU	GPIOC_PMOD_PXPMD9_0,		18
	.EQU	GPIOC_PMOD_PXPMD8_1,		17
	.EQU	GPIOC_PMOD_PXPMD8_0,		16
	.EQU	GPIOC_PMOD_PXPMD7_1,		15
	.EQU	GPIOC_PMOD_PXPMD7_0,		14
	.EQU	GPIOC_PMOD_PXPMD6_1,		13
	.EQU	GPIOC_PMOD_PXPMD6_0,		12
	.EQU	GPIOC_PMOD_PXPMD5_1,		11
	.EQU	GPIOC_PMOD_PXPMD5_0,		10
	.EQU	GPIOC_PMOD_PXPMD4_1,		9
	.EQU	GPIOC_PMOD_PXPMD4_0,		8
	.EQU	GPIOC_PMOD_PXPMD3_1,		7
	.EQU	GPIOC_PMOD_PXPMD3_0,		6
	.EQU	GPIOC_PMOD_PXPMD2_1,		5
	.EQU	GPIOC_PMOD_PXPMD2_0,		4
	.EQU	GPIOC_PMOD_PXPMD1_1,		3
	.EQU	GPIOC_PMOD_PXPMD1_0,		2
	.EQU	GPIOC_PMOD_PXPMD0_1,		1
	.EQU	GPIOC_PMOD_PXPMD0_0,		0
//  register-------------------------------------
	.EQU	GPIOC_OMOD,	0x50000098
//  0x5000 0098  GPIOC_OMOD   Bits-------------------------------------
	.EQU	GPIOC_OMOD_PXOMD15,		30
	.EQU	GPIOC_OMOD_PXOMD14,		28
	.EQU	GPIOC_OMOD_PXOMD13,		26
	.EQU	GPIOC_OMOD_PXOMD12,		24
	.EQU	GPIOC_OMOD_PXOMD11,		22
	.EQU	GPIOC_OMOD_PXOMD10,		20
	.EQU	GPIOC_OMOD_PXOMD9,		18
	.EQU	GPIOC_OMOD_PXOMD8,		16
	.EQU	GPIOC_OMOD_PXOMD7,		14
	.EQU	GPIOC_OMOD_PXOMD6,		12
	.EQU	GPIOC_OMOD_PXOMD5,		10
	.EQU	GPIOC_OMOD_PXOMD4,		8
	.EQU	GPIOC_OMOD_PXOMD3,		6
	.EQU	GPIOC_OMOD_PXOMD2,		4
	.EQU	GPIOC_OMOD_PXOMD1,		2
	.EQU	GPIOC_OMOD_PXOMD0,		0
//  register-------------------------------------
	.EQU	GPIOC_LOCK,	0x5000009C
//  0x5000 009C  GPIOC_LOCK   Bits-------------------------------------
	.EQU	GPIOC_LOCK_PXLCKKEY15,		31
	.EQU	GPIOC_LOCK_PXLCKKEY14,		30
	.EQU	GPIOC_LOCK_PXLCKKEY13,		29
	.EQU	GPIOC_LOCK_PXLCKKEY12,		28
	.EQU	GPIOC_LOCK_PXLCKKEY11,		27
	.EQU	GPIOC_LOCK_PXLCKKEY10,		26
	.EQU	GPIOC_LOCK_PXLCKKEY9,		25
	.EQU	GPIOC_LOCK_PXLCKKEY8,		24
	.EQU	GPIOC_LOCK_PXLCKKEY7,		23
	.EQU	GPIOC_LOCK_PXLCKKEY6,		22
	.EQU	GPIOC_LOCK_PXLCKKEY5,		21
	.EQU	GPIOC_LOCK_PXLCKKEY4,		20
	.EQU	GPIOC_LOCK_PXLCKKEY3,		19
	.EQU	GPIOC_LOCK_PXLCKKEY2,		18
	.EQU	GPIOC_LOCK_PXLCKKEY1,		17
	.EQU	GPIOC_LOCK_PXLCKKEY0,		16
	.EQU	GPIOC_LOCK_PXLCK15,		15
	.EQU	GPIOC_LOCK_PXLCK14,		14
	.EQU	GPIOC_LOCK_PXLCK13,		13
	.EQU	GPIOC_LOCK_PXLCK12,		12
	.EQU	GPIOC_LOCK_PXLCK11,		11
	.EQU	GPIOC_LOCK_PXLCK10,		10
	.EQU	GPIOC_LOCK_PXLCK9,		9
	.EQU	GPIOC_LOCK_PXLCK8,		8
	.EQU	GPIOC_LOCK_PXLCK7,		7
	.EQU	GPIOC_LOCK_PXLCK6,		6
	.EQU	GPIOC_LOCK_PXLCK5,		5
	.EQU	GPIOC_LOCK_PXLCK4,		4
	.EQU	GPIOC_LOCK_PXLCK3,		3
	.EQU	GPIOC_LOCK_PXLCK2,		2
	.EQU	GPIOC_LOCK_PXLCK1,		1
	.EQU	GPIOC_LOCK_PXLCK0,		0
//  register-------------------------------------
	.EQU	GPIOC_RMPL,	0x500000A0
//  0x5000 00A0  GPIOC_RMPL   Bits-------------------------------------
	.EQU	GPIOC_RMPL_PXRMP7_3,		31
	.EQU	GPIOC_RMPL_PXRMP7_2,		30
	.EQU	GPIOC_RMPL_PXRMP7_1,		29
	.EQU	GPIOC_RMPL_PXRMP7_0,		28
	.EQU	GPIOC_RMPL_PXRMP6_3,		27
	.EQU	GPIOC_RMPL_PXRMP6_2,		26
	.EQU	GPIOC_RMPL_PXRMP6_1,		25
	.EQU	GPIOC_RMPL_PXRMP6_0,		24
	.EQU	GPIOC_RMPL_PXRMP5_3,		23
	.EQU	GPIOC_RMPL_PXRMP5_2,		22
	.EQU	GPIOC_RMPL_PXRMP5_1,		21
	.EQU	GPIOC_RMPL_PXRMP5_0,		20
	.EQU	GPIOC_RMPL_PXRMP4_3,		19
	.EQU	GPIOC_RMPL_PXRMP4_2,		18
	.EQU	GPIOC_RMPL_PXRMP4_1,		17
	.EQU	GPIOC_RMPL_PXRMP4_0,		16
	.EQU	GPIOC_RMPL_PXRMP3_3,		15
	.EQU	GPIOC_RMPL_PXRMP3_2,		14
	.EQU	GPIOC_RMPL_PXRMP3_1,		13
	.EQU	GPIOC_RMPL_PXRMP3_0,		12
	.EQU	GPIOC_RMPL_PXRMP2_3,		11
	.EQU	GPIOC_RMPL_PXRMP2_2,		10
	.EQU	GPIOC_RMPL_PXRMP2_1,		9
	.EQU	GPIOC_RMPL_PXRMP2_0,		8
	.EQU	GPIOC_RMPL_PXRMP1_3,		7
	.EQU	GPIOC_RMPL_PXRMP1_2,		6
	.EQU	GPIOC_RMPL_PXRMP1_1,		5
	.EQU	GPIOC_RMPL_PXRMP1_0,		4
	.EQU	GPIOC_RMPL_PXRMP0_3,		3
	.EQU	GPIOC_RMPL_PXRMP0_2,		2
	.EQU	GPIOC_RMPL_PXRMP0_1,		1
	.EQU	GPIOC_RMPL_PXRMP0_0,		0
//  register-------------------------------------
	.EQU	GPIOC_RMPH,	0x500000A4
//  0x5000 00A4  GPIOC_RMPH   Bits-------------------------------------
	.EQU	GPIOC_RMPH_PXRMP15_3,		31
	.EQU	GPIOC_RMPH_PXRMP15_2,		30
	.EQU	GPIOC_RMPH_PXRMP15_1,		29
	.EQU	GPIOC_RMPH_PXRMP15_0,		28
	.EQU	GPIOC_RMPH_PXRMP14_3,		27
	.EQU	GPIOC_RMPH_PXRMP14_2,		26
	.EQU	GPIOC_RMPH_PXRMP14_1,		25
	.EQU	GPIOC_RMPH_PXRMP14_0,		24
	.EQU	GPIOC_RMPH_PXRMP13_3,		23
	.EQU	GPIOC_RMPH_PXRMP13_2,		22
	.EQU	GPIOC_RMPH_PXRMP13_1,		21
	.EQU	GPIOC_RMPH_PXRMP13_0,		20
	.EQU	GPIOC_RMPH_PXRMP12_3,		19
	.EQU	GPIOC_RMPH_PXRMP12_2,		18
	.EQU	GPIOC_RMPH_PXRMP12_1,		17
	.EQU	GPIOC_RMPH_PXRMP12_0,		16
	.EQU	GPIOC_RMPH_PXRMP11_3,		15
	.EQU	GPIOC_RMPH_PXRMP11_2,		14
	.EQU	GPIOC_RMPH_PXRMP11_1,		13
	.EQU	GPIOC_RMPH_PXRMP11_0,		12
	.EQU	GPIOC_RMPH_PXRMP10_3,		11
	.EQU	GPIOC_RMPH_PXRMP10_2,		10
	.EQU	GPIOC_RMPH_PXRMP10_1,		9
	.EQU	GPIOC_RMPH_PXRMP10_0,		8
	.EQU	GPIOC_RMPH_PXRMP9_3,		7
	.EQU	GPIOC_RMPH_PXRMP9_2,		6
	.EQU	GPIOC_RMPH_PXRMP9_1,		5
	.EQU	GPIOC_RMPH_PXRMP9_0,		4
	.EQU	GPIOC_RMPH_PXRMP8_3,		3
	.EQU	GPIOC_RMPH_PXRMP8_2,		2
	.EQU	GPIOC_RMPH_PXRMP8_1,		1
	.EQU	GPIOC_RMPH_PXRMP8_0,		0
//  register-------------------------------------
	.EQU	GPIOC_SDE,		0x500000B8
//  0x5000 00B8  GPIOC_SDE   Bits-------------------------------------
	.EQU	GPIOC_SDE_SDEF15,		31
	.EQU	GPIOC_SDE_SDEF14,		30
	.EQU	GPIOC_SDE_SDEF13,		29
	.EQU	GPIOC_SDE_SDEF12,		28
	.EQU	GPIOC_SDE_SDEF11,		27
	.EQU	GPIOC_SDE_SDEF10,		26
	.EQU	GPIOC_SDE_SDEF9,		25
	.EQU	GPIOC_SDE_SDEF8,		24
	.EQU	GPIOC_SDE_SDEF7,		23
	.EQU	GPIOC_SDE_SDEF6,		22
	.EQU	GPIOC_SDE_SDEF5,		21
	.EQU	GPIOC_SDE_SDEF4,		20
	.EQU	GPIOC_SDE_SDEF3,		19
	.EQU	GPIOC_SDE_SDEF2,		18
	.EQU	GPIOC_SDE_SDEF1,		17
	.EQU	GPIOC_SDE_SDEF0,		16
	.EQU	GPIOC_SDE_SDEN15,		15
	.EQU	GPIOC_SDE_SDEN14,		14
	.EQU	GPIOC_SDE_SDEN13,		13
	.EQU	GPIOC_SDE_SDEN12,		12
	.EQU	GPIOC_SDE_SDEN11,		11
	.EQU	GPIOC_SDE_SDEN10,		10
	.EQU	GPIOC_SDE_SDEN9,		9
	.EQU	GPIOC_SDE_SDEN8,		8
	.EQU	GPIOC_SDE_SDEN7,		7
	.EQU	GPIOC_SDE_SDEN6,		6
	.EQU	GPIOC_SDE_SDEN5,		5
	.EQU	GPIOC_SDE_SDEN4,		4
	.EQU	GPIOC_SDE_SDEN3,		3
	.EQU	GPIOC_SDE_SDEN2,		2
	.EQU	GPIOC_SDE_SDEN1,		1
	.EQU	GPIOC_SDE_SDEN0,		0
//  register-------------------------------------
	.EQU	GPIOC_SDCTL,	0x500000BC
//  0x5000 00BC  GPIOC_SDCTL   Bits-------------------------------------
	.EQU	GPIOC_SDCTL_PSDEF,		2
	.EQU	GPIOC_SDCTL_LINKEN,		1
	.EQU	GPIOC_SDCTL_SWSAMCLK,		0
//  register-------------------------------------
	.EQU	GPIOD_PIR,		0x500000C0
//  0x5000 00C0  GPIOD_PIR   Bits-------------------------------------
	.EQU	GPIOD_PIR_PXPIR15,		15
	.EQU	GPIOD_PIR_PXPIR14,		14
	.EQU	GPIOD_PIR_PXPIR13,		13
	.EQU	GPIOD_PIR_PXPIR12,		12
	.EQU	GPIOD_PIR_PXPIR11,		11
	.EQU	GPIOD_PIR_PXPIR10,		10
	.EQU	GPIOD_PIR_PXPIR9,		9
	.EQU	GPIOD_PIR_PXPIR8,		8
	.EQU	GPIOD_PIR_PXPIR7,		7
	.EQU	GPIOD_PIR_PXPIR6,		6
	.EQU	GPIOD_PIR_PXPIR5,		5
	.EQU	GPIOD_PIR_PXPIR4,		4
	.EQU	GPIOD_PIR_PXPIR3,		3
	.EQU	GPIOD_PIR_PXPIR2,		2
	.EQU	GPIOD_PIR_PXPIR1,		1
	.EQU	GPIOD_PIR_PXPIR0,		0
//  register-------------------------------------
	.EQU	GPIOD_POR,		0x500000C4
//  0x5000 00C4  GPIOD_POR   Bits-------------------------------------
	.EQU	GPIOD_POR_PXPOR15,		15
	.EQU	GPIOD_POR_PXPOR14,		14
	.EQU	GPIOD_POR_PXPOR13,		13
	.EQU	GPIOD_POR_PXPOR12,		12
	.EQU	GPIOD_POR_PXPOR11,		11
	.EQU	GPIOD_POR_PXPOR10,		10
	.EQU	GPIOD_POR_PXPOR9,		9
	.EQU	GPIOD_POR_PXPOR8,		8
	.EQU	GPIOD_POR_PXPOR7,		7
	.EQU	GPIOD_POR_PXPOR6,		6
	.EQU	GPIOD_POR_PXPOR5,		5
	.EQU	GPIOD_POR_PXPOR4,		4
	.EQU	GPIOD_POR_PXPOR3,		3
	.EQU	GPIOD_POR_PXPOR2,		2
	.EQU	GPIOD_POR_PXPOR1,		1
	.EQU	GPIOD_POR_PXPOR0,		0
//  register-------------------------------------
	.EQU	GPIOD_PUR,		0x500000C8
//  0x5000 00C8  GPIOD_PUR   Bits-------------------------------------
	.EQU	GPIOD_PUR_PXPUR15,		15
	.EQU	GPIOD_PUR_PXPUR14,		14
	.EQU	GPIOD_PUR_PXPUR13,		13
	.EQU	GPIOD_PUR_PXPUR12,		12
	.EQU	GPIOD_PUR_PXPUR11,		11
	.EQU	GPIOD_PUR_PXPUR10,		10
	.EQU	GPIOD_PUR_PXPUR9,		9
	.EQU	GPIOD_PUR_PXPUR8,		8
	.EQU	GPIOD_PUR_PXPUR7,		7
	.EQU	GPIOD_PUR_PXPUR6,		6
	.EQU	GPIOD_PUR_PXPUR5,		5
	.EQU	GPIOD_PUR_PXPUR4,		4
	.EQU	GPIOD_PUR_PXPUR3,		3
	.EQU	GPIOD_PUR_PXPUR2,		2
	.EQU	GPIOD_PUR_PXPUR1,		1
	.EQU	GPIOD_PUR_PXPUR0,		0
//  register-------------------------------------
	.EQU	GPIOD_PDR,		0x500000CC
//  0x5000 00CC  GPIOD_PDR   Bits-------------------------------------
	.EQU	GPIOD_PDR_PXPDR15,		15
	.EQU	GPIOD_PDR_PXPDR14,		14
	.EQU	GPIOD_PDR_PXPDR13,		13
	.EQU	GPIOD_PDR_PXPDR12,		12
	.EQU	GPIOD_PDR_PXPDR11,		11
	.EQU	GPIOD_PDR_PXPDR10,		10
	.EQU	GPIOD_PDR_PXPDR9,		9
	.EQU	GPIOD_PDR_PXPDR8,		8
	.EQU	GPIOD_PDR_PXPDR7,		7
	.EQU	GPIOD_PDR_PXPDR6,		6
	.EQU	GPIOD_PDR_PXPDR5,		5
	.EQU	GPIOD_PDR_PXPDR4,		4
	.EQU	GPIOD_PDR_PXPDR3,		3
	.EQU	GPIOD_PDR_PXPDR2,		2
	.EQU	GPIOD_PDR_PXPDR1,		1
	.EQU	GPIOD_PDR_PXPDR0,		0
//  register-------------------------------------
	.EQU	GPIOD_PODR,	0x500000D0
//  0x5000 00D0  GPIOD_PODR   Bits-------------------------------------
	.EQU	GPIOD_PODR_PXPODR15,		15
	.EQU	GPIOD_PODR_PXPODR14,		14
	.EQU	GPIOD_PODR_PXPODR13,		13
	.EQU	GPIOD_PODR_PXPODR12,		12
	.EQU	GPIOD_PODR_PXPODR11,		11
	.EQU	GPIOD_PODR_PXPODR10,		10
	.EQU	GPIOD_PODR_PXPODR9,		9
	.EQU	GPIOD_PODR_PXPODR8,		8
	.EQU	GPIOD_PODR_PXPODR7,		7
	.EQU	GPIOD_PODR_PXPODR6,		6
	.EQU	GPIOD_PODR_PXPODR5,		5
	.EQU	GPIOD_PODR_PXPODR4,		4
	.EQU	GPIOD_PODR_PXPODR3,		3
	.EQU	GPIOD_PODR_PXPODR2,		2
	.EQU	GPIOD_PODR_PXPODR1,		1
	.EQU	GPIOD_PODR_PXPODR0,		0
//  register-------------------------------------
	.EQU	GPIOD_PMOD,	0x500000D4
//  0x5000 00D4  GPIOD_PMOD   Bits-------------------------------------
	.EQU	GPIOD_PMOD_PXPMD15_1,		31
	.EQU	GPIOD_PMOD_PXPMD15_0,		30
	.EQU	GPIOD_PMOD_PXPMD14_1,		29
	.EQU	GPIOD_PMOD_PXPMD14_0,		28
	.EQU	GPIOD_PMOD_PXPMD13_1,		27
	.EQU	GPIOD_PMOD_PXPMD13_0,		26
	.EQU	GPIOD_PMOD_PXPMD12_1,		25
	.EQU	GPIOD_PMOD_PXPMD12_0,		24
	.EQU	GPIOD_PMOD_PXPMD11_1,		23
	.EQU	GPIOD_PMOD_PXPMD11_0,		22
	.EQU	GPIOD_PMOD_PXPMD10_1,		21
	.EQU	GPIOD_PMOD_PXPMD10_0,		20
	.EQU	GPIOD_PMOD_PXPMD9_1,		19
	.EQU	GPIOD_PMOD_PXPMD9_0,		18
	.EQU	GPIOD_PMOD_PXPMD8_1,		17
	.EQU	GPIOD_PMOD_PXPMD8_0,		16
	.EQU	GPIOD_PMOD_PXPMD7_1,		15
	.EQU	GPIOD_PMOD_PXPMD7_0,		14
	.EQU	GPIOD_PMOD_PXPMD6_1,		13
	.EQU	GPIOD_PMOD_PXPMD6_0,		12
	.EQU	GPIOD_PMOD_PXPMD5_1,		11
	.EQU	GPIOD_PMOD_PXPMD5_0,		10
	.EQU	GPIOD_PMOD_PXPMD4_1,		9
	.EQU	GPIOD_PMOD_PXPMD4_0,		8
	.EQU	GPIOD_PMOD_PXPMD3_1,		7
	.EQU	GPIOD_PMOD_PXPMD3_0,		6
	.EQU	GPIOD_PMOD_PXPMD2_1,		5
	.EQU	GPIOD_PMOD_PXPMD2_0,		4
	.EQU	GPIOD_PMOD_PXPMD1_1,		3
	.EQU	GPIOD_PMOD_PXPMD1_0,		2
	.EQU	GPIOD_PMOD_PXPMD0_1,		1
	.EQU	GPIOD_PMOD_PXPMD0_0,		0
//  register-------------------------------------
	.EQU	GPIOD_OMOD,	0x500000D8
//  0x5000 00D8  GPIOD_OMOD   Bits-------------------------------------
	.EQU	GPIOD_OMOD_PXOMD15,		30
	.EQU	GPIOD_OMOD_PXOMD14,		28
	.EQU	GPIOD_OMOD_PXOMD13,		26
	.EQU	GPIOD_OMOD_PXOMD12,		24
	.EQU	GPIOD_OMOD_PXOMD11,		22
	.EQU	GPIOD_OMOD_PXOMD10,		20
	.EQU	GPIOD_OMOD_PXOMD9,		18
	.EQU	GPIOD_OMOD_PXOMD8,		16
	.EQU	GPIOD_OMOD_PXOMD7,		14
	.EQU	GPIOD_OMOD_PXOMD6,		12
	.EQU	GPIOD_OMOD_PXOMD5,		10
	.EQU	GPIOD_OMOD_PXOMD4,		8
	.EQU	GPIOD_OMOD_PXOMD3,		6
	.EQU	GPIOD_OMOD_PXOMD2,		4
	.EQU	GPIOD_OMOD_PXOMD1,		2
	.EQU	GPIOD_OMOD_PXOMD0,		0
//  register-------------------------------------
	.EQU	GPIOD_LOCK,	0x500000DC
//  0x5000 00DC  GPIOD_LOCK   Bits-------------------------------------
	.EQU	GPIOD_LOCK_PXLCKKEY15,		31
	.EQU	GPIOD_LOCK_PXLCKKEY14,		30
	.EQU	GPIOD_LOCK_PXLCKKEY13,		29
	.EQU	GPIOD_LOCK_PXLCKKEY12,		28
	.EQU	GPIOD_LOCK_PXLCKKEY11,		27
	.EQU	GPIOD_LOCK_PXLCKKEY10,		26
	.EQU	GPIOD_LOCK_PXLCKKEY9,		25
	.EQU	GPIOD_LOCK_PXLCKKEY8,		24
	.EQU	GPIOD_LOCK_PXLCKKEY7,		23
	.EQU	GPIOD_LOCK_PXLCKKEY6,		22
	.EQU	GPIOD_LOCK_PXLCKKEY5,		21
	.EQU	GPIOD_LOCK_PXLCKKEY4,		20
	.EQU	GPIOD_LOCK_PXLCKKEY3,		19
	.EQU	GPIOD_LOCK_PXLCKKEY2,		18
	.EQU	GPIOD_LOCK_PXLCKKEY1,		17
	.EQU	GPIOD_LOCK_PXLCKKEY0,		16
	.EQU	GPIOD_LOCK_PXLCK15,		15
	.EQU	GPIOD_LOCK_PXLCK14,		14
	.EQU	GPIOD_LOCK_PXLCK13,		13
	.EQU	GPIOD_LOCK_PXLCK12,		12
	.EQU	GPIOD_LOCK_PXLCK11,		11
	.EQU	GPIOD_LOCK_PXLCK10,		10
	.EQU	GPIOD_LOCK_PXLCK9,		9
	.EQU	GPIOD_LOCK_PXLCK8,		8
	.EQU	GPIOD_LOCK_PXLCK7,		7
	.EQU	GPIOD_LOCK_PXLCK6,		6
	.EQU	GPIOD_LOCK_PXLCK5,		5
	.EQU	GPIOD_LOCK_PXLCK4,		4
	.EQU	GPIOD_LOCK_PXLCK3,		3
	.EQU	GPIOD_LOCK_PXLCK2,		2
	.EQU	GPIOD_LOCK_PXLCK1,		1
	.EQU	GPIOD_LOCK_PXLCK0,		0
//  register-------------------------------------
	.EQU	GPIOD_RMPL,	0x500000E0
//  0x5000 00E0  GPIOD_RMPL   Bits-------------------------------------
	.EQU	GPIOD_RMPL_PXRMP7_3,		31
	.EQU	GPIOD_RMPL_PXRMP7_2,		30
	.EQU	GPIOD_RMPL_PXRMP7_1,		29
	.EQU	GPIOD_RMPL_PXRMP7_0,		28
	.EQU	GPIOD_RMPL_PXRMP6_3,		27
	.EQU	GPIOD_RMPL_PXRMP6_2,		26
	.EQU	GPIOD_RMPL_PXRMP6_1,		25
	.EQU	GPIOD_RMPL_PXRMP6_0,		24
	.EQU	GPIOD_RMPL_PXRMP5_3,		23
	.EQU	GPIOD_RMPL_PXRMP5_2,		22
	.EQU	GPIOD_RMPL_PXRMP5_1,		21
	.EQU	GPIOD_RMPL_PXRMP5_0,		20
	.EQU	GPIOD_RMPL_PXRMP4_3,		19
	.EQU	GPIOD_RMPL_PXRMP4_2,		18
	.EQU	GPIOD_RMPL_PXRMP4_1,		17
	.EQU	GPIOD_RMPL_PXRMP4_0,		16
	.EQU	GPIOD_RMPL_PXRMP3_3,		15
	.EQU	GPIOD_RMPL_PXRMP3_2,		14
	.EQU	GPIOD_RMPL_PXRMP3_1,		13
	.EQU	GPIOD_RMPL_PXRMP3_0,		12
	.EQU	GPIOD_RMPL_PXRMP2_3,		11
	.EQU	GPIOD_RMPL_PXRMP2_2,		10
	.EQU	GPIOD_RMPL_PXRMP2_1,		9
	.EQU	GPIOD_RMPL_PXRMP2_0,		8
	.EQU	GPIOD_RMPL_PXRMP1_3,		7
	.EQU	GPIOD_RMPL_PXRMP1_2,		6
	.EQU	GPIOD_RMPL_PXRMP1_1,		5
	.EQU	GPIOD_RMPL_PXRMP1_0,		4
	.EQU	GPIOD_RMPL_PXRMP0_3,		3
	.EQU	GPIOD_RMPL_PXRMP0_2,		2
	.EQU	GPIOD_RMPL_PXRMP0_1,		1
	.EQU	GPIOD_RMPL_PXRMP0_0,		0
//  register-------------------------------------
	.EQU	GPIOD_RMPH,	0x500000E4
//  0x5000 00E4  GPIOD_RMPH   Bits-------------------------------------
	.EQU	GPIOD_RMPH_PXRMP15_3,		31
	.EQU	GPIOD_RMPH_PXRMP15_2,		30
	.EQU	GPIOD_RMPH_PXRMP15_1,		29
	.EQU	GPIOD_RMPH_PXRMP15_0,		28
	.EQU	GPIOD_RMPH_PXRMP14_3,		27
	.EQU	GPIOD_RMPH_PXRMP14_2,		26
	.EQU	GPIOD_RMPH_PXRMP14_1,		25
	.EQU	GPIOD_RMPH_PXRMP14_0,		24
	.EQU	GPIOD_RMPH_PXRMP13_3,		23
	.EQU	GPIOD_RMPH_PXRMP13_2,		22
	.EQU	GPIOD_RMPH_PXRMP13_1,		21
	.EQU	GPIOD_RMPH_PXRMP13_0,		20
	.EQU	GPIOD_RMPH_PXRMP12_3,		19
	.EQU	GPIOD_RMPH_PXRMP12_2,		18
	.EQU	GPIOD_RMPH_PXRMP12_1,		17
	.EQU	GPIOD_RMPH_PXRMP12_0,		16
	.EQU	GPIOD_RMPH_PXRMP11_3,		15
	.EQU	GPIOD_RMPH_PXRMP11_2,		14
	.EQU	GPIOD_RMPH_PXRMP11_1,		13
	.EQU	GPIOD_RMPH_PXRMP11_0,		12
	.EQU	GPIOD_RMPH_PXRMP10_3,		11
	.EQU	GPIOD_RMPH_PXRMP10_2,		10
	.EQU	GPIOD_RMPH_PXRMP10_1,		9
	.EQU	GPIOD_RMPH_PXRMP10_0,		8
	.EQU	GPIOD_RMPH_PXRMP9_3,		7
	.EQU	GPIOD_RMPH_PXRMP9_2,		6
	.EQU	GPIOD_RMPH_PXRMP9_1,		5
	.EQU	GPIOD_RMPH_PXRMP9_0,		4
	.EQU	GPIOD_RMPH_PXRMP8_3,		3
	.EQU	GPIOD_RMPH_PXRMP8_2,		2
	.EQU	GPIOD_RMPH_PXRMP8_1,		1
	.EQU	GPIOD_RMPH_PXRMP8_0,		0
//  register-------------------------------------
	.EQU	GPIOD_SDE,		0x500000F8
//  0x5000 00F8  GPIOD_SDE   Bits-------------------------------------
	.EQU	GPIOD_SDE_SDEF15,		31
	.EQU	GPIOD_SDE_SDEF14,		30
	.EQU	GPIOD_SDE_SDEF13,		29
	.EQU	GPIOD_SDE_SDEF12,		28
	.EQU	GPIOD_SDE_SDEF11,		27
	.EQU	GPIOD_SDE_SDEF10,		26
	.EQU	GPIOD_SDE_SDEF9,		25
	.EQU	GPIOD_SDE_SDEF8,		24
	.EQU	GPIOD_SDE_SDEF7,		23
	.EQU	GPIOD_SDE_SDEF6,		22
	.EQU	GPIOD_SDE_SDEF5,		21
	.EQU	GPIOD_SDE_SDEF4,		20
	.EQU	GPIOD_SDE_SDEF3,		19
	.EQU	GPIOD_SDE_SDEF2,		18
	.EQU	GPIOD_SDE_SDEF1,		17
	.EQU	GPIOD_SDE_SDEF0,		16
	.EQU	GPIOD_SDE_SDEN15,		15
	.EQU	GPIOD_SDE_SDEN14,		14
	.EQU	GPIOD_SDE_SDEN13,		13
	.EQU	GPIOD_SDE_SDEN12,		12
	.EQU	GPIOD_SDE_SDEN11,		11
	.EQU	GPIOD_SDE_SDEN10,		10
	.EQU	GPIOD_SDE_SDEN9,		9
	.EQU	GPIOD_SDE_SDEN8,		8
	.EQU	GPIOD_SDE_SDEN7,		7
	.EQU	GPIOD_SDE_SDEN6,		6
	.EQU	GPIOD_SDE_SDEN5,		5
	.EQU	GPIOD_SDE_SDEN4,		4
	.EQU	GPIOD_SDE_SDEN3,		3
	.EQU	GPIOD_SDE_SDEN2,		2
	.EQU	GPIOD_SDE_SDEN1,		1
	.EQU	GPIOD_SDE_SDEN0,		0
//  register-------------------------------------
	.EQU	GPIOD_SDCTL,	0x500000FC
//  0x5000 00FC  GPIOD_SDCTL   Bits-------------------------------------
	.EQU	GPIOD_SDCTL_PSDEF,		2
	.EQU	GPIOD_SDCTL_LINKEN,		1
	.EQU	GPIOD_SDCTL_SWSAMCLK,		0
//  register-------------------------------------
	.EQU	GPIOA_INTMS,	0x50001000
//  0x5000 1000  GPIOA_INTMS   Bits-------------------------------------
	.EQU	GPIOA_INTMS_INTMS15,		15
	.EQU	GPIOA_INTMS_INTMS14,		14
	.EQU	GPIOA_INTMS_INTMS13,		13
	.EQU	GPIOA_INTMS_INTMS12,		12
	.EQU	GPIOA_INTMS_INTMS11,		11
	.EQU	GPIOA_INTMS_INTMS10,		10
	.EQU	GPIOA_INTMS_INTMS9,		9
	.EQU	GPIOA_INTMS_INTMS8,		8
	.EQU	GPIOA_INTMS_INTMS7,		7
	.EQU	GPIOA_INTMS_INTMS6,		6
	.EQU	GPIOA_INTMS_INTMS5,		5
	.EQU	GPIOA_INTMS_INTMS4,		4
	.EQU	GPIOA_INTMS_INTMS3,		3
	.EQU	GPIOA_INTMS_INTMS2,		2
	.EQU	GPIOA_INTMS_INTMS1,		1
	.EQU	GPIOA_INTMS_INTMS0,		0
//  register-------------------------------------
	.EQU	GPIOA_INTRISE,	0x50001004
//  0x5000 1004  GPIOA_INTRISE   Bits-------------------------------------
	.EQU	GPIOA_INTRISE_INTRISE15,		15
	.EQU	GPIOA_INTRISE_INTRISE14,		14
	.EQU	GPIOA_INTRISE_INTRISE13,		13
	.EQU	GPIOA_INTRISE_INTRISE12,		12
	.EQU	GPIOA_INTRISE_INTRISE11,		11
	.EQU	GPIOA_INTRISE_INTRISE10,		10
	.EQU	GPIOA_INTRISE_INTRISE9,		9
	.EQU	GPIOA_INTRISE_INTRISE8,		8
	.EQU	GPIOA_INTRISE_INTRISE7,		7
	.EQU	GPIOA_INTRISE_INTRISE6,		6
	.EQU	GPIOA_INTRISE_INTRISE5,		5
	.EQU	GPIOA_INTRISE_INTRISE4,		4
	.EQU	GPIOA_INTRISE_INTRISE3,		3
	.EQU	GPIOA_INTRISE_INTRISE2,		2
	.EQU	GPIOA_INTRISE_INTRISE1,		1
	.EQU	GPIOA_INTRISE_INTRISE0,		0
//  register-------------------------------------
	.EQU	GPIOA_INTFALL,	0x50001008
//  0x5000 1008  GPIOA_INTFALL   Bits-------------------------------------
	.EQU	GPIOA_INTFALL_INTFALL15,		15
	.EQU	GPIOA_INTFALL_INTFALL14,		14
	.EQU	GPIOA_INTFALL_INTFALL13,		13
	.EQU	GPIOA_INTFALL_INTFALL12,		12
	.EQU	GPIOA_INTFALL_INTFALL11,		11
	.EQU	GPIOA_INTFALL_INTFALL10,		10
	.EQU	GPIOA_INTFALL_INTFALL9,		9
	.EQU	GPIOA_INTFALL_INTFALL8,		8
	.EQU	GPIOA_INTFALL_INTFALL7,		7
	.EQU	GPIOA_INTFALL_INTFALL6,		6
	.EQU	GPIOA_INTFALL_INTFALL5,		5
	.EQU	GPIOA_INTFALL_INTFALL4,		4
	.EQU	GPIOA_INTFALL_INTFALL3,		3
	.EQU	GPIOA_INTFALL_INTFALL2,		2
	.EQU	GPIOA_INTFALL_INTFALL1,		1
	.EQU	GPIOA_INTFALL_INTFALL0,		0
//  register-------------------------------------
	.EQU	GPIOA_INTIE,	0x5000100C
//  0x5000 100C  GPIOA_INTIE   Bits-------------------------------------
	.EQU	GPIOA_INTIE_INTIE15,		15
	.EQU	GPIOA_INTIE_INTIE14,		14
	.EQU	GPIOA_INTIE_INTIE13,		13
	.EQU	GPIOA_INTIE_INTIE12,		12
	.EQU	GPIOA_INTIE_INTIE11,		11
	.EQU	GPIOA_INTIE_INTIE10,		10
	.EQU	GPIOA_INTIE_INTIE9,		9
	.EQU	GPIOA_INTIE_INTIE8,		8
	.EQU	GPIOA_INTIE_INTIE7,		7
	.EQU	GPIOA_INTIE_INTIE6,		6
	.EQU	GPIOA_INTIE_INTIE5,		5
	.EQU	GPIOA_INTIE_INTIE4,		4
	.EQU	GPIOA_INTIE_INTIE3,		3
	.EQU	GPIOA_INTIE_INTIE2,		2
	.EQU	GPIOA_INTIE_INTIE1,		1
	.EQU	GPIOA_INTIE_INTIE0,		0
//  register-------------------------------------
	.EQU	GPIOA_INTIF,	0x50001010
//  0x5000 1010  GPIOA_INTIF   Bits-------------------------------------
	.EQU	GPIOA_INTIF_INTFLAG15,		15
	.EQU	GPIOA_INTIF_INTFLAG14,		14
	.EQU	GPIOA_INTIF_INTFLAG13,		13
	.EQU	GPIOA_INTIF_INTFLAG12,		12
	.EQU	GPIOA_INTIF_INTFLAG11,		11
	.EQU	GPIOA_INTIF_INTFLAG10,		10
	.EQU	GPIOA_INTIF_INTFLAG9,		9
	.EQU	GPIOA_INTIF_INTFLAG8,		8
	.EQU	GPIOA_INTIF_INTFLAG7,		7
	.EQU	GPIOA_INTIF_INTFLAG6,		6
	.EQU	GPIOA_INTIF_INTFLAG5,		5
	.EQU	GPIOA_INTIF_INTFLAG4,		4
	.EQU	GPIOA_INTIF_INTFLAG3,		3
	.EQU	GPIOA_INTIF_INTFLAG2,		2
	.EQU	GPIOA_INTIF_INTFLAG1,		1
	.EQU	GPIOA_INTIF_INTFLAG0,		0
//  register-------------------------------------
	.EQU	GPIOB_INTMS,	0x50001040
//  0x5000 1040  GPIOB_INTMS   Bits-------------------------------------
	.EQU	GPIOB_INTMS_INTMS15,		15
	.EQU	GPIOB_INTMS_INTMS14,		14
	.EQU	GPIOB_INTMS_INTMS13,		13
	.EQU	GPIOB_INTMS_INTMS12,		12
	.EQU	GPIOB_INTMS_INTMS11,		11
	.EQU	GPIOB_INTMS_INTMS10,		10
	.EQU	GPIOB_INTMS_INTMS9,		9
	.EQU	GPIOB_INTMS_INTMS8,		8
	.EQU	GPIOB_INTMS_INTMS7,		7
	.EQU	GPIOB_INTMS_INTMS6,		6
	.EQU	GPIOB_INTMS_INTMS5,		5
	.EQU	GPIOB_INTMS_INTMS4,		4
	.EQU	GPIOB_INTMS_INTMS3,		3
	.EQU	GPIOB_INTMS_INTMS2,		2
	.EQU	GPIOB_INTMS_INTMS1,		1
	.EQU	GPIOB_INTMS_INTMS0,		0
//  register-------------------------------------
	.EQU	GPIOB_INTRISE,	0x50001044
//  0x5000 1044  GPIOB_INTRISE   Bits-------------------------------------
	.EQU	GPIOB_INTRISE_INTRISE15,		15
	.EQU	GPIOB_INTRISE_INTRISE14,		14
	.EQU	GPIOB_INTRISE_INTRISE13,		13
	.EQU	GPIOB_INTRISE_INTRISE12,		12
	.EQU	GPIOB_INTRISE_INTRISE11,		11
	.EQU	GPIOB_INTRISE_INTRISE10,		10
	.EQU	GPIOB_INTRISE_INTRISE9,		9
	.EQU	GPIOB_INTRISE_INTRISE8,		8
	.EQU	GPIOB_INTRISE_INTRISE7,		7
	.EQU	GPIOB_INTRISE_INTRISE6,		6
	.EQU	GPIOB_INTRISE_INTRISE5,		5
	.EQU	GPIOB_INTRISE_INTRISE4,		4
	.EQU	GPIOB_INTRISE_INTRISE3,		3
	.EQU	GPIOB_INTRISE_INTRISE2,		2
	.EQU	GPIOB_INTRISE_INTRISE1,		1
	.EQU	GPIOB_INTRISE_INTRISE0,		0
//  register-------------------------------------
	.EQU	GPIOB_INTFALL,	0x50001048
//  0x5000 1048  GPIOB_INTFALL   Bits-------------------------------------
	.EQU	GPIOB_INTFALL_INTFALL15,		15
	.EQU	GPIOB_INTFALL_INTFALL14,		14
	.EQU	GPIOB_INTFALL_INTFALL13,		13
	.EQU	GPIOB_INTFALL_INTFALL12,		12
	.EQU	GPIOB_INTFALL_INTFALL11,		11
	.EQU	GPIOB_INTFALL_INTFALL10,		10
	.EQU	GPIOB_INTFALL_INTFALL9,		9
	.EQU	GPIOB_INTFALL_INTFALL8,		8
	.EQU	GPIOB_INTFALL_INTFALL7,		7
	.EQU	GPIOB_INTFALL_INTFALL6,		6
	.EQU	GPIOB_INTFALL_INTFALL5,		5
	.EQU	GPIOB_INTFALL_INTFALL4,		4
	.EQU	GPIOB_INTFALL_INTFALL3,		3
	.EQU	GPIOB_INTFALL_INTFALL2,		2
	.EQU	GPIOB_INTFALL_INTFALL1,		1
	.EQU	GPIOB_INTFALL_INTFALL0,		0
//  register-------------------------------------
	.EQU	GPIOB_INTIE,	0x5000104C
//  0x5000 104C  GPIOB_INTIE   Bits-------------------------------------
	.EQU	GPIOB_INTIE_INTIE15,		15
	.EQU	GPIOB_INTIE_INTIE14,		14
	.EQU	GPIOB_INTIE_INTIE13,		13
	.EQU	GPIOB_INTIE_INTIE12,		12
	.EQU	GPIOB_INTIE_INTIE11,		11
	.EQU	GPIOB_INTIE_INTIE10,		10
	.EQU	GPIOB_INTIE_INTIE9,		9
	.EQU	GPIOB_INTIE_INTIE8,		8
	.EQU	GPIOB_INTIE_INTIE7,		7
	.EQU	GPIOB_INTIE_INTIE6,		6
	.EQU	GPIOB_INTIE_INTIE5,		5
	.EQU	GPIOB_INTIE_INTIE4,		4
	.EQU	GPIOB_INTIE_INTIE3,		3
	.EQU	GPIOB_INTIE_INTIE2,		2
	.EQU	GPIOB_INTIE_INTIE1,		1
	.EQU	GPIOB_INTIE_INTIE0,		0
//  register-------------------------------------
	.EQU	GPIOB_INTIF,	0x50001050
//  0x5000 1050  GPIOB_INTIF   Bits-------------------------------------
	.EQU	GPIOB_INTIF_INTFLAG15,		15
	.EQU	GPIOB_INTIF_INTFLAG14,		14
	.EQU	GPIOB_INTIF_INTFLAG13,		13
	.EQU	GPIOB_INTIF_INTFLAG12,		12
	.EQU	GPIOB_INTIF_INTFLAG11,		11
	.EQU	GPIOB_INTIF_INTFLAG10,		10
	.EQU	GPIOB_INTIF_INTFLAG9,		9
	.EQU	GPIOB_INTIF_INTFLAG8,		8
	.EQU	GPIOB_INTIF_INTFLAG7,		7
	.EQU	GPIOB_INTIF_INTFLAG6,		6
	.EQU	GPIOB_INTIF_INTFLAG5,		5
	.EQU	GPIOB_INTIF_INTFLAG4,		4
	.EQU	GPIOB_INTIF_INTFLAG3,		3
	.EQU	GPIOB_INTIF_INTFLAG2,		2
	.EQU	GPIOB_INTIF_INTFLAG1,		1
	.EQU	GPIOB_INTIF_INTFLAG0,		0
//  register-------------------------------------
	.EQU	IONMI_CTLR,	0x5000107C
//  0x5000 107C  IONMI_CTLR   Bits-------------------------------------
	.EQU	IONMI_CTLR_IONMIIF,		14
	.EQU	IONMI_CTLR_IONMIIC,		13
	.EQU	IONMI_CTLR_FLTCKS,		12
	.EQU	IONMI_CTLR_FLTEN,		11
	.EQU	IONMI_CTLR_IRQMS2,		10
	.EQU	IONMI_CTLR_IRQMS1,		9
	.EQU	IONMI_CTLR_IRQMS0,		8
	.EQU	IONMI_CTLR_FCKDIV2,		6
	.EQU	IONMI_CTLR_FCKDIV1,		5
	.EQU	IONMI_CTLR_FCKDIV0,		4
	.EQU	IONMI_CTLR_FLTWR2,		3
	.EQU	IONMI_CTLR_FLTWR1,		2
	.EQU	IONMI_CTLR_FLTWR0,		1
	.EQU	IONMI_CTLR_IONMIEN,		0
//  register-------------------------------------
	.EQU	GPIOC_INTMS,	0x50001080
//  0x5000 1080  GPIOC_INTMS   Bits-------------------------------------
	.EQU	GPIOC_INTMS_INTMS15,		15
	.EQU	GPIOC_INTMS_INTMS14,		14
	.EQU	GPIOC_INTMS_INTMS13,		13
	.EQU	GPIOC_INTMS_INTMS12,		12
	.EQU	GPIOC_INTMS_INTMS11,		11
	.EQU	GPIOC_INTMS_INTMS10,		10
	.EQU	GPIOC_INTMS_INTMS9,		9
	.EQU	GPIOC_INTMS_INTMS8,		8
	.EQU	GPIOC_INTMS_INTMS7,		7
	.EQU	GPIOC_INTMS_INTMS6,		6
	.EQU	GPIOC_INTMS_INTMS5,		5
	.EQU	GPIOC_INTMS_INTMS4,		4
	.EQU	GPIOC_INTMS_INTMS3,		3
	.EQU	GPIOC_INTMS_INTMS2,		2
	.EQU	GPIOC_INTMS_INTMS1,		1
	.EQU	GPIOC_INTMS_INTMS0,		0
//  register-------------------------------------
	.EQU	GPIOC_INTRISE,	0x50001084
//  0x5000 1084  GPIOC_INTRISE   Bits-------------------------------------
	.EQU	GPIOC_INTRISE_INTRISE15,		15
	.EQU	GPIOC_INTRISE_INTRISE14,		14
	.EQU	GPIOC_INTRISE_INTRISE13,		13
	.EQU	GPIOC_INTRISE_INTRISE12,		12
	.EQU	GPIOC_INTRISE_INTRISE11,		11
	.EQU	GPIOC_INTRISE_INTRISE10,		10
	.EQU	GPIOC_INTRISE_INTRISE9,		9
	.EQU	GPIOC_INTRISE_INTRISE8,		8
	.EQU	GPIOC_INTRISE_INTRISE7,		7
	.EQU	GPIOC_INTRISE_INTRISE6,		6
	.EQU	GPIOC_INTRISE_INTRISE5,		5
	.EQU	GPIOC_INTRISE_INTRISE4,		4
	.EQU	GPIOC_INTRISE_INTRISE3,		3
	.EQU	GPIOC_INTRISE_INTRISE2,		2
	.EQU	GPIOC_INTRISE_INTRISE1,		1
	.EQU	GPIOC_INTRISE_INTRISE0,		0
//  register-------------------------------------
	.EQU	GPIOC_INTFALL,	0x50001088
//  0x5000 1088  GPIOC_INTFALL   Bits-------------------------------------
	.EQU	GPIOC_INTFALL_INTFALL15,		15
	.EQU	GPIOC_INTFALL_INTFALL14,		14
	.EQU	GPIOC_INTFALL_INTFALL13,		13
	.EQU	GPIOC_INTFALL_INTFALL12,		12
	.EQU	GPIOC_INTFALL_INTFALL11,		11
	.EQU	GPIOC_INTFALL_INTFALL10,		10
	.EQU	GPIOC_INTFALL_INTFALL9,		9
	.EQU	GPIOC_INTFALL_INTFALL8,		8
	.EQU	GPIOC_INTFALL_INTFALL7,		7
	.EQU	GPIOC_INTFALL_INTFALL6,		6
	.EQU	GPIOC_INTFALL_INTFALL5,		5
	.EQU	GPIOC_INTFALL_INTFALL4,		4
	.EQU	GPIOC_INTFALL_INTFALL3,		3
	.EQU	GPIOC_INTFALL_INTFALL2,		2
	.EQU	GPIOC_INTFALL_INTFALL1,		1
	.EQU	GPIOC_INTFALL_INTFALL0,		0
//  register-------------------------------------
	.EQU	GPIOC_INTIE,	0x5000108C
//  0x5000 108C  GPIOC_INTIE   Bits-------------------------------------
	.EQU	GPIOC_INTIE_INTIE15,		15
	.EQU	GPIOC_INTIE_INTIE14,		14
	.EQU	GPIOC_INTIE_INTIE13,		13
	.EQU	GPIOC_INTIE_INTIE12,		12
	.EQU	GPIOC_INTIE_INTIE11,		11
	.EQU	GPIOC_INTIE_INTIE10,		10
	.EQU	GPIOC_INTIE_INTIE9,		9
	.EQU	GPIOC_INTIE_INTIE8,		8
	.EQU	GPIOC_INTIE_INTIE7,		7
	.EQU	GPIOC_INTIE_INTIE6,		6
	.EQU	GPIOC_INTIE_INTIE5,		5
	.EQU	GPIOC_INTIE_INTIE4,		4
	.EQU	GPIOC_INTIE_INTIE3,		3
	.EQU	GPIOC_INTIE_INTIE2,		2
	.EQU	GPIOC_INTIE_INTIE1,		1
	.EQU	GPIOC_INTIE_INTIE0,		0
//  register-------------------------------------
	.EQU	GPIOC_INTIF,	0x50001090
//  0x5000 1090  GPIOC_INTIF   Bits-------------------------------------
	.EQU	GPIOC_INTIF_INTFLAG15,		15
	.EQU	GPIOC_INTIF_INTFLAG14,		14
	.EQU	GPIOC_INTIF_INTFLAG13,		13
	.EQU	GPIOC_INTIF_INTFLAG12,		12
	.EQU	GPIOC_INTIF_INTFLAG11,		11
	.EQU	GPIOC_INTIF_INTFLAG10,		10
	.EQU	GPIOC_INTIF_INTFLAG9,		9
	.EQU	GPIOC_INTIF_INTFLAG8,		8
	.EQU	GPIOC_INTIF_INTFLAG7,		7
	.EQU	GPIOC_INTIF_INTFLAG6,		6
	.EQU	GPIOC_INTIF_INTFLAG5,		5
	.EQU	GPIOC_INTIF_INTFLAG4,		4
	.EQU	GPIOC_INTIF_INTFLAG3,		3
	.EQU	GPIOC_INTIF_INTFLAG2,		2
	.EQU	GPIOC_INTIF_INTFLAG1,		1
	.EQU	GPIOC_INTIF_INTFLAG0,		0
//  register-------------------------------------
	.EQU	GPIOD_INTMS,	0x500010C0
//  0x5000 10C0  GPIOD_INTMS   Bits-------------------------------------
	.EQU	GPIOD_INTMS_INTMS15,		15
	.EQU	GPIOD_INTMS_INTMS14,		14
	.EQU	GPIOD_INTMS_INTMS13,		13
	.EQU	GPIOD_INTMS_INTMS12,		12
	.EQU	GPIOD_INTMS_INTMS11,		11
	.EQU	GPIOD_INTMS_INTMS10,		10
	.EQU	GPIOD_INTMS_INTMS9,		9
	.EQU	GPIOD_INTMS_INTMS8,		8
	.EQU	GPIOD_INTMS_INTMS7,		7
	.EQU	GPIOD_INTMS_INTMS6,		6
	.EQU	GPIOD_INTMS_INTMS5,		5
	.EQU	GPIOD_INTMS_INTMS4,		4
	.EQU	GPIOD_INTMS_INTMS3,		3
	.EQU	GPIOD_INTMS_INTMS2,		2
	.EQU	GPIOD_INTMS_INTMS1,		1
	.EQU	GPIOD_INTMS_INTMS0,		0
//  register-------------------------------------
	.EQU	GPIOD_INTRISE,	0x500010C4
//  0x5000 10C4  GPIOD_INTRISE   Bits-------------------------------------
	.EQU	GPIOD_INTRISE_INTRISE15,		15
	.EQU	GPIOD_INTRISE_INTRISE14,		14
	.EQU	GPIOD_INTRISE_INTRISE13,		13
	.EQU	GPIOD_INTRISE_INTRISE12,		12
	.EQU	GPIOD_INTRISE_INTRISE11,		11
	.EQU	GPIOD_INTRISE_INTRISE10,		10
	.EQU	GPIOD_INTRISE_INTRISE9,		9
	.EQU	GPIOD_INTRISE_INTRISE8,		8
	.EQU	GPIOD_INTRISE_INTRISE7,		7
	.EQU	GPIOD_INTRISE_INTRISE6,		6
	.EQU	GPIOD_INTRISE_INTRISE5,		5
	.EQU	GPIOD_INTRISE_INTRISE4,		4
	.EQU	GPIOD_INTRISE_INTRISE3,		3
	.EQU	GPIOD_INTRISE_INTRISE2,		2
	.EQU	GPIOD_INTRISE_INTRISE1,		1
	.EQU	GPIOD_INTRISE_INTRISE0,		0
//  register-------------------------------------
	.EQU	GPIOD_INTFALL,	0x500010C8
//  0x5000 10C8  GPIOD_INTFALL   Bits-------------------------------------
	.EQU	GPIOD_INTFALL_INTFALL15,		15
	.EQU	GPIOD_INTFALL_INTFALL14,		14
	.EQU	GPIOD_INTFALL_INTFALL13,		13
	.EQU	GPIOD_INTFALL_INTFALL12,		12
	.EQU	GPIOD_INTFALL_INTFALL11,		11
	.EQU	GPIOD_INTFALL_INTFALL10,		10
	.EQU	GPIOD_INTFALL_INTFALL9,		9
	.EQU	GPIOD_INTFALL_INTFALL8,		8
	.EQU	GPIOD_INTFALL_INTFALL7,		7
	.EQU	GPIOD_INTFALL_INTFALL6,		6
	.EQU	GPIOD_INTFALL_INTFALL5,		5
	.EQU	GPIOD_INTFALL_INTFALL4,		4
	.EQU	GPIOD_INTFALL_INTFALL3,		3
	.EQU	GPIOD_INTFALL_INTFALL2,		2
	.EQU	GPIOD_INTFALL_INTFALL1,		1
	.EQU	GPIOD_INTFALL_INTFALL0,		0
//  register-------------------------------------
	.EQU	GPIOD_INTIE,	0x500010CC
//  0x5000 10CC  GPIOD_INTIE   Bits-------------------------------------
	.EQU	GPIOD_INTIE_INTIE15,		15
	.EQU	GPIOD_INTIE_INTIE14,		14
	.EQU	GPIOD_INTIE_INTIE13,		13
	.EQU	GPIOD_INTIE_INTIE12,		12
	.EQU	GPIOD_INTIE_INTIE11,		11
	.EQU	GPIOD_INTIE_INTIE10,		10
	.EQU	GPIOD_INTIE_INTIE9,		9
	.EQU	GPIOD_INTIE_INTIE8,		8
	.EQU	GPIOD_INTIE_INTIE7,		7
	.EQU	GPIOD_INTIE_INTIE6,		6
	.EQU	GPIOD_INTIE_INTIE5,		5
	.EQU	GPIOD_INTIE_INTIE4,		4
	.EQU	GPIOD_INTIE_INTIE3,		3
	.EQU	GPIOD_INTIE_INTIE2,		2
	.EQU	GPIOD_INTIE_INTIE1,		1
	.EQU	GPIOD_INTIE_INTIE0,		0
//  register-------------------------------------
	.EQU	GPIOD_INTIF,	0x500010D0
//  0x5000 10D0  GPIOD_INTIF   Bits-------------------------------------
	.EQU	GPIOD_INTIF_INTFLAG15,		15
	.EQU	GPIOD_INTIF_INTFLAG14,		14
	.EQU	GPIOD_INTIF_INTFLAG13,		13
	.EQU	GPIOD_INTIF_INTFLAG12,		12
	.EQU	GPIOD_INTIF_INTFLAG11,		11
	.EQU	GPIOD_INTIF_INTFLAG10,		10
	.EQU	GPIOD_INTIF_INTFLAG9,		9
	.EQU	GPIOD_INTIF_INTFLAG8,		8
	.EQU	GPIOD_INTIF_INTFLAG7,		7
	.EQU	GPIOD_INTIF_INTFLAG6,		6
	.EQU	GPIOD_INTIF_INTFLAG5,		5
	.EQU	GPIOD_INTIF_INTFLAG4,		4
	.EQU	GPIOD_INTIF_INTFLAG3,		3
	.EQU	GPIOD_INTIF_INTFLAG2,		2
	.EQU	GPIOD_INTIF_INTFLAG1,		1
	.EQU	GPIOD_INTIF_INTFLAG0,		0
//  register-------------------------------------
	.EQU	OSC_CTL0,		0x40001000
//  0x4000 1000  OSC_CTL0   Bits-------------------------------------
	.EQU	OSC_CTL0_LKDTEN,		29
	.EQU	OSC_CTL0_PLL0DIV,		28
	.EQU	OSC_CTL0_LFCKDIV2,		26
	.EQU	OSC_CTL0_LFCKDIV1,		25
	.EQU	OSC_CTL0_LFCKDIV0,		24
	.EQU	OSC_CTL0_HFCKDIV3,		23
	.EQU	OSC_CTL0_HFCKDIV2,		22
	.EQU	OSC_CTL0_HFCKDIV1,		21
	.EQU	OSC_CTL0_HFCKDIV0,		20
	.EQU	OSC_CTL0_SCKDIV2,		18
	.EQU	OSC_CTL0_SCKDIV1,		17
	.EQU	OSC_CTL0_SCKDIV0,		16
	.EQU	OSC_CTL0_PLLCKS1,		13
	.EQU	OSC_CTL0_PLLCKS0,		12
	.EQU	OSC_CTL0_HFCKS2,		11
	.EQU	OSC_CTL0_HFCKS1,		10
	.EQU	OSC_CTL0_HFCKS0,		9
	.EQU	OSC_CTL0_HFCKEN,		8
	.EQU	OSC_CTL0_LFCKS1,		7
	.EQU	OSC_CTL0_LFCKS0,		6
	.EQU	OSC_CTL0_LFCKEN,		4
	.EQU	OSC_CTL0_SCKS2,		3
	.EQU	OSC_CTL0_SCKS1,		2
	.EQU	OSC_CTL0_SCKS0,		1
	.EQU	OSC_CTL0_PMWREN,		0
//  register-------------------------------------
	.EQU	OSC_CTL1,		0x40001004
//  0x4000 1004  OSC_CTL1   Bits-------------------------------------
	.EQU	OSC_CTL1_CLKOUTDIV2,		31
	.EQU	OSC_CTL1_CLKOUTDIV1,		30
	.EQU	OSC_CTL1_CLKOUTDIV0,		29
	.EQU	OSC_CTL1_CLKOE,		28
	.EQU	OSC_CTL1_CLKOUTS3,		27
	.EQU	OSC_CTL1_CLKOUTS2,		26
	.EQU	OSC_CTL1_CLKOUTS1,		25
	.EQU	OSC_CTL1_CLKOUTS0,		24
	.EQU	OSC_CTL1_FSCMS2,		23
	.EQU	OSC_CTL1_FSCMS1,		22
	.EQU	OSC_CTL1_FSCMS0,		21
	.EQU	OSC_CTL1_FSCMGAP2,		19
	.EQU	OSC_CTL1_FSCMGAP1,		18
	.EQU	OSC_CTL1_FSCMGAP0,		17
	.EQU	OSC_CTL1_FSCM,		16
	.EQU	OSC_CTL1_SCLKPMCDIV1,		15
	.EQU	OSC_CTL1_SCLKPMCDIV0,		14
	.EQU	OSC_CTL1_HSEHYEN,		5
	.EQU	OSC_CTL1_TESTEN_STOP,		4
//  register-------------------------------------
	.EQU	OSC_INT,		0x40001008
//  0x4000 1008  OSC_INT   Bits-------------------------------------
	.EQU	OSC_INT_HSIVAFIE,		13
	.EQU	OSC_INT_PLL0IE,		12
	.EQU	OSC_INT_EHFIE,		11
	.EQU	OSC_INT_IHFIE,		9
	.EQU	OSC_INT_ILFIE,		8
	.EQU	OSC_INT_CKFIF,		7
	.EQU	OSC_INT_HSIVAFIF,		5
	.EQU	OSC_INT_PLL0IF,		4
	.EQU	OSC_INT_EHFIF,		3
	.EQU	OSC_INT_IHFIF,		1
	.EQU	OSC_INT_ILFIF,		0
//  register-------------------------------------
	.EQU	OSC_CTL2,		0x4000100C
//  0x4000 100C  OSC_CTL2   Bits-------------------------------------
	.EQU	OSC_CTL2_HSIVAFDLY3,		31
	.EQU	OSC_CTL2_HSIVAFDLY2,		30
	.EQU	OSC_CTL2_HSIVAFDLY1,		29
	.EQU	OSC_CTL2_HSIVAFDLY0,		28
	.EQU	OSC_CTL2_PLL0DLY3,		27
	.EQU	OSC_CTL2_PLL0DLY2,		26
	.EQU	OSC_CTL2_PLL0DLY1,		25
	.EQU	OSC_CTL2_PLL0DLY0,		24
	.EQU	OSC_CTL2_EHFDLY3,		23
	.EQU	OSC_CTL2_EHFDLY2,		22
	.EQU	OSC_CTL2_EHFDLY1,		21
	.EQU	OSC_CTL2_EHFDLY0,		20
	.EQU	OSC_CTL2_IHFDLY3,		15
	.EQU	OSC_CTL2_IHFDLY2,		14
	.EQU	OSC_CTL2_IHFDLY1,		13
	.EQU	OSC_CTL2_IHFDLY0,		12
	.EQU	OSC_CTL2_ILFDLY3,		11
	.EQU	OSC_CTL2_ILFDLY2,		10
	.EQU	OSC_CTL2_ILFDLY1,		9
	.EQU	OSC_CTL2_ILFDLY0,		8
	.EQU	OSC_CTL2_HSIVAFSWEN,		5
	.EQU	OSC_CTL2_PLL0SWEN,		4
	.EQU	OSC_CTL2_EXTHFSWEN,		3
	.EQU	OSC_CTL2_INTHFSWEN,		1
	.EQU	OSC_CTL2_INTLFSWEN,		0
//  register-------------------------------------
	.EQU	OSC_CTL3,		0x40001018
//  0x4000 1018  OSC_CTL3   Bits-------------------------------------
	.EQU	OSC_CTL3_XTHR200K,		11
	.EQU	OSC_CTL3_XTHR470K,		10
	.EQU	OSC_CTL3_XTHR1M,		9
	.EQU	OSC_CTL3_GMBOOST3,		5
	.EQU	OSC_CTL3_GMBOOST2,		4
	.EQU	OSC_CTL3_GMBOOST1,		3
	.EQU	OSC_CTL3_GMBOOST0,		2
	.EQU	OSC_CTL3_HSXTALEXEN,		0
//  register-------------------------------------
	.EQU	OSC_HF2CTL,	0x40001020
//  0x4000 1020  OSC_HF2CTL   Bits-------------------------------------
	.EQU	OSC_HF2CTL_EWDTCTL_WEN,		4
	.EQU	OSC_HF2CTL_WWDTCTL_WEN,		3
	.EQU	OSC_HF2CTL_IWDTCTL_WEN,		2
	.EQU	OSC_HF2CTL_PMCAL_WEN,		1
	.EQU	OSC_HF2CTL_PMCTL_WEN,		0
//  register-------------------------------------
	.EQU	OSC_HF2OSCCAL,	0x40001024
//  register-------------------------------------
	.EQU	OSC_HF3CTL,	0x40001030
//  0x4000 1030  OSC_HF3CTL   Bits-------------------------------------
	.EQU	OSC_HF3CTL_OSCSEL,		27
	.EQU	OSC_HF3CTL_VREF1VOEN,		16
	.EQU	OSC_HF3CTL_FVRCAPLESSOEN,		13
	.EQU	OSC_HF3CTL_FVRCAPLESSMONEN,		12
	.EQU	OSC_HF3CTL_RAMBPOWOEN,		10
	.EQU	OSC_HF3CTL_LPPHERIOEN,		8
	.EQU	OSC_HF3CTL_FLASHPOWOEN,		7
	.EQU	OSC_HF3CTL_VCOREOEN,		6
//  register-------------------------------------
	.EQU	OSC_HF3OSCCAL,	0x40001034
//  0x4000 1034  OSC_HF3OSCCAL   Bits-------------------------------------
	.EQU	OSC_HF3OSCCAL_TST_SEL4,		28
	.EQU	OSC_HF3OSCCAL_TST_SEL3,		27
	.EQU	OSC_HF3OSCCAL_TST_SEL2,		26
	.EQU	OSC_HF3OSCCAL_TST_SEL1,		25
	.EQU	OSC_HF3OSCCAL_TST_SEL0,		24
	.EQU	OSC_HF3OSCCAL_FREQPLUS,		23
	.EQU	OSC_HF3OSCCAL_LDO_1P2OR1P3,		22
	.EQU	OSC_HF3OSCCAL_EN_VAFOSC,		21
	.EQU	OSC_HF3OSCCAL_COMP_BIAS1,		20
	.EQU	OSC_HF3OSCCAL_COMP_BIAS0,		19
	.EQU	OSC_HF3OSCCAL_CKTC5,		18
	.EQU	OSC_HF3OSCCAL_CKTC4,		17
	.EQU	OSC_HF3OSCCAL_CKTC3,		16
	.EQU	OSC_HF3OSCCAL_CKTC2,		15
	.EQU	OSC_HF3OSCCAL_CKTC1,		14
	.EQU	OSC_HF3OSCCAL_CKTC0,		13
	.EQU	OSC_HF3OSCCAL_CKCAL10,		12
	.EQU	OSC_HF3OSCCAL_CKCAL9,		11
	.EQU	OSC_HF3OSCCAL_CKCAL8,		10
	.EQU	OSC_HF3OSCCAL_CKCAL7,		9
	.EQU	OSC_HF3OSCCAL_CKCAL6,		8
	.EQU	OSC_HF3OSCCAL_CKCAL5,		7
	.EQU	OSC_HF3OSCCAL_CKCAL4,		6
	.EQU	OSC_HF3OSCCAL_CKCAL3,		5
	.EQU	OSC_HF3OSCCAL_CKCAL2,		4
	.EQU	OSC_HF3OSCCAL_CKCAL1,		3
	.EQU	OSC_HF3OSCCAL_CKCAL0,		2
	.EQU	OSC_HF3OSCCAL_LDO_HPMODE,		1
	.EQU	OSC_HF3OSCCAL_EN_CKTC,		0
//  register-------------------------------------
	.EQU	PLL0_CTL,		0x40001200
//  0x4000 1200  PLL0_CTL   Bits-------------------------------------
	.EQU	PLL0_CTL_OD1,		21
	.EQU	PLL0_CTL_OD0,		20
	.EQU	PLL0_CTL_N3,		19
	.EQU	PLL0_CTL_N2,		18
	.EQU	PLL0_CTL_N1,		17
	.EQU	PLL0_CTL_N0,		16
	.EQU	PLL0_CTL_M13,		15
	.EQU	PLL0_CTL_M12,		14
	.EQU	PLL0_CTL_M11,		13
	.EQU	PLL0_CTL_M10,		12
	.EQU	PLL0_CTL_M9,		11
	.EQU	PLL0_CTL_M8,		10
	.EQU	PLL0_CTL_M7,		9
	.EQU	PLL0_CTL_M6,		8
	.EQU	PLL0_CTL_M5,		7
	.EQU	PLL0_CTL_M4,		6
	.EQU	PLL0_CTL_M3,		5
	.EQU	PLL0_CTL_M2,		4
	.EQU	PLL0_CTL_M1,		3
	.EQU	PLL0_CTL_M0,		2
	.EQU	PLL0_CTL_PDRST,		0
//  register-------------------------------------
	.EQU	MPU_CTLESR,	0x40001600
//  0x4000 1600  MPU_CTLESR   Bits-------------------------------------
	.EQU	MPU_CTLESR_SPERIF3,		23
	.EQU	MPU_CTLESR_SPERIF2,		22
	.EQU	MPU_CTLESR_SPERIF1,		21
	.EQU	MPU_CTLESR_SPERIF0,		20
	.EQU	MPU_CTLESR_MPUEN,		0
//  register-------------------------------------
	.EQU	MPU_IER,		0x40001604
//  0x4000 1604  MPU_IER   Bits-------------------------------------
	.EQU	MPU_IER_SPERIC3,		19
	.EQU	MPU_IER_SPERIC2,		18
	.EQU	MPU_IER_SPERIC1,		17
	.EQU	MPU_IER_SPERIC0,		16
//  register-------------------------------------
	.EQU	MPU_IDR,		0x40001A08
//  0x4000 1A08  MPU_IDR   Bits-------------------------------------
	.EQU	MPU_IDR_CPID7,		7
	.EQU	MPU_IDR_CPID6,		6
	.EQU	MPU_IDR_CPID5,		5
	.EQU	MPU_IDR_CPID4,		4
	.EQU	MPU_IDR_CPID3,		3
	.EQU	MPU_IDR_CPID2,		2
	.EQU	MPU_IDR_CPID1,		1
	.EQU	MPU_IDR_CPID0,		0
//  register-------------------------------------
	.EQU	MPU_ERRARS0,	0x40001610
//  0x4000 1610  MPU_ERRARS0   Bits-------------------------------------
	.EQU	MPU_ERRARS0_ERRADDR31,		31
	.EQU	MPU_ERRARS0_ERRADDR30,		30
	.EQU	MPU_ERRARS0_ERRADDR29,		29
	.EQU	MPU_ERRARS0_ERRADDR28,		28
	.EQU	MPU_ERRARS0_ERRADDR27,		27
	.EQU	MPU_ERRARS0_ERRADDR26,		26
	.EQU	MPU_ERRARS0_ERRADDR25,		25
	.EQU	MPU_ERRARS0_ERRADDR24,		24
	.EQU	MPU_ERRARS0_ERRADDR23,		23
	.EQU	MPU_ERRARS0_ERRADDR22,		22
	.EQU	MPU_ERRARS0_ERRADDR21,		21
	.EQU	MPU_ERRARS0_ERRADDR20,		20
	.EQU	MPU_ERRARS0_ERRADDR19,		19
	.EQU	MPU_ERRARS0_ERRADDR18,		18
	.EQU	MPU_ERRARS0_ERRADDR17,		17
	.EQU	MPU_ERRARS0_ERRADDR16,		16
	.EQU	MPU_ERRARS0_ERRADDR15,		15
	.EQU	MPU_ERRARS0_ERRADDR14,		14
	.EQU	MPU_ERRARS0_ERRADDR13,		13
	.EQU	MPU_ERRARS0_ERRADDR12,		12
	.EQU	MPU_ERRARS0_ERRADDR11,		11
	.EQU	MPU_ERRARS0_ERRADDR10,		10
	.EQU	MPU_ERRARS0_ERRADDR9,		9
	.EQU	MPU_ERRARS0_ERRADDR8,		8
	.EQU	MPU_ERRARS0_ERRADDR7,		7
	.EQU	MPU_ERRARS0_ERRADDR6,		6
	.EQU	MPU_ERRARS0_ERRADDR5,		5
	.EQU	MPU_ERRARS0_ERRADDR4,		4
	.EQU	MPU_ERRARS0_ERRADDR3,		3
	.EQU	MPU_ERRARS0_ERRADDR2,		2
	.EQU	MPU_ERRARS0_ERRADDR1,		1
	.EQU	MPU_ERRARS0_ERRADDR0,		0
//  register-------------------------------------
	.EQU	MPU_ERRDRS0,	0x40001614
//  0x4000 1614  MPU_ERRDRS0   Bits-------------------------------------
	.EQU	MPU_ERRDRS0_ERRACD15,		31
	.EQU	MPU_ERRDRS0_ERRACD14,		30
	.EQU	MPU_ERRDRS0_ERRACD13,		29
	.EQU	MPU_ERRDRS0_ERRACD12,		28
	.EQU	MPU_ERRDRS0_ERRACD11,		27
	.EQU	MPU_ERRDRS0_ERRACD10,		26
	.EQU	MPU_ERRDRS0_ERRACD9,		25
	.EQU	MPU_ERRDRS0_ERRACD8,		24
	.EQU	MPU_ERRDRS0_ERRACD7,		23
	.EQU	MPU_ERRDRS0_ERRACD6,		22
	.EQU	MPU_ERRDRS0_ERRACD5,		21
	.EQU	MPU_ERRDRS0_ERRACD4,		20
	.EQU	MPU_ERRDRS0_ERRACD3,		19
	.EQU	MPU_ERRDRS0_ERRACD2,		18
	.EQU	MPU_ERRDRS0_ERRACD1,		17
	.EQU	MPU_ERRDRS0_ERRACD0,		16
	.EQU	MPU_ERRDRS0_ERRPID7,		15
	.EQU	MPU_ERRDRS0_ERRPID6,		14
	.EQU	MPU_ERRDRS0_ERRPID5,		13
	.EQU	MPU_ERRDRS0_ERRPID4,		12
	.EQU	MPU_ERRDRS0_ERRPID3,		11
	.EQU	MPU_ERRDRS0_ERRPID2,		10
	.EQU	MPU_ERRDRS0_ERRPID1,		9
	.EQU	MPU_ERRDRS0_ERRPID0,		8
	.EQU	MPU_ERRDRS0_ERRMNU3,		7
	.EQU	MPU_ERRDRS0_ERRMNU2,		6
	.EQU	MPU_ERRDRS0_ERRMNU1,		5
	.EQU	MPU_ERRDRS0_ERRMNU0,		4
	.EQU	MPU_ERRDRS0_ERRATR2,		3
	.EQU	MPU_ERRDRS0_ERRATR1,		2
	.EQU	MPU_ERRDRS0_ERRATR0,		1
	.EQU	MPU_ERRDRS0_ERRRW,		0
//  register-------------------------------------
	.EQU	MPU_ERRARS1,	0x40001618
//  0x4000 1618  MPU_ERRARS1   Bits-------------------------------------
	.EQU	MPU_ERRARS1_ERRADDR31,		31
	.EQU	MPU_ERRARS1_ERRADDR30,		30
	.EQU	MPU_ERRARS1_ERRADDR29,		29
	.EQU	MPU_ERRARS1_ERRADDR28,		28
	.EQU	MPU_ERRARS1_ERRADDR27,		27
	.EQU	MPU_ERRARS1_ERRADDR26,		26
	.EQU	MPU_ERRARS1_ERRADDR25,		25
	.EQU	MPU_ERRARS1_ERRADDR24,		24
	.EQU	MPU_ERRARS1_ERRADDR23,		23
	.EQU	MPU_ERRARS1_ERRADDR22,		22
	.EQU	MPU_ERRARS1_ERRADDR21,		21
	.EQU	MPU_ERRARS1_ERRADDR20,		20
	.EQU	MPU_ERRARS1_ERRADDR19,		19
	.EQU	MPU_ERRARS1_ERRADDR18,		18
	.EQU	MPU_ERRARS1_ERRADDR17,		17
	.EQU	MPU_ERRARS1_ERRADDR16,		16
	.EQU	MPU_ERRARS1_ERRADDR15,		15
	.EQU	MPU_ERRARS1_ERRADDR14,		14
	.EQU	MPU_ERRARS1_ERRADDR13,		13
	.EQU	MPU_ERRARS1_ERRADDR12,		12
	.EQU	MPU_ERRARS1_ERRADDR11,		11
	.EQU	MPU_ERRARS1_ERRADDR10,		10
	.EQU	MPU_ERRARS1_ERRADDR9,		9
	.EQU	MPU_ERRARS1_ERRADDR8,		8
	.EQU	MPU_ERRARS1_ERRADDR7,		7
	.EQU	MPU_ERRARS1_ERRADDR6,		6
	.EQU	MPU_ERRARS1_ERRADDR5,		5
	.EQU	MPU_ERRARS1_ERRADDR4,		4
	.EQU	MPU_ERRARS1_ERRADDR3,		3
	.EQU	MPU_ERRARS1_ERRADDR2,		2
	.EQU	MPU_ERRARS1_ERRADDR1,		1
	.EQU	MPU_ERRARS1_ERRADDR0,		0
//  register-------------------------------------
	.EQU	MPU_ERRDRS1,	0x4000161C
//  0x4000 161C  MPU_ERRDRS1   Bits-------------------------------------
	.EQU	MPU_ERRDRS1_ERRACD15,		31
	.EQU	MPU_ERRDRS1_ERRACD14,		30
	.EQU	MPU_ERRDRS1_ERRACD13,		29
	.EQU	MPU_ERRDRS1_ERRACD12,		28
	.EQU	MPU_ERRDRS1_ERRACD11,		27
	.EQU	MPU_ERRDRS1_ERRACD10,		26
	.EQU	MPU_ERRDRS1_ERRACD9,		25
	.EQU	MPU_ERRDRS1_ERRACD8,		24
	.EQU	MPU_ERRDRS1_ERRACD7,		23
	.EQU	MPU_ERRDRS1_ERRACD6,		22
	.EQU	MPU_ERRDRS1_ERRACD5,		21
	.EQU	MPU_ERRDRS1_ERRACD4,		20
	.EQU	MPU_ERRDRS1_ERRACD3,		19
	.EQU	MPU_ERRDRS1_ERRACD2,		18
	.EQU	MPU_ERRDRS1_ERRACD1,		17
	.EQU	MPU_ERRDRS1_ERRACD0,		16
	.EQU	MPU_ERRDRS1_ERRPID7,		15
	.EQU	MPU_ERRDRS1_ERRPID6,		14
	.EQU	MPU_ERRDRS1_ERRPID5,		13
	.EQU	MPU_ERRDRS1_ERRPID4,		12
	.EQU	MPU_ERRDRS1_ERRPID3,		11
	.EQU	MPU_ERRDRS1_ERRPID2,		10
	.EQU	MPU_ERRDRS1_ERRPID1,		9
	.EQU	MPU_ERRDRS1_ERRPID0,		8
	.EQU	MPU_ERRDRS1_ERRMNU3,		7
	.EQU	MPU_ERRDRS1_ERRMNU2,		6
	.EQU	MPU_ERRDRS1_ERRMNU1,		5
	.EQU	MPU_ERRDRS1_ERRMNU0,		4
	.EQU	MPU_ERRDRS1_ERRATR2,		3
	.EQU	MPU_ERRDRS1_ERRATR1,		2
	.EQU	MPU_ERRDRS1_ERRATR0,		1
	.EQU	MPU_ERRDRS1_ERRRW,		0
//  register-------------------------------------
	.EQU	MPU_ERRARS2,	0x40001620
//  0x4000 1620  MPU_ERRARS2   Bits-------------------------------------
	.EQU	MPU_ERRARS2_ERRADDR31,		31
	.EQU	MPU_ERRARS2_ERRADDR30,		30
	.EQU	MPU_ERRARS2_ERRADDR29,		29
	.EQU	MPU_ERRARS2_ERRADDR28,		28
	.EQU	MPU_ERRARS2_ERRADDR27,		27
	.EQU	MPU_ERRARS2_ERRADDR26,		26
	.EQU	MPU_ERRARS2_ERRADDR25,		25
	.EQU	MPU_ERRARS2_ERRADDR24,		24
	.EQU	MPU_ERRARS2_ERRADDR23,		23
	.EQU	MPU_ERRARS2_ERRADDR22,		22
	.EQU	MPU_ERRARS2_ERRADDR21,		21
	.EQU	MPU_ERRARS2_ERRADDR20,		20
	.EQU	MPU_ERRARS2_ERRADDR19,		19
	.EQU	MPU_ERRARS2_ERRADDR18,		18
	.EQU	MPU_ERRARS2_ERRADDR17,		17
	.EQU	MPU_ERRARS2_ERRADDR16,		16
	.EQU	MPU_ERRARS2_ERRADDR15,		15
	.EQU	MPU_ERRARS2_ERRADDR14,		14
	.EQU	MPU_ERRARS2_ERRADDR13,		13
	.EQU	MPU_ERRARS2_ERRADDR12,		12
	.EQU	MPU_ERRARS2_ERRADDR11,		11
	.EQU	MPU_ERRARS2_ERRADDR10,		10
	.EQU	MPU_ERRARS2_ERRADDR9,		9
	.EQU	MPU_ERRARS2_ERRADDR8,		8
	.EQU	MPU_ERRARS2_ERRADDR7,		7
	.EQU	MPU_ERRARS2_ERRADDR6,		6
	.EQU	MPU_ERRARS2_ERRADDR5,		5
	.EQU	MPU_ERRARS2_ERRADDR4,		4
	.EQU	MPU_ERRARS2_ERRADDR3,		3
	.EQU	MPU_ERRARS2_ERRADDR2,		2
	.EQU	MPU_ERRARS2_ERRADDR1,		1
	.EQU	MPU_ERRARS2_ERRADDR0,		0
//  register-------------------------------------
	.EQU	MPU_ERRDRS2,	0x40001624
//  0x4000 1624  MPU_ERRDRS2   Bits-------------------------------------
	.EQU	MPU_ERRDRS2_ERRACD15,		31
	.EQU	MPU_ERRDRS2_ERRACD14,		30
	.EQU	MPU_ERRDRS2_ERRACD13,		29
	.EQU	MPU_ERRDRS2_ERRACD12,		28
	.EQU	MPU_ERRDRS2_ERRACD11,		27
	.EQU	MPU_ERRDRS2_ERRACD10,		26
	.EQU	MPU_ERRDRS2_ERRACD9,		25
	.EQU	MPU_ERRDRS2_ERRACD8,		24
	.EQU	MPU_ERRDRS2_ERRACD7,		23
	.EQU	MPU_ERRDRS2_ERRACD6,		22
	.EQU	MPU_ERRDRS2_ERRACD5,		21
	.EQU	MPU_ERRDRS2_ERRACD4,		20
	.EQU	MPU_ERRDRS2_ERRACD3,		19
	.EQU	MPU_ERRDRS2_ERRACD2,		18
	.EQU	MPU_ERRDRS2_ERRACD1,		17
	.EQU	MPU_ERRDRS2_ERRACD0,		16
	.EQU	MPU_ERRDRS2_ERRPID7,		15
	.EQU	MPU_ERRDRS2_ERRPID6,		14
	.EQU	MPU_ERRDRS2_ERRPID5,		13
	.EQU	MPU_ERRDRS2_ERRPID4,		12
	.EQU	MPU_ERRDRS2_ERRPID3,		11
	.EQU	MPU_ERRDRS2_ERRPID2,		10
	.EQU	MPU_ERRDRS2_ERRPID1,		9
	.EQU	MPU_ERRDRS2_ERRPID0,		8
	.EQU	MPU_ERRDRS2_ERRMNU3,		7
	.EQU	MPU_ERRDRS2_ERRMNU2,		6
	.EQU	MPU_ERRDRS2_ERRMNU1,		5
	.EQU	MPU_ERRDRS2_ERRMNU0,		4
	.EQU	MPU_ERRDRS2_ERRATR2,		3
	.EQU	MPU_ERRDRS2_ERRATR1,		2
	.EQU	MPU_ERRDRS2_ERRATR0,		1
	.EQU	MPU_ERRDRS2_ERRRW,		0
//  register-------------------------------------
	.EQU	MPU_ERRARS3,	0x40001628
//  0x4000 1628  MPU_ERRARS3   Bits-------------------------------------
	.EQU	MPU_ERRARS3_ERRADDR31,		31
	.EQU	MPU_ERRARS3_ERRADDR30,		30
	.EQU	MPU_ERRARS3_ERRADDR29,		29
	.EQU	MPU_ERRARS3_ERRADDR28,		28
	.EQU	MPU_ERRARS3_ERRADDR27,		27
	.EQU	MPU_ERRARS3_ERRADDR26,		26
	.EQU	MPU_ERRARS3_ERRADDR25,		25
	.EQU	MPU_ERRARS3_ERRADDR24,		24
	.EQU	MPU_ERRARS3_ERRADDR23,		23
	.EQU	MPU_ERRARS3_ERRADDR22,		22
	.EQU	MPU_ERRARS3_ERRADDR21,		21
	.EQU	MPU_ERRARS3_ERRADDR20,		20
	.EQU	MPU_ERRARS3_ERRADDR19,		19
	.EQU	MPU_ERRARS3_ERRADDR18,		18
	.EQU	MPU_ERRARS3_ERRADDR17,		17
	.EQU	MPU_ERRARS3_ERRADDR16,		16
	.EQU	MPU_ERRARS3_ERRADDR15,		15
	.EQU	MPU_ERRARS3_ERRADDR14,		14
	.EQU	MPU_ERRARS3_ERRADDR13,		13
	.EQU	MPU_ERRARS3_ERRADDR12,		12
	.EQU	MPU_ERRARS3_ERRADDR11,		11
	.EQU	MPU_ERRARS3_ERRADDR10,		10
	.EQU	MPU_ERRARS3_ERRADDR9,		9
	.EQU	MPU_ERRARS3_ERRADDR8,		8
	.EQU	MPU_ERRARS3_ERRADDR7,		7
	.EQU	MPU_ERRARS3_ERRADDR6,		6
	.EQU	MPU_ERRARS3_ERRADDR5,		5
	.EQU	MPU_ERRARS3_ERRADDR4,		4
	.EQU	MPU_ERRARS3_ERRADDR3,		3
	.EQU	MPU_ERRARS3_ERRADDR2,		2
	.EQU	MPU_ERRARS3_ERRADDR1,		1
	.EQU	MPU_ERRARS3_ERRADDR0,		0
//  register-------------------------------------
	.EQU	MPU_ERRDRS3,	0x4000162C
//  0x4000 162C  MPU_ERRDRS3   Bits-------------------------------------
	.EQU	MPU_ERRDRS3_ERRACD15,		31
	.EQU	MPU_ERRDRS3_ERRACD14,		30
	.EQU	MPU_ERRDRS3_ERRACD13,		29
	.EQU	MPU_ERRDRS3_ERRACD12,		28
	.EQU	MPU_ERRDRS3_ERRACD11,		27
	.EQU	MPU_ERRDRS3_ERRACD10,		26
	.EQU	MPU_ERRDRS3_ERRACD9,		25
	.EQU	MPU_ERRDRS3_ERRACD8,		24
	.EQU	MPU_ERRDRS3_ERRACD7,		23
	.EQU	MPU_ERRDRS3_ERRACD6,		22
	.EQU	MPU_ERRDRS3_ERRACD5,		21
	.EQU	MPU_ERRDRS3_ERRACD4,		20
	.EQU	MPU_ERRDRS3_ERRACD3,		19
	.EQU	MPU_ERRDRS3_ERRACD2,		18
	.EQU	MPU_ERRDRS3_ERRACD1,		17
	.EQU	MPU_ERRDRS3_ERRACD0,		16
	.EQU	MPU_ERRDRS3_ERRPID7,		15
	.EQU	MPU_ERRDRS3_ERRPID6,		14
	.EQU	MPU_ERRDRS3_ERRPID5,		13
	.EQU	MPU_ERRDRS3_ERRPID4,		12
	.EQU	MPU_ERRDRS3_ERRPID3,		11
	.EQU	MPU_ERRDRS3_ERRPID2,		10
	.EQU	MPU_ERRDRS3_ERRPID1,		9
	.EQU	MPU_ERRDRS3_ERRPID0,		8
	.EQU	MPU_ERRDRS3_ERRMNU3,		7
	.EQU	MPU_ERRDRS3_ERRMNU2,		6
	.EQU	MPU_ERRDRS3_ERRMNU1,		5
	.EQU	MPU_ERRDRS3_ERRMNU0,		4
	.EQU	MPU_ERRDRS3_ERRATR2,		3
	.EQU	MPU_ERRDRS3_ERRATR1,		2
	.EQU	MPU_ERRDRS3_ERRATR0,		1
	.EQU	MPU_ERRDRS3_ERRRW,		0
//  register-------------------------------------
	.EQU	MPU_RGDE1W0,	0x40001710
//  0x4000 1710  MPU_RGDE1W0   Bits-------------------------------------
	.EQU	MPU_RGDE1W0_STRADDR31,		31
	.EQU	MPU_RGDE1W0_STRADDR30,		30
	.EQU	MPU_RGDE1W0_STRADDR29,		29
	.EQU	MPU_RGDE1W0_STRADDR28,		28
	.EQU	MPU_RGDE1W0_STRADDR27,		27
	.EQU	MPU_RGDE1W0_STRADDR26,		26
	.EQU	MPU_RGDE1W0_STRADDR25,		25
	.EQU	MPU_RGDE1W0_STRADDR24,		24
	.EQU	MPU_RGDE1W0_STRADDR23,		23
	.EQU	MPU_RGDE1W0_STRADDR22,		22
	.EQU	MPU_RGDE1W0_STRADDR21,		21
	.EQU	MPU_RGDE1W0_STRADDR20,		20
	.EQU	MPU_RGDE1W0_STRADDR19,		19
	.EQU	MPU_RGDE1W0_STRADDR18,		18
	.EQU	MPU_RGDE1W0_STRADDR17,		17
	.EQU	MPU_RGDE1W0_STRADDR16,		16
	.EQU	MPU_RGDE1W0_STRADDR15,		15
	.EQU	MPU_RGDE1W0_STRADDR14,		14
	.EQU	MPU_RGDE1W0_STRADDR13,		13
	.EQU	MPU_RGDE1W0_STRADDR12,		12
	.EQU	MPU_RGDE1W0_STRADDR11,		11
	.EQU	MPU_RGDE1W0_STRADDR10,		10
	.EQU	MPU_RGDE1W0_STRADDR9,		9
	.EQU	MPU_RGDE1W0_STRADDR8,		8
	.EQU	MPU_RGDE1W0_STRADDR7,		7
	.EQU	MPU_RGDE1W0_STRADDR6,		6
	.EQU	MPU_RGDE1W0_STRADDR5,		5
//  register-------------------------------------
	.EQU	MPU_RGDE1W1,	0x40001714
//  0x4000 1714  MPU_RGDE1W1   Bits-------------------------------------
	.EQU	MPU_RGDE1W1_ENDADDR31,		31
	.EQU	MPU_RGDE1W1_ENDADDR30,		30
	.EQU	MPU_RGDE1W1_ENDADDR29,		29
	.EQU	MPU_RGDE1W1_ENDADDR28,		28
	.EQU	MPU_RGDE1W1_ENDADDR27,		27
	.EQU	MPU_RGDE1W1_ENDADDR26,		26
	.EQU	MPU_RGDE1W1_ENDADDR25,		25
	.EQU	MPU_RGDE1W1_ENDADDR24,		24
	.EQU	MPU_RGDE1W1_ENDADDR23,		23
	.EQU	MPU_RGDE1W1_ENDADDR22,		22
	.EQU	MPU_RGDE1W1_ENDADDR21,		21
	.EQU	MPU_RGDE1W1_ENDADDR20,		20
	.EQU	MPU_RGDE1W1_ENDADDR19,		19
	.EQU	MPU_RGDE1W1_ENDADDR18,		18
	.EQU	MPU_RGDE1W1_ENDADDR17,		17
	.EQU	MPU_RGDE1W1_ENDADDR16,		16
	.EQU	MPU_RGDE1W1_ENDADDR15,		15
	.EQU	MPU_RGDE1W1_ENDADDR14,		14
	.EQU	MPU_RGDE1W1_ENDADDR13,		13
	.EQU	MPU_RGDE1W1_ENDADDR12,		12
	.EQU	MPU_RGDE1W1_ENDADDR11,		11
	.EQU	MPU_RGDE1W1_ENDADDR10,		10
	.EQU	MPU_RGDE1W1_ENDADDR9,		9
	.EQU	MPU_RGDE1W1_ENDADDR8,		8
	.EQU	MPU_RGDE1W1_ENDADDR7,		7
	.EQU	MPU_RGDE1W1_ENDADDR6,		6
	.EQU	MPU_RGDE1W1_ENDADDR5,		5
//  register-------------------------------------
	.EQU	MPU_RGDE1W2,	0x40001718
//  0x4000 1718  MPU_RGDE1W2   Bits-------------------------------------
	.EQU	MPU_RGDE1W2_M2SMAC1,		16
	.EQU	MPU_RGDE1W2_M2SMAC0,		15
	.EQU	MPU_RGDE1W2_M2UMAC2,		14
	.EQU	MPU_RGDE1W2_M2UMAC1,		13
	.EQU	MPU_RGDE1W2_M2UMAC0,		12
	.EQU	MPU_RGDE1W2_M1PEN,		11
	.EQU	MPU_RGDE1W2_M1SMAC1,		10
	.EQU	MPU_RGDE1W2_M1SMAC0,		9
	.EQU	MPU_RGDE1W2_M1UMAC2,		8
	.EQU	MPU_RGDE1W2_M1UMAC1,		7
	.EQU	MPU_RGDE1W2_M1UMAC0,		6
	.EQU	MPU_RGDE1W2_M0PEN,		5
	.EQU	MPU_RGDE1W2_M0SMAC1,		4
	.EQU	MPU_RGDE1W2_M0SMAC0,		3
	.EQU	MPU_RGDE1W2_M0UMAC2,		2
	.EQU	MPU_RGDE1W2_M0UMAC1,		1
	.EQU	MPU_RGDE1W2_M0UMAC0,		0
//  register-------------------------------------
	.EQU	MPU_RGDE1W3,	0x4000171C
//  0x4000 171C  MPU_RGDE1W3   Bits-------------------------------------
	.EQU	MPU_RGDE1W3_PID7,		31
	.EQU	MPU_RGDE1W3_PID6,		30
	.EQU	MPU_RGDE1W3_PID5,		29
	.EQU	MPU_RGDE1W3_PID4,		28
	.EQU	MPU_RGDE1W3_PID3,		27
	.EQU	MPU_RGDE1W3_PID2,		26
	.EQU	MPU_RGDE1W3_PID1,		25
	.EQU	MPU_RGDE1W3_PID0,		24
	.EQU	MPU_RGDE1W3_PIDMSK7,		23
	.EQU	MPU_RGDE1W3_PIDMSK6,		22
	.EQU	MPU_RGDE1W3_PIDMSK5,		21
	.EQU	MPU_RGDE1W3_PIDMSK4,		20
	.EQU	MPU_RGDE1W3_PIDMSK3,		19
	.EQU	MPU_RGDE1W3_PIDMSK2,		18
	.EQU	MPU_RGDE1W3_PIDMSK1,		17
	.EQU	MPU_RGDE1W3_PIDMSK0,		16
	.EQU	MPU_RGDE1W3_RGDEVLD,		0
//  register-------------------------------------
	.EQU	MPU_RGDE2W0,	0x40001720
//  0x4000 1720  MPU_RGDE2W0   Bits-------------------------------------
	.EQU	MPU_RGDE2W0_STRADDR31,		31
	.EQU	MPU_RGDE2W0_STRADDR30,		30
	.EQU	MPU_RGDE2W0_STRADDR29,		29
	.EQU	MPU_RGDE2W0_STRADDR28,		28
	.EQU	MPU_RGDE2W0_STRADDR27,		27
	.EQU	MPU_RGDE2W0_STRADDR26,		26
	.EQU	MPU_RGDE2W0_STRADDR25,		25
	.EQU	MPU_RGDE2W0_STRADDR24,		24
	.EQU	MPU_RGDE2W0_STRADDR23,		23
	.EQU	MPU_RGDE2W0_STRADDR22,		22
	.EQU	MPU_RGDE2W0_STRADDR21,		21
	.EQU	MPU_RGDE2W0_STRADDR20,		20
	.EQU	MPU_RGDE2W0_STRADDR19,		19
	.EQU	MPU_RGDE2W0_STRADDR18,		18
	.EQU	MPU_RGDE2W0_STRADDR17,		17
	.EQU	MPU_RGDE2W0_STRADDR16,		16
	.EQU	MPU_RGDE2W0_STRADDR15,		15
	.EQU	MPU_RGDE2W0_STRADDR14,		14
	.EQU	MPU_RGDE2W0_STRADDR13,		13
	.EQU	MPU_RGDE2W0_STRADDR12,		12
	.EQU	MPU_RGDE2W0_STRADDR11,		11
	.EQU	MPU_RGDE2W0_STRADDR10,		10
	.EQU	MPU_RGDE2W0_STRADDR9,		9
	.EQU	MPU_RGDE2W0_STRADDR8,		8
	.EQU	MPU_RGDE2W0_STRADDR7,		7
	.EQU	MPU_RGDE2W0_STRADDR6,		6
	.EQU	MPU_RGDE2W0_STRADDR5,		5
//  register-------------------------------------
	.EQU	MPU_RGDE2W1,	0x40001724
//  0x4000 1724  MPU_RGDE2W1   Bits-------------------------------------
	.EQU	MPU_RGDE2W1_ENDADDR31,		31
	.EQU	MPU_RGDE2W1_ENDADDR30,		30
	.EQU	MPU_RGDE2W1_ENDADDR29,		29
	.EQU	MPU_RGDE2W1_ENDADDR28,		28
	.EQU	MPU_RGDE2W1_ENDADDR27,		27
	.EQU	MPU_RGDE2W1_ENDADDR26,		26
	.EQU	MPU_RGDE2W1_ENDADDR25,		25
	.EQU	MPU_RGDE2W1_ENDADDR24,		24
	.EQU	MPU_RGDE2W1_ENDADDR23,		23
	.EQU	MPU_RGDE2W1_ENDADDR22,		22
	.EQU	MPU_RGDE2W1_ENDADDR21,		21
	.EQU	MPU_RGDE2W1_ENDADDR20,		20
	.EQU	MPU_RGDE2W1_ENDADDR19,		19
	.EQU	MPU_RGDE2W1_ENDADDR18,		18
	.EQU	MPU_RGDE2W1_ENDADDR17,		17
	.EQU	MPU_RGDE2W1_ENDADDR16,		16
	.EQU	MPU_RGDE2W1_ENDADDR15,		15
	.EQU	MPU_RGDE2W1_ENDADDR14,		14
	.EQU	MPU_RGDE2W1_ENDADDR13,		13
	.EQU	MPU_RGDE2W1_ENDADDR12,		12
	.EQU	MPU_RGDE2W1_ENDADDR11,		11
	.EQU	MPU_RGDE2W1_ENDADDR10,		10
	.EQU	MPU_RGDE2W1_ENDADDR9,		9
	.EQU	MPU_RGDE2W1_ENDADDR8,		8
	.EQU	MPU_RGDE2W1_ENDADDR7,		7
	.EQU	MPU_RGDE2W1_ENDADDR6,		6
	.EQU	MPU_RGDE2W1_ENDADDR5,		5
//  register-------------------------------------
	.EQU	MPU_RGDE2W2,	0x40001728
//  0x4000 1728  MPU_RGDE2W2   Bits-------------------------------------
	.EQU	MPU_RGDE2W2_M2SMAC1,		16
	.EQU	MPU_RGDE2W2_M2SMAC0,		15
	.EQU	MPU_RGDE2W2_M2UMAC2,		14
	.EQU	MPU_RGDE2W2_M2UMAC1,		13
	.EQU	MPU_RGDE2W2_M2UMAC0,		12
	.EQU	MPU_RGDE2W2_M1PEN,		11
	.EQU	MPU_RGDE2W2_M1SMAC1,		10
	.EQU	MPU_RGDE2W2_M1SMAC0,		9
	.EQU	MPU_RGDE2W2_M1UMAC2,		8
	.EQU	MPU_RGDE2W2_M1UMAC1,		7
	.EQU	MPU_RGDE2W2_M1UMAC0,		6
	.EQU	MPU_RGDE2W2_M0PEN,		5
	.EQU	MPU_RGDE2W2_M0SMAC1,		4
	.EQU	MPU_RGDE2W2_M0SMAC0,		3
	.EQU	MPU_RGDE2W2_M0UMAC2,		2
	.EQU	MPU_RGDE2W2_M0UMAC1,		1
	.EQU	MPU_RGDE2W2_M0UMAC0,		0
//  register-------------------------------------
	.EQU	MPU_RGDE2W3,	0x4000172C
//  0x4000 172C  MPU_RGDE2W3   Bits-------------------------------------
	.EQU	MPU_RGDE2W3_PID7,		31
	.EQU	MPU_RGDE2W3_PID6,		30
	.EQU	MPU_RGDE2W3_PID5,		29
	.EQU	MPU_RGDE2W3_PID4,		28
	.EQU	MPU_RGDE2W3_PID3,		27
	.EQU	MPU_RGDE2W3_PID2,		26
	.EQU	MPU_RGDE2W3_PID1,		25
	.EQU	MPU_RGDE2W3_PID0,		24
	.EQU	MPU_RGDE2W3_PIDMSK7,		23
	.EQU	MPU_RGDE2W3_PIDMSK6,		22
	.EQU	MPU_RGDE2W3_PIDMSK5,		21
	.EQU	MPU_RGDE2W3_PIDMSK4,		20
	.EQU	MPU_RGDE2W3_PIDMSK3,		19
	.EQU	MPU_RGDE2W3_PIDMSK2,		18
	.EQU	MPU_RGDE2W3_PIDMSK1,		17
	.EQU	MPU_RGDE2W3_PIDMSK0,		16
	.EQU	MPU_RGDE2W3_RGDEVLD,		0
//  register-------------------------------------
	.EQU	MPU_RGDE3W0,	0x40001730
//  0x4000 1730  MPU_RGDE3W0   Bits-------------------------------------
	.EQU	MPU_RGDE3W0_STRADDR31,		31
	.EQU	MPU_RGDE3W0_STRADDR30,		30
	.EQU	MPU_RGDE3W0_STRADDR29,		29
	.EQU	MPU_RGDE3W0_STRADDR28,		28
	.EQU	MPU_RGDE3W0_STRADDR27,		27
	.EQU	MPU_RGDE3W0_STRADDR26,		26
	.EQU	MPU_RGDE3W0_STRADDR25,		25
	.EQU	MPU_RGDE3W0_STRADDR24,		24
	.EQU	MPU_RGDE3W0_STRADDR23,		23
	.EQU	MPU_RGDE3W0_STRADDR22,		22
	.EQU	MPU_RGDE3W0_STRADDR21,		21
	.EQU	MPU_RGDE3W0_STRADDR20,		20
	.EQU	MPU_RGDE3W0_STRADDR19,		19
	.EQU	MPU_RGDE3W0_STRADDR18,		18
	.EQU	MPU_RGDE3W0_STRADDR17,		17
	.EQU	MPU_RGDE3W0_STRADDR16,		16
	.EQU	MPU_RGDE3W0_STRADDR15,		15
	.EQU	MPU_RGDE3W0_STRADDR14,		14
	.EQU	MPU_RGDE3W0_STRADDR13,		13
	.EQU	MPU_RGDE3W0_STRADDR12,		12
	.EQU	MPU_RGDE3W0_STRADDR11,		11
	.EQU	MPU_RGDE3W0_STRADDR10,		10
	.EQU	MPU_RGDE3W0_STRADDR9,		9
	.EQU	MPU_RGDE3W0_STRADDR8,		8
	.EQU	MPU_RGDE3W0_STRADDR7,		7
	.EQU	MPU_RGDE3W0_STRADDR6,		6
	.EQU	MPU_RGDE3W0_STRADDR5,		5
//  register-------------------------------------
	.EQU	MPU_RGDE3W1,	0x40001734
//  0x4000 1734  MPU_RGDE3W1   Bits-------------------------------------
	.EQU	MPU_RGDE3W1_ENDADDR31,		31
	.EQU	MPU_RGDE3W1_ENDADDR30,		30
	.EQU	MPU_RGDE3W1_ENDADDR29,		29
	.EQU	MPU_RGDE3W1_ENDADDR28,		28
	.EQU	MPU_RGDE3W1_ENDADDR27,		27
	.EQU	MPU_RGDE3W1_ENDADDR26,		26
	.EQU	MPU_RGDE3W1_ENDADDR25,		25
	.EQU	MPU_RGDE3W1_ENDADDR24,		24
	.EQU	MPU_RGDE3W1_ENDADDR23,		23
	.EQU	MPU_RGDE3W1_ENDADDR22,		22
	.EQU	MPU_RGDE3W1_ENDADDR21,		21
	.EQU	MPU_RGDE3W1_ENDADDR20,		20
	.EQU	MPU_RGDE3W1_ENDADDR19,		19
	.EQU	MPU_RGDE3W1_ENDADDR18,		18
	.EQU	MPU_RGDE3W1_ENDADDR17,		17
	.EQU	MPU_RGDE3W1_ENDADDR16,		16
	.EQU	MPU_RGDE3W1_ENDADDR15,		15
	.EQU	MPU_RGDE3W1_ENDADDR14,		14
	.EQU	MPU_RGDE3W1_ENDADDR13,		13
	.EQU	MPU_RGDE3W1_ENDADDR12,		12
	.EQU	MPU_RGDE3W1_ENDADDR11,		11
	.EQU	MPU_RGDE3W1_ENDADDR10,		10
	.EQU	MPU_RGDE3W1_ENDADDR9,		9
	.EQU	MPU_RGDE3W1_ENDADDR8,		8
	.EQU	MPU_RGDE3W1_ENDADDR7,		7
	.EQU	MPU_RGDE3W1_ENDADDR6,		6
	.EQU	MPU_RGDE3W1_ENDADDR5,		5
//  register-------------------------------------
	.EQU	MPU_RGDE3W2,	0x40001738
//  0x4000 1738  MPU_RGDE3W2   Bits-------------------------------------
	.EQU	MPU_RGDE3W2_M2SMAC1,		16
	.EQU	MPU_RGDE3W2_M2SMAC0,		15
	.EQU	MPU_RGDE3W2_M2UMAC2,		14
	.EQU	MPU_RGDE3W2_M2UMAC1,		13
	.EQU	MPU_RGDE3W2_M2UMAC0,		12
	.EQU	MPU_RGDE3W2_M1PEN,		11
	.EQU	MPU_RGDE3W2_M1SMAC1,		10
	.EQU	MPU_RGDE3W2_M1SMAC0,		9
	.EQU	MPU_RGDE3W2_M1UMAC2,		8
	.EQU	MPU_RGDE3W2_M1UMAC1,		7
	.EQU	MPU_RGDE3W2_M1UMAC0,		6
	.EQU	MPU_RGDE3W2_M0PEN,		5
	.EQU	MPU_RGDE3W2_M0SMAC1,		4
	.EQU	MPU_RGDE3W2_M0SMAC0,		3
	.EQU	MPU_RGDE3W2_M0UMAC2,		2
	.EQU	MPU_RGDE3W2_M0UMAC1,		1
	.EQU	MPU_RGDE3W2_M0UMAC0,		0
//  register-------------------------------------
	.EQU	MPU_RGDE3W3,	0x4000173C
//  0x4000 173C  MPU_RGDE3W3   Bits-------------------------------------
	.EQU	MPU_RGDE3W3_PID7,		31
	.EQU	MPU_RGDE3W3_PID6,		30
	.EQU	MPU_RGDE3W3_PID5,		29
	.EQU	MPU_RGDE3W3_PID4,		28
	.EQU	MPU_RGDE3W3_PID3,		27
	.EQU	MPU_RGDE3W3_PID2,		26
	.EQU	MPU_RGDE3W3_PID1,		25
	.EQU	MPU_RGDE3W3_PID0,		24
	.EQU	MPU_RGDE3W3_PIDMSK7,		23
	.EQU	MPU_RGDE3W3_PIDMSK6,		22
	.EQU	MPU_RGDE3W3_PIDMSK5,		21
	.EQU	MPU_RGDE3W3_PIDMSK4,		20
	.EQU	MPU_RGDE3W3_PIDMSK3,		19
	.EQU	MPU_RGDE3W3_PIDMSK2,		18
	.EQU	MPU_RGDE3W3_PIDMSK1,		17
	.EQU	MPU_RGDE3W3_PIDMSK0,		16
	.EQU	MPU_RGDE3W3_RGDEVLD,		0
//  register-------------------------------------
	.EQU	MPU_RGDE4W0,	0x40001740
//  0x4000 1740  MPU_RGDE4W0   Bits-------------------------------------
	.EQU	MPU_RGDE4W0_STRADDR31,		31
	.EQU	MPU_RGDE4W0_STRADDR30,		30
	.EQU	MPU_RGDE4W0_STRADDR29,		29
	.EQU	MPU_RGDE4W0_STRADDR28,		28
	.EQU	MPU_RGDE4W0_STRADDR27,		27
	.EQU	MPU_RGDE4W0_STRADDR26,		26
	.EQU	MPU_RGDE4W0_STRADDR25,		25
	.EQU	MPU_RGDE4W0_STRADDR24,		24
	.EQU	MPU_RGDE4W0_STRADDR23,		23
	.EQU	MPU_RGDE4W0_STRADDR22,		22
	.EQU	MPU_RGDE4W0_STRADDR21,		21
	.EQU	MPU_RGDE4W0_STRADDR20,		20
	.EQU	MPU_RGDE4W0_STRADDR19,		19
	.EQU	MPU_RGDE4W0_STRADDR18,		18
	.EQU	MPU_RGDE4W0_STRADDR17,		17
	.EQU	MPU_RGDE4W0_STRADDR16,		16
	.EQU	MPU_RGDE4W0_STRADDR15,		15
	.EQU	MPU_RGDE4W0_STRADDR14,		14
	.EQU	MPU_RGDE4W0_STRADDR13,		13
	.EQU	MPU_RGDE4W0_STRADDR12,		12
	.EQU	MPU_RGDE4W0_STRADDR11,		11
	.EQU	MPU_RGDE4W0_STRADDR10,		10
	.EQU	MPU_RGDE4W0_STRADDR9,		9
	.EQU	MPU_RGDE4W0_STRADDR8,		8
	.EQU	MPU_RGDE4W0_STRADDR7,		7
	.EQU	MPU_RGDE4W0_STRADDR6,		6
	.EQU	MPU_RGDE4W0_STRADDR5,		5
//  register-------------------------------------
	.EQU	MPU_RGDE4W1,	0x40001744
//  0x4000 1744  MPU_RGDE4W1   Bits-------------------------------------
	.EQU	MPU_RGDE4W1_ENDADDR31,		31
	.EQU	MPU_RGDE4W1_ENDADDR30,		30
	.EQU	MPU_RGDE4W1_ENDADDR29,		29
	.EQU	MPU_RGDE4W1_ENDADDR28,		28
	.EQU	MPU_RGDE4W1_ENDADDR27,		27
	.EQU	MPU_RGDE4W1_ENDADDR26,		26
	.EQU	MPU_RGDE4W1_ENDADDR25,		25
	.EQU	MPU_RGDE4W1_ENDADDR24,		24
	.EQU	MPU_RGDE4W1_ENDADDR23,		23
	.EQU	MPU_RGDE4W1_ENDADDR22,		22
	.EQU	MPU_RGDE4W1_ENDADDR21,		21
	.EQU	MPU_RGDE4W1_ENDADDR20,		20
	.EQU	MPU_RGDE4W1_ENDADDR19,		19
	.EQU	MPU_RGDE4W1_ENDADDR18,		18
	.EQU	MPU_RGDE4W1_ENDADDR17,		17
	.EQU	MPU_RGDE4W1_ENDADDR16,		16
	.EQU	MPU_RGDE4W1_ENDADDR15,		15
	.EQU	MPU_RGDE4W1_ENDADDR14,		14
	.EQU	MPU_RGDE4W1_ENDADDR13,		13
	.EQU	MPU_RGDE4W1_ENDADDR12,		12
	.EQU	MPU_RGDE4W1_ENDADDR11,		11
	.EQU	MPU_RGDE4W1_ENDADDR10,		10
	.EQU	MPU_RGDE4W1_ENDADDR9,		9
	.EQU	MPU_RGDE4W1_ENDADDR8,		8
	.EQU	MPU_RGDE4W1_ENDADDR7,		7
	.EQU	MPU_RGDE4W1_ENDADDR6,		6
	.EQU	MPU_RGDE4W1_ENDADDR5,		5
//  register-------------------------------------
	.EQU	MPU_RGDE4W2,	0x40001748
//  0x4000 1748  MPU_RGDE4W2   Bits-------------------------------------
	.EQU	MPU_RGDE4W2_M2SMAC1,		16
	.EQU	MPU_RGDE4W2_M2SMAC0,		15
	.EQU	MPU_RGDE4W2_M2UMAC2,		14
	.EQU	MPU_RGDE4W2_M2UMAC1,		13
	.EQU	MPU_RGDE4W2_M2UMAC0,		12
	.EQU	MPU_RGDE4W2_M1PEN,		11
	.EQU	MPU_RGDE4W2_M1SMAC1,		10
	.EQU	MPU_RGDE4W2_M1SMAC0,		9
	.EQU	MPU_RGDE4W2_M1UMAC2,		8
	.EQU	MPU_RGDE4W2_M1UMAC1,		7
	.EQU	MPU_RGDE4W2_M1UMAC0,		6
	.EQU	MPU_RGDE4W2_M0PEN,		5
	.EQU	MPU_RGDE4W2_M0SMAC1,		4
	.EQU	MPU_RGDE4W2_M0SMAC0,		3
	.EQU	MPU_RGDE4W2_M0UMAC2,		2
	.EQU	MPU_RGDE4W2_M0UMAC1,		1
	.EQU	MPU_RGDE4W2_M0UMAC0,		0
//  register-------------------------------------
	.EQU	MPU_RGDE4W3,	0x4000174C
//  0x4000 174C  MPU_RGDE4W3   Bits-------------------------------------
	.EQU	MPU_RGDE4W3_PID7,		31
	.EQU	MPU_RGDE4W3_PID6,		30
	.EQU	MPU_RGDE4W3_PID5,		29
	.EQU	MPU_RGDE4W3_PID4,		28
	.EQU	MPU_RGDE4W3_PID3,		27
	.EQU	MPU_RGDE4W3_PID2,		26
	.EQU	MPU_RGDE4W3_PID1,		25
	.EQU	MPU_RGDE4W3_PID0,		24
	.EQU	MPU_RGDE4W3_PIDMSK7,		23
	.EQU	MPU_RGDE4W3_PIDMSK6,		22
	.EQU	MPU_RGDE4W3_PIDMSK5,		21
	.EQU	MPU_RGDE4W3_PIDMSK4,		20
	.EQU	MPU_RGDE4W3_PIDMSK3,		19
	.EQU	MPU_RGDE4W3_PIDMSK2,		18
	.EQU	MPU_RGDE4W3_PIDMSK1,		17
	.EQU	MPU_RGDE4W3_PIDMSK0,		16
	.EQU	MPU_RGDE4W3_RGDEVLD,		0
//  register-------------------------------------
	.EQU	MPU_RGDE5W0,	0x40001750
//  0x4000 1750  MPU_RGDE5W0   Bits-------------------------------------
	.EQU	MPU_RGDE5W0_STRADDR31,		31
	.EQU	MPU_RGDE5W0_STRADDR30,		30
	.EQU	MPU_RGDE5W0_STRADDR29,		29
	.EQU	MPU_RGDE5W0_STRADDR28,		28
	.EQU	MPU_RGDE5W0_STRADDR27,		27
	.EQU	MPU_RGDE5W0_STRADDR26,		26
	.EQU	MPU_RGDE5W0_STRADDR25,		25
	.EQU	MPU_RGDE5W0_STRADDR24,		24
	.EQU	MPU_RGDE5W0_STRADDR23,		23
	.EQU	MPU_RGDE5W0_STRADDR22,		22
	.EQU	MPU_RGDE5W0_STRADDR21,		21
	.EQU	MPU_RGDE5W0_STRADDR20,		20
	.EQU	MPU_RGDE5W0_STRADDR19,		19
	.EQU	MPU_RGDE5W0_STRADDR18,		18
	.EQU	MPU_RGDE5W0_STRADDR17,		17
	.EQU	MPU_RGDE5W0_STRADDR16,		16
	.EQU	MPU_RGDE5W0_STRADDR15,		15
	.EQU	MPU_RGDE5W0_STRADDR14,		14
	.EQU	MPU_RGDE5W0_STRADDR13,		13
	.EQU	MPU_RGDE5W0_STRADDR12,		12
	.EQU	MPU_RGDE5W0_STRADDR11,		11
	.EQU	MPU_RGDE5W0_STRADDR10,		10
	.EQU	MPU_RGDE5W0_STRADDR9,		9
	.EQU	MPU_RGDE5W0_STRADDR8,		8
	.EQU	MPU_RGDE5W0_STRADDR7,		7
	.EQU	MPU_RGDE5W0_STRADDR6,		6
	.EQU	MPU_RGDE5W0_STRADDR5,		5
//  register-------------------------------------
	.EQU	MPU_RGDE5W1,	0x40001754
//  0x4000 1754  MPU_RGDE5W1   Bits-------------------------------------
	.EQU	MPU_RGDE5W1_ENDADDR31,		31
	.EQU	MPU_RGDE5W1_ENDADDR30,		30
	.EQU	MPU_RGDE5W1_ENDADDR29,		29
	.EQU	MPU_RGDE5W1_ENDADDR28,		28
	.EQU	MPU_RGDE5W1_ENDADDR27,		27
	.EQU	MPU_RGDE5W1_ENDADDR26,		26
	.EQU	MPU_RGDE5W1_ENDADDR25,		25
	.EQU	MPU_RGDE5W1_ENDADDR24,		24
	.EQU	MPU_RGDE5W1_ENDADDR23,		23
	.EQU	MPU_RGDE5W1_ENDADDR22,		22
	.EQU	MPU_RGDE5W1_ENDADDR21,		21
	.EQU	MPU_RGDE5W1_ENDADDR20,		20
	.EQU	MPU_RGDE5W1_ENDADDR19,		19
	.EQU	MPU_RGDE5W1_ENDADDR18,		18
	.EQU	MPU_RGDE5W1_ENDADDR17,		17
	.EQU	MPU_RGDE5W1_ENDADDR16,		16
	.EQU	MPU_RGDE5W1_ENDADDR15,		15
	.EQU	MPU_RGDE5W1_ENDADDR14,		14
	.EQU	MPU_RGDE5W1_ENDADDR13,		13
	.EQU	MPU_RGDE5W1_ENDADDR12,		12
	.EQU	MPU_RGDE5W1_ENDADDR11,		11
	.EQU	MPU_RGDE5W1_ENDADDR10,		10
	.EQU	MPU_RGDE5W1_ENDADDR9,		9
	.EQU	MPU_RGDE5W1_ENDADDR8,		8
	.EQU	MPU_RGDE5W1_ENDADDR7,		7
	.EQU	MPU_RGDE5W1_ENDADDR6,		6
	.EQU	MPU_RGDE5W1_ENDADDR5,		5
//  register-------------------------------------
	.EQU	MPU_RGDE5W2,	0x40001758
//  0x4000 1758  MPU_RGDE5W2   Bits-------------------------------------
	.EQU	MPU_RGDE5W2_M2SMAC1,		16
	.EQU	MPU_RGDE5W2_M2SMAC0,		15
	.EQU	MPU_RGDE5W2_M2UMAC2,		14
	.EQU	MPU_RGDE5W2_M2UMAC1,		13
	.EQU	MPU_RGDE5W2_M2UMAC0,		12
	.EQU	MPU_RGDE5W2_M1PEN,		11
	.EQU	MPU_RGDE5W2_M1SMAC1,		10
	.EQU	MPU_RGDE5W2_M1SMAC0,		9
	.EQU	MPU_RGDE5W2_M1UMAC2,		8
	.EQU	MPU_RGDE5W2_M1UMAC1,		7
	.EQU	MPU_RGDE5W2_M1UMAC0,		6
	.EQU	MPU_RGDE5W2_M0PEN,		5
	.EQU	MPU_RGDE5W2_M0SMAC1,		4
	.EQU	MPU_RGDE5W2_M0SMAC0,		3
	.EQU	MPU_RGDE5W2_M0UMAC2,		2
	.EQU	MPU_RGDE5W2_M0UMAC1,		1
	.EQU	MPU_RGDE5W2_M0UMAC0,		0
//  register-------------------------------------
	.EQU	MPU_RGDE5W3,	0x40001718
//  0x4000 1718  MPU_RGDE5W3   Bits-------------------------------------
	.EQU	MPU_RGDE5W3_PID7,		31
	.EQU	MPU_RGDE5W3_PID6,		30
	.EQU	MPU_RGDE5W3_PID5,		29
	.EQU	MPU_RGDE5W3_PID4,		28
	.EQU	MPU_RGDE5W3_PID3,		27
	.EQU	MPU_RGDE5W3_PID2,		26
	.EQU	MPU_RGDE5W3_PID1,		25
	.EQU	MPU_RGDE5W3_PID0,		24
	.EQU	MPU_RGDE5W3_PIDMSK7,		23
	.EQU	MPU_RGDE5W3_PIDMSK6,		22
	.EQU	MPU_RGDE5W3_PIDMSK5,		21
	.EQU	MPU_RGDE5W3_PIDMSK4,		20
	.EQU	MPU_RGDE5W3_PIDMSK3,		19
	.EQU	MPU_RGDE5W3_PIDMSK2,		18
	.EQU	MPU_RGDE5W3_PIDMSK1,		17
	.EQU	MPU_RGDE5W3_PIDMSK0,		16
	.EQU	MPU_RGDE5W3_RGDEVLD,		0
//  register-------------------------------------
	.EQU	MPU_RGDE6W0,	0x40001760
//  0x4000 1760  MPU_RGDE6W0   Bits-------------------------------------
	.EQU	MPU_RGDE6W0_STRADDR31,		31
	.EQU	MPU_RGDE6W0_STRADDR30,		30
	.EQU	MPU_RGDE6W0_STRADDR29,		29
	.EQU	MPU_RGDE6W0_STRADDR28,		28
	.EQU	MPU_RGDE6W0_STRADDR27,		27
	.EQU	MPU_RGDE6W0_STRADDR26,		26
	.EQU	MPU_RGDE6W0_STRADDR25,		25
	.EQU	MPU_RGDE6W0_STRADDR24,		24
	.EQU	MPU_RGDE6W0_STRADDR23,		23
	.EQU	MPU_RGDE6W0_STRADDR22,		22
	.EQU	MPU_RGDE6W0_STRADDR21,		21
	.EQU	MPU_RGDE6W0_STRADDR20,		20
	.EQU	MPU_RGDE6W0_STRADDR19,		19
	.EQU	MPU_RGDE6W0_STRADDR18,		18
	.EQU	MPU_RGDE6W0_STRADDR17,		17
	.EQU	MPU_RGDE6W0_STRADDR16,		16
	.EQU	MPU_RGDE6W0_STRADDR15,		15
	.EQU	MPU_RGDE6W0_STRADDR14,		14
	.EQU	MPU_RGDE6W0_STRADDR13,		13
	.EQU	MPU_RGDE6W0_STRADDR12,		12
	.EQU	MPU_RGDE6W0_STRADDR11,		11
	.EQU	MPU_RGDE6W0_STRADDR10,		10
	.EQU	MPU_RGDE6W0_STRADDR9,		9
	.EQU	MPU_RGDE6W0_STRADDR8,		8
	.EQU	MPU_RGDE6W0_STRADDR7,		7
	.EQU	MPU_RGDE6W0_STRADDR6,		6
	.EQU	MPU_RGDE6W0_STRADDR5,		5
//  register-------------------------------------
	.EQU	MPU_RGDE6W1,	0x40001764
//  0x4000 1764  MPU_RGDE6W1   Bits-------------------------------------
	.EQU	MPU_RGDE6W1_ENDADDR31,		31
	.EQU	MPU_RGDE6W1_ENDADDR30,		30
	.EQU	MPU_RGDE6W1_ENDADDR29,		29
	.EQU	MPU_RGDE6W1_ENDADDR28,		28
	.EQU	MPU_RGDE6W1_ENDADDR27,		27
	.EQU	MPU_RGDE6W1_ENDADDR26,		26
	.EQU	MPU_RGDE6W1_ENDADDR25,		25
	.EQU	MPU_RGDE6W1_ENDADDR24,		24
	.EQU	MPU_RGDE6W1_ENDADDR23,		23
	.EQU	MPU_RGDE6W1_ENDADDR22,		22
	.EQU	MPU_RGDE6W1_ENDADDR21,		21
	.EQU	MPU_RGDE6W1_ENDADDR20,		20
	.EQU	MPU_RGDE6W1_ENDADDR19,		19
	.EQU	MPU_RGDE6W1_ENDADDR18,		18
	.EQU	MPU_RGDE6W1_ENDADDR17,		17
	.EQU	MPU_RGDE6W1_ENDADDR16,		16
	.EQU	MPU_RGDE6W1_ENDADDR15,		15
	.EQU	MPU_RGDE6W1_ENDADDR14,		14
	.EQU	MPU_RGDE6W1_ENDADDR13,		13
	.EQU	MPU_RGDE6W1_ENDADDR12,		12
	.EQU	MPU_RGDE6W1_ENDADDR11,		11
	.EQU	MPU_RGDE6W1_ENDADDR10,		10
	.EQU	MPU_RGDE6W1_ENDADDR9,		9
	.EQU	MPU_RGDE6W1_ENDADDR8,		8
	.EQU	MPU_RGDE6W1_ENDADDR7,		7
	.EQU	MPU_RGDE6W1_ENDADDR6,		6
	.EQU	MPU_RGDE6W1_ENDADDR5,		5
//  register-------------------------------------
	.EQU	MPU_RGDE6W2,	0x40001768
//  0x4000 1768  MPU_RGDE6W2   Bits-------------------------------------
	.EQU	MPU_RGDE6W2_M2SMAC1,		16
	.EQU	MPU_RGDE6W2_M2SMAC0,		15
	.EQU	MPU_RGDE6W2_M2UMAC2,		14
	.EQU	MPU_RGDE6W2_M2UMAC1,		13
	.EQU	MPU_RGDE6W2_M2UMAC0,		12
	.EQU	MPU_RGDE6W2_M1PEN,		11
	.EQU	MPU_RGDE6W2_M1SMAC1,		10
	.EQU	MPU_RGDE6W2_M1SMAC0,		9
	.EQU	MPU_RGDE6W2_M1UMAC2,		8
	.EQU	MPU_RGDE6W2_M1UMAC1,		7
	.EQU	MPU_RGDE6W2_M1UMAC0,		6
	.EQU	MPU_RGDE6W2_M0PEN,		5
	.EQU	MPU_RGDE6W2_M0SMAC1,		4
	.EQU	MPU_RGDE6W2_M0SMAC0,		3
	.EQU	MPU_RGDE6W2_M0UMAC2,		2
	.EQU	MPU_RGDE6W2_M0UMAC1,		1
	.EQU	MPU_RGDE6W2_M0UMAC0,		0
//  register-------------------------------------
	.EQU	MPU_RGDE6W3,	0x4000176C
//  0x4000 176C  MPU_RGDE6W3   Bits-------------------------------------
	.EQU	MPU_RGDE6W3_PID7,		31
	.EQU	MPU_RGDE6W3_PID6,		30
	.EQU	MPU_RGDE6W3_PID5,		29
	.EQU	MPU_RGDE6W3_PID4,		28
	.EQU	MPU_RGDE6W3_PID3,		27
	.EQU	MPU_RGDE6W3_PID2,		26
	.EQU	MPU_RGDE6W3_PID1,		25
	.EQU	MPU_RGDE6W3_PID0,		24
	.EQU	MPU_RGDE6W3_PIDMSK7,		23
	.EQU	MPU_RGDE6W3_PIDMSK6,		22
	.EQU	MPU_RGDE6W3_PIDMSK5,		21
	.EQU	MPU_RGDE6W3_PIDMSK4,		20
	.EQU	MPU_RGDE6W3_PIDMSK3,		19
	.EQU	MPU_RGDE6W3_PIDMSK2,		18
	.EQU	MPU_RGDE6W3_PIDMSK1,		17
	.EQU	MPU_RGDE6W3_PIDMSK0,		16
	.EQU	MPU_RGDE6W3_RGDEVLD,		0
//  register-------------------------------------
	.EQU	MPU_RGDE7W0,	0x40001770
//  0x4000 1770  MPU_RGDE7W0   Bits-------------------------------------
	.EQU	MPU_RGDE7W0_STRADDR31,		31
	.EQU	MPU_RGDE7W0_STRADDR30,		30
	.EQU	MPU_RGDE7W0_STRADDR29,		29
	.EQU	MPU_RGDE7W0_STRADDR28,		28
	.EQU	MPU_RGDE7W0_STRADDR27,		27
	.EQU	MPU_RGDE7W0_STRADDR26,		26
	.EQU	MPU_RGDE7W0_STRADDR25,		25
	.EQU	MPU_RGDE7W0_STRADDR24,		24
	.EQU	MPU_RGDE7W0_STRADDR23,		23
	.EQU	MPU_RGDE7W0_STRADDR22,		22
	.EQU	MPU_RGDE7W0_STRADDR21,		21
	.EQU	MPU_RGDE7W0_STRADDR20,		20
	.EQU	MPU_RGDE7W0_STRADDR19,		19
	.EQU	MPU_RGDE7W0_STRADDR18,		18
	.EQU	MPU_RGDE7W0_STRADDR17,		17
	.EQU	MPU_RGDE7W0_STRADDR16,		16
	.EQU	MPU_RGDE7W0_STRADDR15,		15
	.EQU	MPU_RGDE7W0_STRADDR14,		14
	.EQU	MPU_RGDE7W0_STRADDR13,		13
	.EQU	MPU_RGDE7W0_STRADDR12,		12
	.EQU	MPU_RGDE7W0_STRADDR11,		11
	.EQU	MPU_RGDE7W0_STRADDR10,		10
	.EQU	MPU_RGDE7W0_STRADDR9,		9
	.EQU	MPU_RGDE7W0_STRADDR8,		8
	.EQU	MPU_RGDE7W0_STRADDR7,		7
	.EQU	MPU_RGDE7W0_STRADDR6,		6
	.EQU	MPU_RGDE7W0_STRADDR5,		5
//  register-------------------------------------
	.EQU	MPU_RGDE7W1,	0x40001774
//  0x4000 1774  MPU_RGDE7W1   Bits-------------------------------------
	.EQU	MPU_RGDE7W1_ENDADDR31,		31
	.EQU	MPU_RGDE7W1_ENDADDR30,		30
	.EQU	MPU_RGDE7W1_ENDADDR29,		29
	.EQU	MPU_RGDE7W1_ENDADDR28,		28
	.EQU	MPU_RGDE7W1_ENDADDR27,		27
	.EQU	MPU_RGDE7W1_ENDADDR26,		26
	.EQU	MPU_RGDE7W1_ENDADDR25,		25
	.EQU	MPU_RGDE7W1_ENDADDR24,		24
	.EQU	MPU_RGDE7W1_ENDADDR23,		23
	.EQU	MPU_RGDE7W1_ENDADDR22,		22
	.EQU	MPU_RGDE7W1_ENDADDR21,		21
	.EQU	MPU_RGDE7W1_ENDADDR20,		20
	.EQU	MPU_RGDE7W1_ENDADDR19,		19
	.EQU	MPU_RGDE7W1_ENDADDR18,		18
	.EQU	MPU_RGDE7W1_ENDADDR17,		17
	.EQU	MPU_RGDE7W1_ENDADDR16,		16
	.EQU	MPU_RGDE7W1_ENDADDR15,		15
	.EQU	MPU_RGDE7W1_ENDADDR14,		14
	.EQU	MPU_RGDE7W1_ENDADDR13,		13
	.EQU	MPU_RGDE7W1_ENDADDR12,		12
	.EQU	MPU_RGDE7W1_ENDADDR11,		11
	.EQU	MPU_RGDE7W1_ENDADDR10,		10
	.EQU	MPU_RGDE7W1_ENDADDR9,		9
	.EQU	MPU_RGDE7W1_ENDADDR8,		8
	.EQU	MPU_RGDE7W1_ENDADDR7,		7
	.EQU	MPU_RGDE7W1_ENDADDR6,		6
	.EQU	MPU_RGDE7W1_ENDADDR5,		5
//  register-------------------------------------
	.EQU	MPU_RGDE7W2,	0x40001778
//  0x4000 1778  MPU_RGDE7W2   Bits-------------------------------------
	.EQU	MPU_RGDE7W2_M2SMAC1,		16
	.EQU	MPU_RGDE7W2_M2SMAC0,		15
	.EQU	MPU_RGDE7W2_M2UMAC2,		14
	.EQU	MPU_RGDE7W2_M2UMAC1,		13
	.EQU	MPU_RGDE7W2_M2UMAC0,		12
	.EQU	MPU_RGDE7W2_M1PEN,		11
	.EQU	MPU_RGDE7W2_M1SMAC1,		10
	.EQU	MPU_RGDE7W2_M1SMAC0,		9
	.EQU	MPU_RGDE7W2_M1UMAC2,		8
	.EQU	MPU_RGDE7W2_M1UMAC1,		7
	.EQU	MPU_RGDE7W2_M1UMAC0,		6
	.EQU	MPU_RGDE7W2_M0PEN,		5
	.EQU	MPU_RGDE7W2_M0SMAC1,		4
	.EQU	MPU_RGDE7W2_M0SMAC0,		3
	.EQU	MPU_RGDE7W2_M0UMAC2,		2
	.EQU	MPU_RGDE7W2_M0UMAC1,		1
	.EQU	MPU_RGDE7W2_M0UMAC0,		0
//  register-------------------------------------
	.EQU	MPU_RGDE7W3,	0x4000177C
//  0x4000 177C  MPU_RGDE7W3   Bits-------------------------------------
	.EQU	MPU_RGDE7W3_PID7,		31
	.EQU	MPU_RGDE7W3_PID6,		30
	.EQU	MPU_RGDE7W3_PID5,		29
	.EQU	MPU_RGDE7W3_PID4,		28
	.EQU	MPU_RGDE7W3_PID3,		27
	.EQU	MPU_RGDE7W3_PID2,		26
	.EQU	MPU_RGDE7W3_PID1,		25
	.EQU	MPU_RGDE7W3_PID0,		24
	.EQU	MPU_RGDE7W3_PIDMSK7,		23
	.EQU	MPU_RGDE7W3_PIDMSK6,		22
	.EQU	MPU_RGDE7W3_PIDMSK5,		21
	.EQU	MPU_RGDE7W3_PIDMSK4,		20
	.EQU	MPU_RGDE7W3_PIDMSK3,		19
	.EQU	MPU_RGDE7W3_PIDMSK2,		18
	.EQU	MPU_RGDE7W3_PIDMSK1,		17
	.EQU	MPU_RGDE7W3_PIDMSK0,		16
	.EQU	MPU_RGDE7W3_RGDEVLD,		0
//  register-------------------------------------
	.EQU	MPU_RGDE8W0,	0x40001780
//  0x4000 1780  MPU_RGDE8W0   Bits-------------------------------------
	.EQU	MPU_RGDE8W0_STRADDR31,		31
	.EQU	MPU_RGDE8W0_STRADDR30,		30
	.EQU	MPU_RGDE8W0_STRADDR29,		29
	.EQU	MPU_RGDE8W0_STRADDR28,		28
	.EQU	MPU_RGDE8W0_STRADDR27,		27
	.EQU	MPU_RGDE8W0_STRADDR26,		26
	.EQU	MPU_RGDE8W0_STRADDR25,		25
	.EQU	MPU_RGDE8W0_STRADDR24,		24
	.EQU	MPU_RGDE8W0_STRADDR23,		23
	.EQU	MPU_RGDE8W0_STRADDR22,		22
	.EQU	MPU_RGDE8W0_STRADDR21,		21
	.EQU	MPU_RGDE8W0_STRADDR20,		20
	.EQU	MPU_RGDE8W0_STRADDR19,		19
	.EQU	MPU_RGDE8W0_STRADDR18,		18
	.EQU	MPU_RGDE8W0_STRADDR17,		17
	.EQU	MPU_RGDE8W0_STRADDR16,		16
	.EQU	MPU_RGDE8W0_STRADDR15,		15
	.EQU	MPU_RGDE8W0_STRADDR14,		14
	.EQU	MPU_RGDE8W0_STRADDR13,		13
	.EQU	MPU_RGDE8W0_STRADDR12,		12
	.EQU	MPU_RGDE8W0_STRADDR11,		11
	.EQU	MPU_RGDE8W0_STRADDR10,		10
	.EQU	MPU_RGDE8W0_STRADDR9,		9
	.EQU	MPU_RGDE8W0_STRADDR8,		8
	.EQU	MPU_RGDE8W0_STRADDR7,		7
	.EQU	MPU_RGDE8W0_STRADDR6,		6
	.EQU	MPU_RGDE8W0_STRADDR5,		5
//  register-------------------------------------
	.EQU	MPU_RGDE8W1,	0x40001784
//  0x4000 1784  MPU_RGDE8W1   Bits-------------------------------------
	.EQU	MPU_RGDE8W1_ENDADDR31,		31
	.EQU	MPU_RGDE8W1_ENDADDR30,		30
	.EQU	MPU_RGDE8W1_ENDADDR29,		29
	.EQU	MPU_RGDE8W1_ENDADDR28,		28
	.EQU	MPU_RGDE8W1_ENDADDR27,		27
	.EQU	MPU_RGDE8W1_ENDADDR26,		26
	.EQU	MPU_RGDE8W1_ENDADDR25,		25
	.EQU	MPU_RGDE8W1_ENDADDR24,		24
	.EQU	MPU_RGDE8W1_ENDADDR23,		23
	.EQU	MPU_RGDE8W1_ENDADDR22,		22
	.EQU	MPU_RGDE8W1_ENDADDR21,		21
	.EQU	MPU_RGDE8W1_ENDADDR20,		20
	.EQU	MPU_RGDE8W1_ENDADDR19,		19
	.EQU	MPU_RGDE8W1_ENDADDR18,		18
	.EQU	MPU_RGDE8W1_ENDADDR17,		17
	.EQU	MPU_RGDE8W1_ENDADDR16,		16
	.EQU	MPU_RGDE8W1_ENDADDR15,		15
	.EQU	MPU_RGDE8W1_ENDADDR14,		14
	.EQU	MPU_RGDE8W1_ENDADDR13,		13
	.EQU	MPU_RGDE8W1_ENDADDR12,		12
	.EQU	MPU_RGDE8W1_ENDADDR11,		11
	.EQU	MPU_RGDE8W1_ENDADDR10,		10
	.EQU	MPU_RGDE8W1_ENDADDR9,		9
	.EQU	MPU_RGDE8W1_ENDADDR8,		8
	.EQU	MPU_RGDE8W1_ENDADDR7,		7
	.EQU	MPU_RGDE8W1_ENDADDR6,		6
	.EQU	MPU_RGDE8W1_ENDADDR5,		5
//  register-------------------------------------
	.EQU	MPU_RGDE8W2,	0x40001788
//  0x4000 1788  MPU_RGDE8W2   Bits-------------------------------------
	.EQU	MPU_RGDE8W2_M2SMAC1,		16
	.EQU	MPU_RGDE8W2_M2SMAC0,		15
	.EQU	MPU_RGDE8W2_M2UMAC2,		14
	.EQU	MPU_RGDE8W2_M2UMAC1,		13
	.EQU	MPU_RGDE8W2_M2UMAC0,		12
	.EQU	MPU_RGDE8W2_M1PEN,		11
	.EQU	MPU_RGDE8W2_M1SMAC1,		10
	.EQU	MPU_RGDE8W2_M1SMAC0,		9
	.EQU	MPU_RGDE8W2_M1UMAC2,		8
	.EQU	MPU_RGDE8W2_M1UMAC1,		7
	.EQU	MPU_RGDE8W2_M1UMAC0,		6
	.EQU	MPU_RGDE8W2_M0PEN,		5
	.EQU	MPU_RGDE8W2_M0SMAC1,		4
	.EQU	MPU_RGDE8W2_M0SMAC0,		3
	.EQU	MPU_RGDE8W2_M0UMAC2,		2
	.EQU	MPU_RGDE8W2_M0UMAC1,		1
	.EQU	MPU_RGDE8W2_M0UMAC0,		0
//  register-------------------------------------
	.EQU	MPU_RGDE8W3,	0x4000178C
//  0x4000 178C  MPU_RGDE8W3   Bits-------------------------------------
	.EQU	MPU_RGDE8W3_PID7,		31
	.EQU	MPU_RGDE8W3_PID6,		30
	.EQU	MPU_RGDE8W3_PID5,		29
	.EQU	MPU_RGDE8W3_PID4,		28
	.EQU	MPU_RGDE8W3_PID3,		27
	.EQU	MPU_RGDE8W3_PID2,		26
	.EQU	MPU_RGDE8W3_PID1,		25
	.EQU	MPU_RGDE8W3_PID0,		24
	.EQU	MPU_RGDE8W3_PIDMSK7,		23
	.EQU	MPU_RGDE8W3_PIDMSK6,		22
	.EQU	MPU_RGDE8W3_PIDMSK5,		21
	.EQU	MPU_RGDE8W3_PIDMSK4,		20
	.EQU	MPU_RGDE8W3_PIDMSK3,		19
	.EQU	MPU_RGDE8W3_PIDMSK2,		18
	.EQU	MPU_RGDE8W3_PIDMSK1,		17
	.EQU	MPU_RGDE8W3_PIDMSK0,		16
	.EQU	MPU_RGDE8W3_RGDEVLD,		0
//  register-------------------------------------
	.EQU	MPU_RGDE9W0,	0x40001790
//  0x4000 1790  MPU_RGDE9W0   Bits-------------------------------------
	.EQU	MPU_RGDE9W0_STRADDR31,		31
	.EQU	MPU_RGDE9W0_STRADDR30,		30
	.EQU	MPU_RGDE9W0_STRADDR29,		29
	.EQU	MPU_RGDE9W0_STRADDR28,		28
	.EQU	MPU_RGDE9W0_STRADDR27,		27
	.EQU	MPU_RGDE9W0_STRADDR26,		26
	.EQU	MPU_RGDE9W0_STRADDR25,		25
	.EQU	MPU_RGDE9W0_STRADDR24,		24
	.EQU	MPU_RGDE9W0_STRADDR23,		23
	.EQU	MPU_RGDE9W0_STRADDR22,		22
	.EQU	MPU_RGDE9W0_STRADDR21,		21
	.EQU	MPU_RGDE9W0_STRADDR20,		20
	.EQU	MPU_RGDE9W0_STRADDR19,		19
	.EQU	MPU_RGDE9W0_STRADDR18,		18
	.EQU	MPU_RGDE9W0_STRADDR17,		17
	.EQU	MPU_RGDE9W0_STRADDR16,		16
	.EQU	MPU_RGDE9W0_STRADDR15,		15
	.EQU	MPU_RGDE9W0_STRADDR14,		14
	.EQU	MPU_RGDE9W0_STRADDR13,		13
	.EQU	MPU_RGDE9W0_STRADDR12,		12
	.EQU	MPU_RGDE9W0_STRADDR11,		11
	.EQU	MPU_RGDE9W0_STRADDR10,		10
	.EQU	MPU_RGDE9W0_STRADDR9,		9
	.EQU	MPU_RGDE9W0_STRADDR8,		8
	.EQU	MPU_RGDE9W0_STRADDR7,		7
	.EQU	MPU_RGDE9W0_STRADDR6,		6
	.EQU	MPU_RGDE9W0_STRADDR5,		5
//  register-------------------------------------
	.EQU	MPU_RGDE9W1,	0x40001794
//  0x4000 1794  MPU_RGDE9W1   Bits-------------------------------------
	.EQU	MPU_RGDE9W1_ENDADDR31,		31
	.EQU	MPU_RGDE9W1_ENDADDR30,		30
	.EQU	MPU_RGDE9W1_ENDADDR29,		29
	.EQU	MPU_RGDE9W1_ENDADDR28,		28
	.EQU	MPU_RGDE9W1_ENDADDR27,		27
	.EQU	MPU_RGDE9W1_ENDADDR26,		26
	.EQU	MPU_RGDE9W1_ENDADDR25,		25
	.EQU	MPU_RGDE9W1_ENDADDR24,		24
	.EQU	MPU_RGDE9W1_ENDADDR23,		23
	.EQU	MPU_RGDE9W1_ENDADDR22,		22
	.EQU	MPU_RGDE9W1_ENDADDR21,		21
	.EQU	MPU_RGDE9W1_ENDADDR20,		20
	.EQU	MPU_RGDE9W1_ENDADDR19,		19
	.EQU	MPU_RGDE9W1_ENDADDR18,		18
	.EQU	MPU_RGDE9W1_ENDADDR17,		17
	.EQU	MPU_RGDE9W1_ENDADDR16,		16
	.EQU	MPU_RGDE9W1_ENDADDR15,		15
	.EQU	MPU_RGDE9W1_ENDADDR14,		14
	.EQU	MPU_RGDE9W1_ENDADDR13,		13
	.EQU	MPU_RGDE9W1_ENDADDR12,		12
	.EQU	MPU_RGDE9W1_ENDADDR11,		11
	.EQU	MPU_RGDE9W1_ENDADDR10,		10
	.EQU	MPU_RGDE9W1_ENDADDR9,		9
	.EQU	MPU_RGDE9W1_ENDADDR8,		8
	.EQU	MPU_RGDE9W1_ENDADDR7,		7
	.EQU	MPU_RGDE9W1_ENDADDR6,		6
	.EQU	MPU_RGDE9W1_ENDADDR5,		5
//  register-------------------------------------
	.EQU	MPU_RGDE9W2,	0x40001798
//  0x4000 1798  MPU_RGDE9W2   Bits-------------------------------------
	.EQU	MPU_RGDE9W2_M2SMAC1,		16
	.EQU	MPU_RGDE9W2_M2SMAC0,		15
	.EQU	MPU_RGDE9W2_M2UMAC2,		14
	.EQU	MPU_RGDE9W2_M2UMAC1,		13
	.EQU	MPU_RGDE9W2_M2UMAC0,		12
	.EQU	MPU_RGDE9W2_M1PEN,		11
	.EQU	MPU_RGDE9W2_M1SMAC1,		10
	.EQU	MPU_RGDE9W2_M1SMAC0,		9
	.EQU	MPU_RGDE9W2_M1UMAC2,		8
	.EQU	MPU_RGDE9W2_M1UMAC1,		7
	.EQU	MPU_RGDE9W2_M1UMAC0,		6
	.EQU	MPU_RGDE9W2_M0PEN,		5
	.EQU	MPU_RGDE9W2_M0SMAC1,		4
	.EQU	MPU_RGDE9W2_M0SMAC0,		3
	.EQU	MPU_RGDE9W2_M0UMAC2,		2
	.EQU	MPU_RGDE9W2_M0UMAC1,		1
	.EQU	MPU_RGDE9W2_M0UMAC0,		0
//  register-------------------------------------
	.EQU	MPU_RGDE9W3,	0x4000179C
//  0x4000 179C  MPU_RGDE9W3   Bits-------------------------------------
	.EQU	MPU_RGDE9W3_PID7,		31
	.EQU	MPU_RGDE9W3_PID6,		30
	.EQU	MPU_RGDE9W3_PID5,		29
	.EQU	MPU_RGDE9W3_PID4,		28
	.EQU	MPU_RGDE9W3_PID3,		27
	.EQU	MPU_RGDE9W3_PID2,		26
	.EQU	MPU_RGDE9W3_PID1,		25
	.EQU	MPU_RGDE9W3_PID0,		24
	.EQU	MPU_RGDE9W3_PIDMSK7,		23
	.EQU	MPU_RGDE9W3_PIDMSK6,		22
	.EQU	MPU_RGDE9W3_PIDMSK5,		21
	.EQU	MPU_RGDE9W3_PIDMSK4,		20
	.EQU	MPU_RGDE9W3_PIDMSK3,		19
	.EQU	MPU_RGDE9W3_PIDMSK2,		18
	.EQU	MPU_RGDE9W3_PIDMSK1,		17
	.EQU	MPU_RGDE9W3_PIDMSK0,		16
	.EQU	MPU_RGDE9W3_RGDEVLD,		0
//  register-------------------------------------
	.EQU	MPU_RGDE10W0,	0x400017A0
//  0x4000 17A0  MPU_RGDE10W0   Bits-------------------------------------
	.EQU	MPU_RGDE10W0_STRADDR31,		31
	.EQU	MPU_RGDE10W0_STRADDR30,		30
	.EQU	MPU_RGDE10W0_STRADDR29,		29
	.EQU	MPU_RGDE10W0_STRADDR28,		28
	.EQU	MPU_RGDE10W0_STRADDR27,		27
	.EQU	MPU_RGDE10W0_STRADDR26,		26
	.EQU	MPU_RGDE10W0_STRADDR25,		25
	.EQU	MPU_RGDE10W0_STRADDR24,		24
	.EQU	MPU_RGDE10W0_STRADDR23,		23
	.EQU	MPU_RGDE10W0_STRADDR22,		22
	.EQU	MPU_RGDE10W0_STRADDR21,		21
	.EQU	MPU_RGDE10W0_STRADDR20,		20
	.EQU	MPU_RGDE10W0_STRADDR19,		19
	.EQU	MPU_RGDE10W0_STRADDR18,		18
	.EQU	MPU_RGDE10W0_STRADDR17,		17
	.EQU	MPU_RGDE10W0_STRADDR16,		16
	.EQU	MPU_RGDE10W0_STRADDR15,		15
	.EQU	MPU_RGDE10W0_STRADDR14,		14
	.EQU	MPU_RGDE10W0_STRADDR13,		13
	.EQU	MPU_RGDE10W0_STRADDR12,		12
	.EQU	MPU_RGDE10W0_STRADDR11,		11
	.EQU	MPU_RGDE10W0_STRADDR10,		10
	.EQU	MPU_RGDE10W0_STRADDR9,		9
	.EQU	MPU_RGDE10W0_STRADDR8,		8
	.EQU	MPU_RGDE10W0_STRADDR7,		7
	.EQU	MPU_RGDE10W0_STRADDR6,		6
	.EQU	MPU_RGDE10W0_STRADDR5,		5
//  register-------------------------------------
	.EQU	MPU_RGDE10W1,	0x400017A4
//  0x4000 17A4  MPU_RGDE10W1   Bits-------------------------------------
	.EQU	MPU_RGDE10W1_ENDADDR31,		31
	.EQU	MPU_RGDE10W1_ENDADDR30,		30
	.EQU	MPU_RGDE10W1_ENDADDR29,		29
	.EQU	MPU_RGDE10W1_ENDADDR28,		28
	.EQU	MPU_RGDE10W1_ENDADDR27,		27
	.EQU	MPU_RGDE10W1_ENDADDR26,		26
	.EQU	MPU_RGDE10W1_ENDADDR25,		25
	.EQU	MPU_RGDE10W1_ENDADDR24,		24
	.EQU	MPU_RGDE10W1_ENDADDR23,		23
	.EQU	MPU_RGDE10W1_ENDADDR22,		22
	.EQU	MPU_RGDE10W1_ENDADDR21,		21
	.EQU	MPU_RGDE10W1_ENDADDR20,		20
	.EQU	MPU_RGDE10W1_ENDADDR19,		19
	.EQU	MPU_RGDE10W1_ENDADDR18,		18
	.EQU	MPU_RGDE10W1_ENDADDR17,		17
	.EQU	MPU_RGDE10W1_ENDADDR16,		16
	.EQU	MPU_RGDE10W1_ENDADDR15,		15
	.EQU	MPU_RGDE10W1_ENDADDR14,		14
	.EQU	MPU_RGDE10W1_ENDADDR13,		13
	.EQU	MPU_RGDE10W1_ENDADDR12,		12
	.EQU	MPU_RGDE10W1_ENDADDR11,		11
	.EQU	MPU_RGDE10W1_ENDADDR10,		10
	.EQU	MPU_RGDE10W1_ENDADDR9,		9
	.EQU	MPU_RGDE10W1_ENDADDR8,		8
	.EQU	MPU_RGDE10W1_ENDADDR7,		7
	.EQU	MPU_RGDE10W1_ENDADDR6,		6
	.EQU	MPU_RGDE10W1_ENDADDR5,		5
//  register-------------------------------------
	.EQU	MPU_RGDE10W2,	0x400017A8
//  0x4000 17A8  MPU_RGDE10W2   Bits-------------------------------------
	.EQU	MPU_RGDE10W2_M2SMAC1,		16
	.EQU	MPU_RGDE10W2_M2SMAC0,		15
	.EQU	MPU_RGDE10W2_M2UMAC2,		14
	.EQU	MPU_RGDE10W2_M2UMAC1,		13
	.EQU	MPU_RGDE10W2_M2UMAC0,		12
	.EQU	MPU_RGDE10W2_M1PEN,		11
	.EQU	MPU_RGDE10W2_M1SMAC1,		10
	.EQU	MPU_RGDE10W2_M1SMAC0,		9
	.EQU	MPU_RGDE10W2_M1UMAC2,		8
	.EQU	MPU_RGDE10W2_M1UMAC1,		7
	.EQU	MPU_RGDE10W2_M1UMAC0,		6
	.EQU	MPU_RGDE10W2_M0PEN,		5
	.EQU	MPU_RGDE10W2_M0SMAC1,		4
	.EQU	MPU_RGDE10W2_M0SMAC0,		3
	.EQU	MPU_RGDE10W2_M0UMAC2,		2
	.EQU	MPU_RGDE10W2_M0UMAC1,		1
	.EQU	MPU_RGDE10W2_M0UMAC0,		0
//  register-------------------------------------
	.EQU	MPU_RGDE10W3,	0x400017AC
//  0x4000 17AC  MPU_RGDE10W3   Bits-------------------------------------
	.EQU	MPU_RGDE10W3_PID7,		31
	.EQU	MPU_RGDE10W3_PID6,		30
	.EQU	MPU_RGDE10W3_PID5,		29
	.EQU	MPU_RGDE10W3_PID4,		28
	.EQU	MPU_RGDE10W3_PID3,		27
	.EQU	MPU_RGDE10W3_PID2,		26
	.EQU	MPU_RGDE10W3_PID1,		25
	.EQU	MPU_RGDE10W3_PID0,		24
	.EQU	MPU_RGDE10W3_PIDMSK7,		23
	.EQU	MPU_RGDE10W3_PIDMSK6,		22
	.EQU	MPU_RGDE10W3_PIDMSK5,		21
	.EQU	MPU_RGDE10W3_PIDMSK4,		20
	.EQU	MPU_RGDE10W3_PIDMSK3,		19
	.EQU	MPU_RGDE10W3_PIDMSK2,		18
	.EQU	MPU_RGDE10W3_PIDMSK1,		17
	.EQU	MPU_RGDE10W3_PIDMSK0,		16
	.EQU	MPU_RGDE10W3_RGDEVLD,		0
//  register-------------------------------------
	.EQU	MPU_RGDE11W0,	0x400017B0
//  0x4000 17B0  MPU_RGDE11W0   Bits-------------------------------------
	.EQU	MPU_RGDE11W0_STRADDR31,		31
	.EQU	MPU_RGDE11W0_STRADDR30,		30
	.EQU	MPU_RGDE11W0_STRADDR29,		29
	.EQU	MPU_RGDE11W0_STRADDR28,		28
	.EQU	MPU_RGDE11W0_STRADDR27,		27
	.EQU	MPU_RGDE11W0_STRADDR26,		26
	.EQU	MPU_RGDE11W0_STRADDR25,		25
	.EQU	MPU_RGDE11W0_STRADDR24,		24
	.EQU	MPU_RGDE11W0_STRADDR23,		23
	.EQU	MPU_RGDE11W0_STRADDR22,		22
	.EQU	MPU_RGDE11W0_STRADDR21,		21
	.EQU	MPU_RGDE11W0_STRADDR20,		20
	.EQU	MPU_RGDE11W0_STRADDR19,		19
	.EQU	MPU_RGDE11W0_STRADDR18,		18
	.EQU	MPU_RGDE11W0_STRADDR17,		17
	.EQU	MPU_RGDE11W0_STRADDR16,		16
	.EQU	MPU_RGDE11W0_STRADDR15,		15
	.EQU	MPU_RGDE11W0_STRADDR14,		14
	.EQU	MPU_RGDE11W0_STRADDR13,		13
	.EQU	MPU_RGDE11W0_STRADDR12,		12
	.EQU	MPU_RGDE11W0_STRADDR11,		11
	.EQU	MPU_RGDE11W0_STRADDR10,		10
	.EQU	MPU_RGDE11W0_STRADDR9,		9
	.EQU	MPU_RGDE11W0_STRADDR8,		8
	.EQU	MPU_RGDE11W0_STRADDR7,		7
	.EQU	MPU_RGDE11W0_STRADDR6,		6
	.EQU	MPU_RGDE11W0_STRADDR5,		5
//  register-------------------------------------
	.EQU	MPU_RGDE11W1,	0x400017B4
//  0x4000 17B4  MPU_RGDE11W1   Bits-------------------------------------
	.EQU	MPU_RGDE11W1_ENDADDR31,		31
	.EQU	MPU_RGDE11W1_ENDADDR30,		30
	.EQU	MPU_RGDE11W1_ENDADDR29,		29
	.EQU	MPU_RGDE11W1_ENDADDR28,		28
	.EQU	MPU_RGDE11W1_ENDADDR27,		27
	.EQU	MPU_RGDE11W1_ENDADDR26,		26
	.EQU	MPU_RGDE11W1_ENDADDR25,		25
	.EQU	MPU_RGDE11W1_ENDADDR24,		24
	.EQU	MPU_RGDE11W1_ENDADDR23,		23
	.EQU	MPU_RGDE11W1_ENDADDR22,		22
	.EQU	MPU_RGDE11W1_ENDADDR21,		21
	.EQU	MPU_RGDE11W1_ENDADDR20,		20
	.EQU	MPU_RGDE11W1_ENDADDR19,		19
	.EQU	MPU_RGDE11W1_ENDADDR18,		18
	.EQU	MPU_RGDE11W1_ENDADDR17,		17
	.EQU	MPU_RGDE11W1_ENDADDR16,		16
	.EQU	MPU_RGDE11W1_ENDADDR15,		15
	.EQU	MPU_RGDE11W1_ENDADDR14,		14
	.EQU	MPU_RGDE11W1_ENDADDR13,		13
	.EQU	MPU_RGDE11W1_ENDADDR12,		12
	.EQU	MPU_RGDE11W1_ENDADDR11,		11
	.EQU	MPU_RGDE11W1_ENDADDR10,		10
	.EQU	MPU_RGDE11W1_ENDADDR9,		9
	.EQU	MPU_RGDE11W1_ENDADDR8,		8
	.EQU	MPU_RGDE11W1_ENDADDR7,		7
	.EQU	MPU_RGDE11W1_ENDADDR6,		6
	.EQU	MPU_RGDE11W1_ENDADDR5,		5
//  register-------------------------------------
	.EQU	MPU_RGDE11W2,	0x400017B8
//  0x4000 17B8  MPU_RGDE11W2   Bits-------------------------------------
	.EQU	MPU_RGDE11W2_M2SMAC1,		16
	.EQU	MPU_RGDE11W2_M2SMAC0,		15
	.EQU	MPU_RGDE11W2_M2UMAC2,		14
	.EQU	MPU_RGDE11W2_M2UMAC1,		13
	.EQU	MPU_RGDE11W2_M2UMAC0,		12
	.EQU	MPU_RGDE11W2_M1PEN,		11
	.EQU	MPU_RGDE11W2_M1SMAC1,		10
	.EQU	MPU_RGDE11W2_M1SMAC0,		9
	.EQU	MPU_RGDE11W2_M1UMAC2,		8
	.EQU	MPU_RGDE11W2_M1UMAC1,		7
	.EQU	MPU_RGDE11W2_M1UMAC0,		6
	.EQU	MPU_RGDE11W2_M0PEN,		5
	.EQU	MPU_RGDE11W2_M0SMAC1,		4
	.EQU	MPU_RGDE11W2_M0SMAC0,		3
	.EQU	MPU_RGDE11W2_M0UMAC2,		2
	.EQU	MPU_RGDE11W2_M0UMAC1,		1
	.EQU	MPU_RGDE11W2_M0UMAC0,		0
//  register-------------------------------------
	.EQU	MPU_RGDE11W3,	0x400017BC
//  0x4000 17BC  MPU_RGDE11W3   Bits-------------------------------------
	.EQU	MPU_RGDE11W3_PID7,		31
	.EQU	MPU_RGDE11W3_PID6,		30
	.EQU	MPU_RGDE11W3_PID5,		29
	.EQU	MPU_RGDE11W3_PID4,		28
	.EQU	MPU_RGDE11W3_PID3,		27
	.EQU	MPU_RGDE11W3_PID2,		26
	.EQU	MPU_RGDE11W3_PID1,		25
	.EQU	MPU_RGDE11W3_PID0,		24
	.EQU	MPU_RGDE11W3_PIDMSK7,		23
	.EQU	MPU_RGDE11W3_PIDMSK6,		22
	.EQU	MPU_RGDE11W3_PIDMSK5,		21
	.EQU	MPU_RGDE11W3_PIDMSK4,		20
	.EQU	MPU_RGDE11W3_PIDMSK3,		19
	.EQU	MPU_RGDE11W3_PIDMSK2,		18
	.EQU	MPU_RGDE11W3_PIDMSK1,		17
	.EQU	MPU_RGDE11W3_PIDMSK0,		16
	.EQU	MPU_RGDE11W3_RGDEVLD,		0
//  register-------------------------------------
	.EQU	MPU_RGDE12W0,	0x400017C0
//  0x4000 17C0  MPU_RGDE12W0   Bits-------------------------------------
	.EQU	MPU_RGDE12W0_STRADDR31,		31
	.EQU	MPU_RGDE12W0_STRADDR30,		30
	.EQU	MPU_RGDE12W0_STRADDR29,		29
	.EQU	MPU_RGDE12W0_STRADDR28,		28
	.EQU	MPU_RGDE12W0_STRADDR27,		27
	.EQU	MPU_RGDE12W0_STRADDR26,		26
	.EQU	MPU_RGDE12W0_STRADDR25,		25
	.EQU	MPU_RGDE12W0_STRADDR24,		24
	.EQU	MPU_RGDE12W0_STRADDR23,		23
	.EQU	MPU_RGDE12W0_STRADDR22,		22
	.EQU	MPU_RGDE12W0_STRADDR21,		21
	.EQU	MPU_RGDE12W0_STRADDR20,		20
	.EQU	MPU_RGDE12W0_STRADDR19,		19
	.EQU	MPU_RGDE12W0_STRADDR18,		18
	.EQU	MPU_RGDE12W0_STRADDR17,		17
	.EQU	MPU_RGDE12W0_STRADDR16,		16
	.EQU	MPU_RGDE12W0_STRADDR15,		15
	.EQU	MPU_RGDE12W0_STRADDR14,		14
	.EQU	MPU_RGDE12W0_STRADDR13,		13
	.EQU	MPU_RGDE12W0_STRADDR12,		12
	.EQU	MPU_RGDE12W0_STRADDR11,		11
	.EQU	MPU_RGDE12W0_STRADDR10,		10
	.EQU	MPU_RGDE12W0_STRADDR9,		9
	.EQU	MPU_RGDE12W0_STRADDR8,		8
	.EQU	MPU_RGDE12W0_STRADDR7,		7
	.EQU	MPU_RGDE12W0_STRADDR6,		6
	.EQU	MPU_RGDE12W0_STRADDR5,		5
//  register-------------------------------------
	.EQU	MPU_RGDE12W1,	0x400017C4
//  0x4000 17C4  MPU_RGDE12W1   Bits-------------------------------------
	.EQU	MPU_RGDE12W1_ENDADDR31,		31
	.EQU	MPU_RGDE12W1_ENDADDR30,		30
	.EQU	MPU_RGDE12W1_ENDADDR29,		29
	.EQU	MPU_RGDE12W1_ENDADDR28,		28
	.EQU	MPU_RGDE12W1_ENDADDR27,		27
	.EQU	MPU_RGDE12W1_ENDADDR26,		26
	.EQU	MPU_RGDE12W1_ENDADDR25,		25
	.EQU	MPU_RGDE12W1_ENDADDR24,		24
	.EQU	MPU_RGDE12W1_ENDADDR23,		23
	.EQU	MPU_RGDE12W1_ENDADDR22,		22
	.EQU	MPU_RGDE12W1_ENDADDR21,		21
	.EQU	MPU_RGDE12W1_ENDADDR20,		20
	.EQU	MPU_RGDE12W1_ENDADDR19,		19
	.EQU	MPU_RGDE12W1_ENDADDR18,		18
	.EQU	MPU_RGDE12W1_ENDADDR17,		17
	.EQU	MPU_RGDE12W1_ENDADDR16,		16
	.EQU	MPU_RGDE12W1_ENDADDR15,		15
	.EQU	MPU_RGDE12W1_ENDADDR14,		14
	.EQU	MPU_RGDE12W1_ENDADDR13,		13
	.EQU	MPU_RGDE12W1_ENDADDR12,		12
	.EQU	MPU_RGDE12W1_ENDADDR11,		11
	.EQU	MPU_RGDE12W1_ENDADDR10,		10
	.EQU	MPU_RGDE12W1_ENDADDR9,		9
	.EQU	MPU_RGDE12W1_ENDADDR8,		8
	.EQU	MPU_RGDE12W1_ENDADDR7,		7
	.EQU	MPU_RGDE12W1_ENDADDR6,		6
	.EQU	MPU_RGDE12W1_ENDADDR5,		5
//  register-------------------------------------
	.EQU	MPU_RGDE12W2,	0x400017C8
//  0x4000 17C8  MPU_RGDE12W2   Bits-------------------------------------
	.EQU	MPU_RGDE12W2_M2SMAC1,		16
	.EQU	MPU_RGDE12W2_M2SMAC0,		15
	.EQU	MPU_RGDE12W2_M2UMAC2,		14
	.EQU	MPU_RGDE12W2_M2UMAC1,		13
	.EQU	MPU_RGDE12W2_M2UMAC0,		12
	.EQU	MPU_RGDE12W2_M1PEN,		11
	.EQU	MPU_RGDE12W2_M1SMAC1,		10
	.EQU	MPU_RGDE12W2_M1SMAC0,		9
	.EQU	MPU_RGDE12W2_M1UMAC2,		8
	.EQU	MPU_RGDE12W2_M1UMAC1,		7
	.EQU	MPU_RGDE12W2_M1UMAC0,		6
	.EQU	MPU_RGDE12W2_M0PEN,		5
	.EQU	MPU_RGDE12W2_M0SMAC1,		4
	.EQU	MPU_RGDE12W2_M0SMAC0,		3
	.EQU	MPU_RGDE12W2_M0UMAC2,		2
	.EQU	MPU_RGDE12W2_M0UMAC1,		1
	.EQU	MPU_RGDE12W2_M0UMAC0,		0
//  register-------------------------------------
	.EQU	MPU_RGDE12W3,	0x400017CC
//  0x4000 17CC  MPU_RGDE12W3   Bits-------------------------------------
	.EQU	MPU_RGDE12W3_PID7,		31
	.EQU	MPU_RGDE12W3_PID6,		30
	.EQU	MPU_RGDE12W3_PID5,		29
	.EQU	MPU_RGDE12W3_PID4,		28
	.EQU	MPU_RGDE12W3_PID3,		27
	.EQU	MPU_RGDE12W3_PID2,		26
	.EQU	MPU_RGDE12W3_PID1,		25
	.EQU	MPU_RGDE12W3_PID0,		24
	.EQU	MPU_RGDE12W3_PIDMSK7,		23
	.EQU	MPU_RGDE12W3_PIDMSK6,		22
	.EQU	MPU_RGDE12W3_PIDMSK5,		21
	.EQU	MPU_RGDE12W3_PIDMSK4,		20
	.EQU	MPU_RGDE12W3_PIDMSK3,		19
	.EQU	MPU_RGDE12W3_PIDMSK2,		18
	.EQU	MPU_RGDE12W3_PIDMSK1,		17
	.EQU	MPU_RGDE12W3_PIDMSK0,		16
	.EQU	MPU_RGDE12W3_RGDEVLD,		0
//  register-------------------------------------
	.EQU	MPU_RGDE13W0,	0x400017D0
//  0x4000 17D0  MPU_RGDE13W0   Bits-------------------------------------
	.EQU	MPU_RGDE13W0_STRADDR31,		31
	.EQU	MPU_RGDE13W0_STRADDR30,		30
	.EQU	MPU_RGDE13W0_STRADDR29,		29
	.EQU	MPU_RGDE13W0_STRADDR28,		28
	.EQU	MPU_RGDE13W0_STRADDR27,		27
	.EQU	MPU_RGDE13W0_STRADDR26,		26
	.EQU	MPU_RGDE13W0_STRADDR25,		25
	.EQU	MPU_RGDE13W0_STRADDR24,		24
	.EQU	MPU_RGDE13W0_STRADDR23,		23
	.EQU	MPU_RGDE13W0_STRADDR22,		22
	.EQU	MPU_RGDE13W0_STRADDR21,		21
	.EQU	MPU_RGDE13W0_STRADDR20,		20
	.EQU	MPU_RGDE13W0_STRADDR19,		19
	.EQU	MPU_RGDE13W0_STRADDR18,		18
	.EQU	MPU_RGDE13W0_STRADDR17,		17
	.EQU	MPU_RGDE13W0_STRADDR16,		16
	.EQU	MPU_RGDE13W0_STRADDR15,		15
	.EQU	MPU_RGDE13W0_STRADDR14,		14
	.EQU	MPU_RGDE13W0_STRADDR13,		13
	.EQU	MPU_RGDE13W0_STRADDR12,		12
	.EQU	MPU_RGDE13W0_STRADDR11,		11
	.EQU	MPU_RGDE13W0_STRADDR10,		10
	.EQU	MPU_RGDE13W0_STRADDR9,		9
	.EQU	MPU_RGDE13W0_STRADDR8,		8
	.EQU	MPU_RGDE13W0_STRADDR7,		7
	.EQU	MPU_RGDE13W0_STRADDR6,		6
	.EQU	MPU_RGDE13W0_STRADDR5,		5
//  register-------------------------------------
	.EQU	MPU_RGDE13W1,	0x400017D4
//  0x4000 17D4  MPU_RGDE13W1   Bits-------------------------------------
	.EQU	MPU_RGDE13W1_ENDADDR31,		31
	.EQU	MPU_RGDE13W1_ENDADDR30,		30
	.EQU	MPU_RGDE13W1_ENDADDR29,		29
	.EQU	MPU_RGDE13W1_ENDADDR28,		28
	.EQU	MPU_RGDE13W1_ENDADDR27,		27
	.EQU	MPU_RGDE13W1_ENDADDR26,		26
	.EQU	MPU_RGDE13W1_ENDADDR25,		25
	.EQU	MPU_RGDE13W1_ENDADDR24,		24
	.EQU	MPU_RGDE13W1_ENDADDR23,		23
	.EQU	MPU_RGDE13W1_ENDADDR22,		22
	.EQU	MPU_RGDE13W1_ENDADDR21,		21
	.EQU	MPU_RGDE13W1_ENDADDR20,		20
	.EQU	MPU_RGDE13W1_ENDADDR19,		19
	.EQU	MPU_RGDE13W1_ENDADDR18,		18
	.EQU	MPU_RGDE13W1_ENDADDR17,		17
	.EQU	MPU_RGDE13W1_ENDADDR16,		16
	.EQU	MPU_RGDE13W1_ENDADDR15,		15
	.EQU	MPU_RGDE13W1_ENDADDR14,		14
	.EQU	MPU_RGDE13W1_ENDADDR13,		13
	.EQU	MPU_RGDE13W1_ENDADDR12,		12
	.EQU	MPU_RGDE13W1_ENDADDR11,		11
	.EQU	MPU_RGDE13W1_ENDADDR10,		10
	.EQU	MPU_RGDE13W1_ENDADDR9,		9
	.EQU	MPU_RGDE13W1_ENDADDR8,		8
	.EQU	MPU_RGDE13W1_ENDADDR7,		7
	.EQU	MPU_RGDE13W1_ENDADDR6,		6
	.EQU	MPU_RGDE13W1_ENDADDR5,		5
//  register-------------------------------------
	.EQU	MPU_RGDE13W2,	0x400017D8
//  0x4000 17D8  MPU_RGDE13W2   Bits-------------------------------------
	.EQU	MPU_RGDE13W2_M2SMAC1,		16
	.EQU	MPU_RGDE13W2_M2SMAC0,		15
	.EQU	MPU_RGDE13W2_M2UMAC2,		14
	.EQU	MPU_RGDE13W2_M2UMAC1,		13
	.EQU	MPU_RGDE13W2_M2UMAC0,		12
	.EQU	MPU_RGDE13W2_M1PEN,		11
	.EQU	MPU_RGDE13W2_M1SMAC1,		10
	.EQU	MPU_RGDE13W2_M1SMAC0,		9
	.EQU	MPU_RGDE13W2_M1UMAC2,		8
	.EQU	MPU_RGDE13W2_M1UMAC1,		7
	.EQU	MPU_RGDE13W2_M1UMAC0,		6
	.EQU	MPU_RGDE13W2_M0PEN,		5
	.EQU	MPU_RGDE13W2_M0SMAC1,		4
	.EQU	MPU_RGDE13W2_M0SMAC0,		3
	.EQU	MPU_RGDE13W2_M0UMAC2,		2
	.EQU	MPU_RGDE13W2_M0UMAC1,		1
	.EQU	MPU_RGDE13W2_M0UMAC0,		0
//  register-------------------------------------
	.EQU	MPU_RGDE13W3,	0x400017DC
//  0x4000 17DC  MPU_RGDE13W3   Bits-------------------------------------
	.EQU	MPU_RGDE13W3_PID7,		31
	.EQU	MPU_RGDE13W3_PID6,		30
	.EQU	MPU_RGDE13W3_PID5,		29
	.EQU	MPU_RGDE13W3_PID4,		28
	.EQU	MPU_RGDE13W3_PID3,		27
	.EQU	MPU_RGDE13W3_PID2,		26
	.EQU	MPU_RGDE13W3_PID1,		25
	.EQU	MPU_RGDE13W3_PID0,		24
	.EQU	MPU_RGDE13W3_PIDMSK7,		23
	.EQU	MPU_RGDE13W3_PIDMSK6,		22
	.EQU	MPU_RGDE13W3_PIDMSK5,		21
	.EQU	MPU_RGDE13W3_PIDMSK4,		20
	.EQU	MPU_RGDE13W3_PIDMSK3,		19
	.EQU	MPU_RGDE13W3_PIDMSK2,		18
	.EQU	MPU_RGDE13W3_PIDMSK1,		17
	.EQU	MPU_RGDE13W3_PIDMSK0,		16
	.EQU	MPU_RGDE13W3_RGDEVLD,		0
//  register-------------------------------------
	.EQU	MPU_RGDE14W0,	0x400017E0
//  0x4000 17E0  MPU_RGDE14W0   Bits-------------------------------------
	.EQU	MPU_RGDE14W0_STRADDR31,		31
	.EQU	MPU_RGDE14W0_STRADDR30,		30
	.EQU	MPU_RGDE14W0_STRADDR29,		29
	.EQU	MPU_RGDE14W0_STRADDR28,		28
	.EQU	MPU_RGDE14W0_STRADDR27,		27
	.EQU	MPU_RGDE14W0_STRADDR26,		26
	.EQU	MPU_RGDE14W0_STRADDR25,		25
	.EQU	MPU_RGDE14W0_STRADDR24,		24
	.EQU	MPU_RGDE14W0_STRADDR23,		23
	.EQU	MPU_RGDE14W0_STRADDR22,		22
	.EQU	MPU_RGDE14W0_STRADDR21,		21
	.EQU	MPU_RGDE14W0_STRADDR20,		20
	.EQU	MPU_RGDE14W0_STRADDR19,		19
	.EQU	MPU_RGDE14W0_STRADDR18,		18
	.EQU	MPU_RGDE14W0_STRADDR17,		17
	.EQU	MPU_RGDE14W0_STRADDR16,		16
	.EQU	MPU_RGDE14W0_STRADDR15,		15
	.EQU	MPU_RGDE14W0_STRADDR14,		14
	.EQU	MPU_RGDE14W0_STRADDR13,		13
	.EQU	MPU_RGDE14W0_STRADDR12,		12
	.EQU	MPU_RGDE14W0_STRADDR11,		11
	.EQU	MPU_RGDE14W0_STRADDR10,		10
	.EQU	MPU_RGDE14W0_STRADDR9,		9
	.EQU	MPU_RGDE14W0_STRADDR8,		8
	.EQU	MPU_RGDE14W0_STRADDR7,		7
	.EQU	MPU_RGDE14W0_STRADDR6,		6
	.EQU	MPU_RGDE14W0_STRADDR5,		5
//  register-------------------------------------
	.EQU	MPU_RGDE14W1,	0x400017E4
//  0x4000 17E4  MPU_RGDE14W1   Bits-------------------------------------
	.EQU	MPU_RGDE14W1_ENDADDR31,		31
	.EQU	MPU_RGDE14W1_ENDADDR30,		30
	.EQU	MPU_RGDE14W1_ENDADDR29,		29
	.EQU	MPU_RGDE14W1_ENDADDR28,		28
	.EQU	MPU_RGDE14W1_ENDADDR27,		27
	.EQU	MPU_RGDE14W1_ENDADDR26,		26
	.EQU	MPU_RGDE14W1_ENDADDR25,		25
	.EQU	MPU_RGDE14W1_ENDADDR24,		24
	.EQU	MPU_RGDE14W1_ENDADDR23,		23
	.EQU	MPU_RGDE14W1_ENDADDR22,		22
	.EQU	MPU_RGDE14W1_ENDADDR21,		21
	.EQU	MPU_RGDE14W1_ENDADDR20,		20
	.EQU	MPU_RGDE14W1_ENDADDR19,		19
	.EQU	MPU_RGDE14W1_ENDADDR18,		18
	.EQU	MPU_RGDE14W1_ENDADDR17,		17
	.EQU	MPU_RGDE14W1_ENDADDR16,		16
	.EQU	MPU_RGDE14W1_ENDADDR15,		15
	.EQU	MPU_RGDE14W1_ENDADDR14,		14
	.EQU	MPU_RGDE14W1_ENDADDR13,		13
	.EQU	MPU_RGDE14W1_ENDADDR12,		12
	.EQU	MPU_RGDE14W1_ENDADDR11,		11
	.EQU	MPU_RGDE14W1_ENDADDR10,		10
	.EQU	MPU_RGDE14W1_ENDADDR9,		9
	.EQU	MPU_RGDE14W1_ENDADDR8,		8
	.EQU	MPU_RGDE14W1_ENDADDR7,		7
	.EQU	MPU_RGDE14W1_ENDADDR6,		6
	.EQU	MPU_RGDE14W1_ENDADDR5,		5
//  register-------------------------------------
	.EQU	MPU_RGDE14W2,	0x400017E8
//  0x4000 17E8  MPU_RGDE14W2   Bits-------------------------------------
	.EQU	MPU_RGDE14W2_M2SMAC1,		16
	.EQU	MPU_RGDE14W2_M2SMAC0,		15
	.EQU	MPU_RGDE14W2_M2UMAC2,		14
	.EQU	MPU_RGDE14W2_M2UMAC1,		13
	.EQU	MPU_RGDE14W2_M2UMAC0,		12
	.EQU	MPU_RGDE14W2_M1PEN,		11
	.EQU	MPU_RGDE14W2_M1SMAC1,		10
	.EQU	MPU_RGDE14W2_M1SMAC0,		9
	.EQU	MPU_RGDE14W2_M1UMAC2,		8
	.EQU	MPU_RGDE14W2_M1UMAC1,		7
	.EQU	MPU_RGDE14W2_M1UMAC0,		6
	.EQU	MPU_RGDE14W2_M0PEN,		5
	.EQU	MPU_RGDE14W2_M0SMAC1,		4
	.EQU	MPU_RGDE14W2_M0SMAC0,		3
	.EQU	MPU_RGDE14W2_M0UMAC2,		2
	.EQU	MPU_RGDE14W2_M0UMAC1,		1
	.EQU	MPU_RGDE14W2_M0UMAC0,		0
//  register-------------------------------------
	.EQU	MPU_RGDE14W3,	0x400017EC
//  0x4000 17EC  MPU_RGDE14W3   Bits-------------------------------------
	.EQU	MPU_RGDE14W3_PID7,		31
	.EQU	MPU_RGDE14W3_PID6,		30
	.EQU	MPU_RGDE14W3_PID5,		29
	.EQU	MPU_RGDE14W3_PID4,		28
	.EQU	MPU_RGDE14W3_PID3,		27
	.EQU	MPU_RGDE14W3_PID2,		26
	.EQU	MPU_RGDE14W3_PID1,		25
	.EQU	MPU_RGDE14W3_PID0,		24
	.EQU	MPU_RGDE14W3_PIDMSK7,		23
	.EQU	MPU_RGDE14W3_PIDMSK6,		22
	.EQU	MPU_RGDE14W3_PIDMSK5,		21
	.EQU	MPU_RGDE14W3_PIDMSK4,		20
	.EQU	MPU_RGDE14W3_PIDMSK3,		19
	.EQU	MPU_RGDE14W3_PIDMSK2,		18
	.EQU	MPU_RGDE14W3_PIDMSK1,		17
	.EQU	MPU_RGDE14W3_PIDMSK0,		16
	.EQU	MPU_RGDE14W3_RGDEVLD,		0
//  register-------------------------------------
	.EQU	MPU_RGDE15W0,	0x400017F0
//  0x4000 17F0  MPU_RGDE15W0   Bits-------------------------------------
	.EQU	MPU_RGDE15W0_STRADDR31,		31
	.EQU	MPU_RGDE15W0_STRADDR30,		30
	.EQU	MPU_RGDE15W0_STRADDR29,		29
	.EQU	MPU_RGDE15W0_STRADDR28,		28
	.EQU	MPU_RGDE15W0_STRADDR27,		27
	.EQU	MPU_RGDE15W0_STRADDR26,		26
	.EQU	MPU_RGDE15W0_STRADDR25,		25
	.EQU	MPU_RGDE15W0_STRADDR24,		24
	.EQU	MPU_RGDE15W0_STRADDR23,		23
	.EQU	MPU_RGDE15W0_STRADDR22,		22
	.EQU	MPU_RGDE15W0_STRADDR21,		21
	.EQU	MPU_RGDE15W0_STRADDR20,		20
	.EQU	MPU_RGDE15W0_STRADDR19,		19
	.EQU	MPU_RGDE15W0_STRADDR18,		18
	.EQU	MPU_RGDE15W0_STRADDR17,		17
	.EQU	MPU_RGDE15W0_STRADDR16,		16
	.EQU	MPU_RGDE15W0_STRADDR15,		15
	.EQU	MPU_RGDE15W0_STRADDR14,		14
	.EQU	MPU_RGDE15W0_STRADDR13,		13
	.EQU	MPU_RGDE15W0_STRADDR12,		12
	.EQU	MPU_RGDE15W0_STRADDR11,		11
	.EQU	MPU_RGDE15W0_STRADDR10,		10
	.EQU	MPU_RGDE15W0_STRADDR9,		9
	.EQU	MPU_RGDE15W0_STRADDR8,		8
	.EQU	MPU_RGDE15W0_STRADDR7,		7
	.EQU	MPU_RGDE15W0_STRADDR6,		6
	.EQU	MPU_RGDE15W0_STRADDR5,		5
//  register-------------------------------------
	.EQU	MPU_RGDE15W1,	0x400017F4
//  0x4000 17F4  MPU_RGDE15W1   Bits-------------------------------------
	.EQU	MPU_RGDE15W1_ENDADDR31,		31
	.EQU	MPU_RGDE15W1_ENDADDR30,		30
	.EQU	MPU_RGDE15W1_ENDADDR29,		29
	.EQU	MPU_RGDE15W1_ENDADDR28,		28
	.EQU	MPU_RGDE15W1_ENDADDR27,		27
	.EQU	MPU_RGDE15W1_ENDADDR26,		26
	.EQU	MPU_RGDE15W1_ENDADDR25,		25
	.EQU	MPU_RGDE15W1_ENDADDR24,		24
	.EQU	MPU_RGDE15W1_ENDADDR23,		23
	.EQU	MPU_RGDE15W1_ENDADDR22,		22
	.EQU	MPU_RGDE15W1_ENDADDR21,		21
	.EQU	MPU_RGDE15W1_ENDADDR20,		20
	.EQU	MPU_RGDE15W1_ENDADDR19,		19
	.EQU	MPU_RGDE15W1_ENDADDR18,		18
	.EQU	MPU_RGDE15W1_ENDADDR17,		17
	.EQU	MPU_RGDE15W1_ENDADDR16,		16
	.EQU	MPU_RGDE15W1_ENDADDR15,		15
	.EQU	MPU_RGDE15W1_ENDADDR14,		14
	.EQU	MPU_RGDE15W1_ENDADDR13,		13
	.EQU	MPU_RGDE15W1_ENDADDR12,		12
	.EQU	MPU_RGDE15W1_ENDADDR11,		11
	.EQU	MPU_RGDE15W1_ENDADDR10,		10
	.EQU	MPU_RGDE15W1_ENDADDR9,		9
	.EQU	MPU_RGDE15W1_ENDADDR8,		8
	.EQU	MPU_RGDE15W1_ENDADDR7,		7
	.EQU	MPU_RGDE15W1_ENDADDR6,		6
	.EQU	MPU_RGDE15W1_ENDADDR5,		5
//  register-------------------------------------
	.EQU	MPU_RGDE15W2,	0x400017F8
//  0x4000 17F8  MPU_RGDE15W2   Bits-------------------------------------
	.EQU	MPU_RGDE15W2_M2SMAC1,		16
	.EQU	MPU_RGDE15W2_M2SMAC0,		15
	.EQU	MPU_RGDE15W2_M2UMAC2,		14
	.EQU	MPU_RGDE15W2_M2UMAC1,		13
	.EQU	MPU_RGDE15W2_M2UMAC0,		12
	.EQU	MPU_RGDE15W2_M1PEN,		11
	.EQU	MPU_RGDE15W2_M1SMAC1,		10
	.EQU	MPU_RGDE15W2_M1SMAC0,		9
	.EQU	MPU_RGDE15W2_M1UMAC2,		8
	.EQU	MPU_RGDE15W2_M1UMAC1,		7
	.EQU	MPU_RGDE15W2_M1UMAC0,		6
	.EQU	MPU_RGDE15W2_M0PEN,		5
	.EQU	MPU_RGDE15W2_M0SMAC1,		4
	.EQU	MPU_RGDE15W2_M0SMAC0,		3
	.EQU	MPU_RGDE15W2_M0UMAC2,		2
	.EQU	MPU_RGDE15W2_M0UMAC1,		1
	.EQU	MPU_RGDE15W2_M0UMAC0,		0
//  register-------------------------------------
	.EQU	MPU_RGDE15W3,	0x400017FC
//  0x4000 17FC  MPU_RGDE15W3   Bits-------------------------------------
	.EQU	MPU_RGDE15W3_PID7,		31
	.EQU	MPU_RGDE15W3_PID6,		30
	.EQU	MPU_RGDE15W3_PID5,		29
	.EQU	MPU_RGDE15W3_PID4,		28
	.EQU	MPU_RGDE15W3_PID3,		27
	.EQU	MPU_RGDE15W3_PID2,		26
	.EQU	MPU_RGDE15W3_PID1,		25
	.EQU	MPU_RGDE15W3_PID0,		24
	.EQU	MPU_RGDE15W3_PIDMSK7,		23
	.EQU	MPU_RGDE15W3_PIDMSK6,		22
	.EQU	MPU_RGDE15W3_PIDMSK5,		21
	.EQU	MPU_RGDE15W3_PIDMSK4,		20
	.EQU	MPU_RGDE15W3_PIDMSK3,		19
	.EQU	MPU_RGDE15W3_PIDMSK2,		18
	.EQU	MPU_RGDE15W3_PIDMSK1,		17
	.EQU	MPU_RGDE15W3_PIDMSK0,		16
	.EQU	MPU_RGDE15W3_RGDEVLD,		0
//  register-------------------------------------
	.EQU	MPU_RGDEACC0,	0x40001900
//  0x4000 1900  MPU_RGDEACC0   Bits-------------------------------------
	.EQU	MPU_RGDEACC0_M2SMAC1,		16
	.EQU	MPU_RGDEACC0_M2SMAC0,		15
	.EQU	MPU_RGDEACC0_M2UMAC2,		14
	.EQU	MPU_RGDEACC0_M2UMAC1,		13
	.EQU	MPU_RGDEACC0_M2UMAC0,		12
	.EQU	MPU_RGDEACC0_M1PEN,		11
	.EQU	MPU_RGDEACC0_M1SMAC1,		10
	.EQU	MPU_RGDEACC0_M1SMAC0,		9
	.EQU	MPU_RGDEACC0_M1UMAC2,		8
	.EQU	MPU_RGDEACC0_M1UMAC1,		7
	.EQU	MPU_RGDEACC0_M1UMAC0,		6
	.EQU	MPU_RGDEACC0_M0PEN,		5
	.EQU	MPU_RGDEACC0_M0SMAC1,		4
	.EQU	MPU_RGDEACC0_M0SMAC0,		3
	.EQU	MPU_RGDEACC0_M0UMAC2,		2
	.EQU	MPU_RGDEACC0_M0UMAC1,		1
	.EQU	MPU_RGDEACC0_M0UMAC0,		0
//  register-------------------------------------
	.EQU	MPU_RGDEACC1,	0x40001904
//  0x4000 1904  MPU_RGDEACC1   Bits-------------------------------------
	.EQU	MPU_RGDEACC1_M2SMAC1,		16
	.EQU	MPU_RGDEACC1_M2SMAC0,		15
	.EQU	MPU_RGDEACC1_M2UMAC2,		14
	.EQU	MPU_RGDEACC1_M2UMAC1,		13
	.EQU	MPU_RGDEACC1_M2UMAC0,		12
	.EQU	MPU_RGDEACC1_M1PEN,		11
	.EQU	MPU_RGDEACC1_M1SMAC1,		10
	.EQU	MPU_RGDEACC1_M1SMAC0,		9
	.EQU	MPU_RGDEACC1_M1UMAC2,		8
	.EQU	MPU_RGDEACC1_M1UMAC1,		7
	.EQU	MPU_RGDEACC1_M1UMAC0,		6
	.EQU	MPU_RGDEACC1_M0PEN,		5
	.EQU	MPU_RGDEACC1_M0SMAC1,		4
	.EQU	MPU_RGDEACC1_M0SMAC0,		3
	.EQU	MPU_RGDEACC1_M0UMAC2,		2
	.EQU	MPU_RGDEACC1_M0UMAC1,		1
	.EQU	MPU_RGDEACC1_M0UMAC0,		0
//  register-------------------------------------
	.EQU	MPU_RGDEACC2,	0x40001908
//  0x4000 1908  MPU_RGDEACC2   Bits-------------------------------------
	.EQU	MPU_RGDEACC2_M2SMAC1,		16
	.EQU	MPU_RGDEACC2_M2SMAC0,		15
	.EQU	MPU_RGDEACC2_M2UMAC2,		14
	.EQU	MPU_RGDEACC2_M2UMAC1,		13
	.EQU	MPU_RGDEACC2_M2UMAC0,		12
	.EQU	MPU_RGDEACC2_M1PEN,		11
	.EQU	MPU_RGDEACC2_M1SMAC1,		10
	.EQU	MPU_RGDEACC2_M1SMAC0,		9
	.EQU	MPU_RGDEACC2_M1UMAC2,		8
	.EQU	MPU_RGDEACC2_M1UMAC1,		7
	.EQU	MPU_RGDEACC2_M1UMAC0,		6
	.EQU	MPU_RGDEACC2_M0PEN,		5
	.EQU	MPU_RGDEACC2_M0SMAC1,		4
	.EQU	MPU_RGDEACC2_M0SMAC0,		3
	.EQU	MPU_RGDEACC2_M0UMAC2,		2
	.EQU	MPU_RGDEACC2_M0UMAC1,		1
	.EQU	MPU_RGDEACC2_M0UMAC0,		0
//  register-------------------------------------
	.EQU	MPU_RGDEACC3,	0x4000190C
//  0x4000 190C  MPU_RGDEACC3   Bits-------------------------------------
	.EQU	MPU_RGDEACC3_M2SMAC1,		16
	.EQU	MPU_RGDEACC3_M2SMAC0,		15
	.EQU	MPU_RGDEACC3_M2UMAC2,		14
	.EQU	MPU_RGDEACC3_M2UMAC1,		13
	.EQU	MPU_RGDEACC3_M2UMAC0,		12
	.EQU	MPU_RGDEACC3_M1PEN,		11
	.EQU	MPU_RGDEACC3_M1SMAC1,		10
	.EQU	MPU_RGDEACC3_M1SMAC0,		9
	.EQU	MPU_RGDEACC3_M1UMAC2,		8
	.EQU	MPU_RGDEACC3_M1UMAC1,		7
	.EQU	MPU_RGDEACC3_M1UMAC0,		6
	.EQU	MPU_RGDEACC3_M0PEN,		5
	.EQU	MPU_RGDEACC3_M0SMAC1,		4
	.EQU	MPU_RGDEACC3_M0SMAC0,		3
	.EQU	MPU_RGDEACC3_M0UMAC2,		2
	.EQU	MPU_RGDEACC3_M0UMAC1,		1
	.EQU	MPU_RGDEACC3_M0UMAC0,		0
//  register-------------------------------------
	.EQU	MPU_RGDEACC4,	0x40001910
//  0x4000 1910  MPU_RGDEACC4   Bits-------------------------------------
	.EQU	MPU_RGDEACC4_M2SMAC1,		16
	.EQU	MPU_RGDEACC4_M2SMAC0,		15
	.EQU	MPU_RGDEACC4_M2UMAC2,		14
	.EQU	MPU_RGDEACC4_M2UMAC1,		13
	.EQU	MPU_RGDEACC4_M2UMAC0,		12
	.EQU	MPU_RGDEACC4_M1PEN,		11
	.EQU	MPU_RGDEACC4_M1SMAC1,		10
	.EQU	MPU_RGDEACC4_M1SMAC0,		9
	.EQU	MPU_RGDEACC4_M1UMAC2,		8
	.EQU	MPU_RGDEACC4_M1UMAC1,		7
	.EQU	MPU_RGDEACC4_M1UMAC0,		6
	.EQU	MPU_RGDEACC4_M0PEN,		5
	.EQU	MPU_RGDEACC4_M0SMAC1,		4
	.EQU	MPU_RGDEACC4_M0SMAC0,		3
	.EQU	MPU_RGDEACC4_M0UMAC2,		2
	.EQU	MPU_RGDEACC4_M0UMAC1,		1
	.EQU	MPU_RGDEACC4_M0UMAC0,		0
//  register-------------------------------------
	.EQU	MPU_RGDEACC5,	0x40001914
//  0x4000 1914  MPU_RGDEACC5   Bits-------------------------------------
	.EQU	MPU_RGDEACC5_M2SMAC1,		16
	.EQU	MPU_RGDEACC5_M2SMAC0,		15
	.EQU	MPU_RGDEACC5_M2UMAC2,		14
	.EQU	MPU_RGDEACC5_M2UMAC1,		13
	.EQU	MPU_RGDEACC5_M2UMAC0,		12
	.EQU	MPU_RGDEACC5_M1PEN,		11
	.EQU	MPU_RGDEACC5_M1SMAC1,		10
	.EQU	MPU_RGDEACC5_M1SMAC0,		9
	.EQU	MPU_RGDEACC5_M1UMAC2,		8
	.EQU	MPU_RGDEACC5_M1UMAC1,		7
	.EQU	MPU_RGDEACC5_M1UMAC0,		6
	.EQU	MPU_RGDEACC5_M0PEN,		5
	.EQU	MPU_RGDEACC5_M0SMAC1,		4
	.EQU	MPU_RGDEACC5_M0SMAC0,		3
	.EQU	MPU_RGDEACC5_M0UMAC2,		2
	.EQU	MPU_RGDEACC5_M0UMAC1,		1
	.EQU	MPU_RGDEACC5_M0UMAC0,		0
//  register-------------------------------------
	.EQU	MPU_RGDEACC6,	0x40001918
//  0x4000 1918  MPU_RGDEACC6   Bits-------------------------------------
	.EQU	MPU_RGDEACC6_M2SMAC1,		16
	.EQU	MPU_RGDEACC6_M2SMAC0,		15
	.EQU	MPU_RGDEACC6_M2UMAC2,		14
	.EQU	MPU_RGDEACC6_M2UMAC1,		13
	.EQU	MPU_RGDEACC6_M2UMAC0,		12
	.EQU	MPU_RGDEACC6_M1PEN,		11
	.EQU	MPU_RGDEACC6_M1SMAC1,		10
	.EQU	MPU_RGDEACC6_M1SMAC0,		9
	.EQU	MPU_RGDEACC6_M1UMAC2,		8
	.EQU	MPU_RGDEACC6_M1UMAC1,		7
	.EQU	MPU_RGDEACC6_M1UMAC0,		6
	.EQU	MPU_RGDEACC6_M0PEN,		5
	.EQU	MPU_RGDEACC6_M0SMAC1,		4
	.EQU	MPU_RGDEACC6_M0SMAC0,		3
	.EQU	MPU_RGDEACC6_M0UMAC2,		2
	.EQU	MPU_RGDEACC6_M0UMAC1,		1
	.EQU	MPU_RGDEACC6_M0UMAC0,		0
//  register-------------------------------------
	.EQU	MPU_RGDEACC7,	0x4000191C
//  0x4000 191C  MPU_RGDEACC7   Bits-------------------------------------
	.EQU	MPU_RGDEACC7_M2SMAC1,		16
	.EQU	MPU_RGDEACC7_M2SMAC0,		15
	.EQU	MPU_RGDEACC7_M2UMAC2,		14
	.EQU	MPU_RGDEACC7_M2UMAC1,		13
	.EQU	MPU_RGDEACC7_M2UMAC0,		12
	.EQU	MPU_RGDEACC7_M1PEN,		11
	.EQU	MPU_RGDEACC7_M1SMAC1,		10
	.EQU	MPU_RGDEACC7_M1SMAC0,		9
	.EQU	MPU_RGDEACC7_M1UMAC2,		8
	.EQU	MPU_RGDEACC7_M1UMAC1,		7
	.EQU	MPU_RGDEACC7_M1UMAC0,		6
	.EQU	MPU_RGDEACC7_M0PEN,		5
	.EQU	MPU_RGDEACC7_M0SMAC1,		4
	.EQU	MPU_RGDEACC7_M0SMAC0,		3
	.EQU	MPU_RGDEACC7_M0UMAC2,		2
	.EQU	MPU_RGDEACC7_M0UMAC1,		1
	.EQU	MPU_RGDEACC7_M0UMAC0,		0
//  register-------------------------------------
	.EQU	MPU_RGDEACC8,	0x40001920
//  0x4000 1920  MPU_RGDEACC8   Bits-------------------------------------
	.EQU	MPU_RGDEACC8_M2SMAC1,		16
	.EQU	MPU_RGDEACC8_M2SMAC0,		15
	.EQU	MPU_RGDEACC8_M2UMAC2,		14
	.EQU	MPU_RGDEACC8_M2UMAC1,		13
	.EQU	MPU_RGDEACC8_M2UMAC0,		12
	.EQU	MPU_RGDEACC8_M1PEN,		11
	.EQU	MPU_RGDEACC8_M1SMAC1,		10
	.EQU	MPU_RGDEACC8_M1SMAC0,		9
	.EQU	MPU_RGDEACC8_M1UMAC2,		8
	.EQU	MPU_RGDEACC8_M1UMAC1,		7
	.EQU	MPU_RGDEACC8_M1UMAC0,		6
	.EQU	MPU_RGDEACC8_M0PEN,		5
	.EQU	MPU_RGDEACC8_M0SMAC1,		4
	.EQU	MPU_RGDEACC8_M0SMAC0,		3
	.EQU	MPU_RGDEACC8_M0UMAC2,		2
	.EQU	MPU_RGDEACC8_M0UMAC1,		1
	.EQU	MPU_RGDEACC8_M0UMAC0,		0
//  register-------------------------------------
	.EQU	MPU_RGDEACC9,	0x40001924
//  0x4000 1924  MPU_RGDEACC9   Bits-------------------------------------
	.EQU	MPU_RGDEACC9_M2SMAC1,		16
	.EQU	MPU_RGDEACC9_M2SMAC0,		15
	.EQU	MPU_RGDEACC9_M2UMAC2,		14
	.EQU	MPU_RGDEACC9_M2UMAC1,		13
	.EQU	MPU_RGDEACC9_M2UMAC0,		12
	.EQU	MPU_RGDEACC9_M1PEN,		11
	.EQU	MPU_RGDEACC9_M1SMAC1,		10
	.EQU	MPU_RGDEACC9_M1SMAC0,		9
	.EQU	MPU_RGDEACC9_M1UMAC2,		8
	.EQU	MPU_RGDEACC9_M1UMAC1,		7
	.EQU	MPU_RGDEACC9_M1UMAC0,		6
	.EQU	MPU_RGDEACC9_M0PEN,		5
	.EQU	MPU_RGDEACC9_M0SMAC1,		4
	.EQU	MPU_RGDEACC9_M0SMAC0,		3
	.EQU	MPU_RGDEACC9_M0UMAC2,		2
	.EQU	MPU_RGDEACC9_M0UMAC1,		1
	.EQU	MPU_RGDEACC9_M0UMAC0,		0
//  register-------------------------------------
	.EQU	MPU_RGDEACC10,	0x40001928
//  0x4000 1928  MPU_RGDEACC10   Bits-------------------------------------
	.EQU	MPU_RGDEACC10_M2SMAC1,		16
	.EQU	MPU_RGDEACC10_M2SMAC0,		15
	.EQU	MPU_RGDEACC10_M2UMAC2,		14
	.EQU	MPU_RGDEACC10_M2UMAC1,		13
	.EQU	MPU_RGDEACC10_M2UMAC0,		12
	.EQU	MPU_RGDEACC10_M1PEN,		11
	.EQU	MPU_RGDEACC10_M1SMAC1,		10
	.EQU	MPU_RGDEACC10_M1SMAC0,		9
	.EQU	MPU_RGDEACC10_M1UMAC2,		8
	.EQU	MPU_RGDEACC10_M1UMAC1,		7
	.EQU	MPU_RGDEACC10_M1UMAC0,		6
	.EQU	MPU_RGDEACC10_M0PEN,		5
	.EQU	MPU_RGDEACC10_M0SMAC1,		4
	.EQU	MPU_RGDEACC10_M0SMAC0,		3
	.EQU	MPU_RGDEACC10_M0UMAC2,		2
	.EQU	MPU_RGDEACC10_M0UMAC1,		1
	.EQU	MPU_RGDEACC10_M0UMAC0,		0
//  register-------------------------------------
	.EQU	MPU_RGDEACC11,	0x4000192C
//  0x4000 192C  MPU_RGDEACC11   Bits-------------------------------------
	.EQU	MPU_RGDEACC11_M2SMAC1,		16
	.EQU	MPU_RGDEACC11_M2SMAC0,		15
	.EQU	MPU_RGDEACC11_M2UMAC2,		14
	.EQU	MPU_RGDEACC11_M2UMAC1,		13
	.EQU	MPU_RGDEACC11_M2UMAC0,		12
	.EQU	MPU_RGDEACC11_M1PEN,		11
	.EQU	MPU_RGDEACC11_M1SMAC1,		10
	.EQU	MPU_RGDEACC11_M1SMAC0,		9
	.EQU	MPU_RGDEACC11_M1UMAC2,		8
	.EQU	MPU_RGDEACC11_M1UMAC1,		7
	.EQU	MPU_RGDEACC11_M1UMAC0,		6
	.EQU	MPU_RGDEACC11_M0PEN,		5
	.EQU	MPU_RGDEACC11_M0SMAC1,		4
	.EQU	MPU_RGDEACC11_M0SMAC0,		3
	.EQU	MPU_RGDEACC11_M0UMAC2,		2
	.EQU	MPU_RGDEACC11_M0UMAC1,		1
	.EQU	MPU_RGDEACC11_M0UMAC0,		0
//  register-------------------------------------
	.EQU	MPU_RGDEACC12,	0x40001930
//  0x4000 1930  MPU_RGDEACC12   Bits-------------------------------------
	.EQU	MPU_RGDEACC12_M2SMAC1,		16
	.EQU	MPU_RGDEACC12_M2SMAC0,		15
	.EQU	MPU_RGDEACC12_M2UMAC2,		14
	.EQU	MPU_RGDEACC12_M2UMAC1,		13
	.EQU	MPU_RGDEACC12_M2UMAC0,		12
	.EQU	MPU_RGDEACC12_M1PEN,		11
	.EQU	MPU_RGDEACC12_M1SMAC1,		10
	.EQU	MPU_RGDEACC12_M1SMAC0,		9
	.EQU	MPU_RGDEACC12_M1UMAC2,		8
	.EQU	MPU_RGDEACC12_M1UMAC1,		7
	.EQU	MPU_RGDEACC12_M1UMAC0,		6
	.EQU	MPU_RGDEACC12_M0PEN,		5
	.EQU	MPU_RGDEACC12_M0SMAC1,		4
	.EQU	MPU_RGDEACC12_M0SMAC0,		3
	.EQU	MPU_RGDEACC12_M0UMAC2,		2
	.EQU	MPU_RGDEACC12_M0UMAC1,		1
	.EQU	MPU_RGDEACC12_M0UMAC0,		0
//  register-------------------------------------
	.EQU	MPU_RGDEACC13,	0x40001934
//  0x4000 1934  MPU_RGDEACC13   Bits-------------------------------------
	.EQU	MPU_RGDEACC13_M2SMAC1,		16
	.EQU	MPU_RGDEACC13_M2SMAC0,		15
	.EQU	MPU_RGDEACC13_M2UMAC2,		14
	.EQU	MPU_RGDEACC13_M2UMAC1,		13
	.EQU	MPU_RGDEACC13_M2UMAC0,		12
	.EQU	MPU_RGDEACC13_M1PEN,		11
	.EQU	MPU_RGDEACC13_M1SMAC1,		10
	.EQU	MPU_RGDEACC13_M1SMAC0,		9
	.EQU	MPU_RGDEACC13_M1UMAC2,		8
	.EQU	MPU_RGDEACC13_M1UMAC1,		7
	.EQU	MPU_RGDEACC13_M1UMAC0,		6
	.EQU	MPU_RGDEACC13_M0PEN,		5
	.EQU	MPU_RGDEACC13_M0SMAC1,		4
	.EQU	MPU_RGDEACC13_M0SMAC0,		3
	.EQU	MPU_RGDEACC13_M0UMAC2,		2
	.EQU	MPU_RGDEACC13_M0UMAC1,		1
	.EQU	MPU_RGDEACC13_M0UMAC0,		0
//  register-------------------------------------
	.EQU	MPU_RGDEACC14,	0x40001938
//  0x4000 1938  MPU_RGDEACC14   Bits-------------------------------------
	.EQU	MPU_RGDEACC14_M2SMAC1,		16
	.EQU	MPU_RGDEACC14_M2SMAC0,		15
	.EQU	MPU_RGDEACC14_M2UMAC2,		14
	.EQU	MPU_RGDEACC14_M2UMAC1,		13
	.EQU	MPU_RGDEACC14_M2UMAC0,		12
	.EQU	MPU_RGDEACC14_M1PEN,		11
	.EQU	MPU_RGDEACC14_M1SMAC1,		10
	.EQU	MPU_RGDEACC14_M1SMAC0,		9
	.EQU	MPU_RGDEACC14_M1UMAC2,		8
	.EQU	MPU_RGDEACC14_M1UMAC1,		7
	.EQU	MPU_RGDEACC14_M1UMAC0,		6
	.EQU	MPU_RGDEACC14_M0PEN,		5
	.EQU	MPU_RGDEACC14_M0SMAC1,		4
	.EQU	MPU_RGDEACC14_M0SMAC0,		3
	.EQU	MPU_RGDEACC14_M0UMAC2,		2
	.EQU	MPU_RGDEACC14_M0UMAC1,		1
	.EQU	MPU_RGDEACC14_M0UMAC0,		0
//  register-------------------------------------
	.EQU	MPU_RGDEACC15,	0x4000193C
//  0x4000 193C  MPU_RGDEACC15   Bits-------------------------------------
	.EQU	MPU_RGDEACC15_M2SMAC1,		16
	.EQU	MPU_RGDEACC15_M2SMAC0,		15
	.EQU	MPU_RGDEACC15_M2UMAC2,		14
	.EQU	MPU_RGDEACC15_M2UMAC1,		13
	.EQU	MPU_RGDEACC15_M2UMAC0,		12
	.EQU	MPU_RGDEACC15_M1PEN,		11
	.EQU	MPU_RGDEACC15_M1SMAC1,		10
	.EQU	MPU_RGDEACC15_M1SMAC0,		9
	.EQU	MPU_RGDEACC15_M1UMAC2,		8
	.EQU	MPU_RGDEACC15_M1UMAC1,		7
	.EQU	MPU_RGDEACC15_M1UMAC0,		6
	.EQU	MPU_RGDEACC15_M0PEN,		5
	.EQU	MPU_RGDEACC15_M0SMAC1,		4
	.EQU	MPU_RGDEACC15_M0SMAC0,		3
	.EQU	MPU_RGDEACC15_M0UMAC2,		2
	.EQU	MPU_RGDEACC15_M0UMAC1,		1
	.EQU	MPU_RGDEACC15_M0UMAC0,		0
//  register-------------------------------------
	.EQU	INT_CTL0,		0x40200000
//  0x4020 0000  INT_CTL0   Bits-------------------------------------
	.EQU	INT_CTL0_INTACT6,		30
	.EQU	INT_CTL0_INTACT5,		29
	.EQU	INT_CTL0_INTACT4,		28
	.EQU	INT_CTL0_INTACT3,		27
	.EQU	INT_CTL0_INTACT2,		26
	.EQU	INT_CTL0_INTACT1,		25
	.EQU	INT_CTL0_INTACT0,		24
	.EQU	INT_CTL0_INTPEND6,		22
	.EQU	INT_CTL0_INTPEND5,		21
	.EQU	INT_CTL0_INTPEND4,		20
	.EQU	INT_CTL0_INTPEND3,		19
	.EQU	INT_CTL0_INTPEND2,		18
	.EQU	INT_CTL0_INTPEND1,		17
	.EQU	INT_CTL0_INTPEND0,		16
	.EQU	INT_CTL0_PRIBASE3,		15
	.EQU	INT_CTL0_PRIBASE2,		14
	.EQU	INT_CTL0_PRIBASE1,		13
	.EQU	INT_CTL0_PRIBASE0,		12
	.EQU	INT_CTL0_DSALIGN,		7
	.EQU	INT_CTL0_FAULTMASK,		6
	.EQU	INT_CTL0_INTPREEMPT,		5
	.EQU	INT_CTL0_INTPENDING,		4
	.EQU	INT_CTL0_PRIGROUP1,		2
	.EQU	INT_CTL0_PRIGROUP0,		1
	.EQU	INT_CTL0_AIE,		0
//  register-------------------------------------
	.EQU	INT_CTL1,		0x4020009C
//  0x4020 009C  INT_CTL1   Bits-------------------------------------
	.EQU	INT_CTL1_INTDELY7,		7
	.EQU	INT_CTL1_INTDELY6,		6
	.EQU	INT_CTL1_INTDELY5,		5
	.EQU	INT_CTL1_INTDELY4,		4
	.EQU	INT_CTL1_INTDELY3,		3
	.EQU	INT_CTL1_INTDELY2,		2
	.EQU	INT_CTL1_INTDELY1,		1
	.EQU	INT_CTL1_INTDELY0,		0
//  register-------------------------------------
	.EQU	INT_EIE0,		0x40200004
//  0x4020 0004  INT_EIE0   Bits-------------------------------------
	.EQU	INT_EIE0_SYSTICKIE,		15
	.EQU	INT_EIE0_SOFTSVIE,		14
	.EQU	INT_EIE0_SVCIE,		11
	.EQU	INT_EIE0_ARIFAULTIE,		6
	.EQU	INT_EIE0_STACKIE,		5
	.EQU	INT_EIE0_HADRFAULTIE,		3
//  register-------------------------------------
	.EQU	INT_EIE1,		0x4020000C
//  0x4020 000C  INT_EIE1   Bits-------------------------------------
	.EQU	INT_EIE1_EPWM14IE,		31
	.EQU	INT_EIE1_EPWM13IE,		30
	.EQU	INT_EIE1_EPWM12IE,		29
	.EQU	INT_EIE1_EPWM11IE,		28
	.EQU	INT_EIE1_I2C1IE,		27
	.EQU	INT_EIE1_I2C0IE,		26
	.EQU	INT_EIE1_OSCIE,		25
	.EQU	INT_EIE1_CMUIE,		24
	.EQU	INT_EIE1_EINT31TO21IE,		23
	.EQU	INT_EIE1_CANFDBUSIE,		22
	.EQU	INT_EIE1_EINT19TO18IE,		21
	.EQU	INT_EIE1_SPI1IE,		20
	.EQU	INT_EIE1_SPI0IE,		19
	.EQU	INT_EIE1_USART3IE,		18
	.EQU	INT_EIE1_USART2IE,		17
	.EQU	INT_EIE1_USART1IE,		16
	.EQU	INT_EIE1_USART0IE,		15
	.EQU	INT_EIE1_CMPIE,		14
	.EQU	INT_EIE1_DMA0IE,		13
	.EQU	INT_EIE1_ADC0IE,		12
	.EQU	INT_EIE1_T5IE,		11
	.EQU	INT_EIE1_T4IE,		10
	.EQU	INT_EIE1_T3IE,		9
	.EQU	INT_EIE1_T2IE,		8
	.EQU	INT_EIE1_T1IE,		7
	.EQU	INT_EIE1_T0IE,		6
	.EQU	INT_EIE1_PDIE,		5
	.EQU	INT_EIE1_PCIE,		4
	.EQU	INT_EIE1_PBIE,		3
	.EQU	INT_EIE1_PAIE,		2
	.EQU	INT_EIE1_EINT16IE,		1
	.EQU	INT_EIE1_WWDTIE,		0
//  register-------------------------------------
	.EQU	INT_EIE2,		0x40200014
//  0x4020 0014  INT_EIE2   Bits-------------------------------------
	.EQU	INT_EIE2_CANFDMB6348IE,		10
	.EQU	INT_EIE2_CANFDMB4732IE,		9
	.EQU	INT_EIE2_CANFDMB3116IE,		8
	.EQU	INT_EIE2_CANFDMB150IE,		7
	.EQU	INT_EIE2_CANFDECCIE,		6
	.EQU	INT_EIE2_CANFDGENIE,		5
	.EQU	INT_EIE2_BUSERRIE,		4
	.EQU	INT_EIE2_FLASHECCIE,		3
	.EQU	INT_EIE2_DRAMECCIE,		2
	.EQU	INT_EIE2_SRAMECCIE,		1
	.EQU	INT_EIE2_WKPIE,		0
//  register-------------------------------------
	.EQU	INT_EIF0,		0x4020001C
//  0x4020 001C  INT_EIF0   Bits-------------------------------------
	.EQU	INT_EIF0_SYSTICKIF,		15
	.EQU	INT_EIF0_SOFTSVIF,		14
	.EQU	INT_EIF0_SVCIF,		11
	.EQU	INT_EIF0_ARIFAULTIF,		6
	.EQU	INT_EIF0_STACKIF,		5
	.EQU	INT_EIF0_HARDAFULTIF,		3
	.EQU	INT_EIF0_NMIIF,		2
//  register-------------------------------------
	.EQU	INT_EIF1,		0x40200024
//  0x4020 0024  INT_EIF1   Bits-------------------------------------
	.EQU	INT_EIF1_EPWM14IF,		31
	.EQU	INT_EIF1_EPWM13IF,		30
	.EQU	INT_EIF1_EPWM12IF,		29
	.EQU	INT_EIF1_EPWM11IF,		28
	.EQU	INT_EIF1_I2C1IF,		27
	.EQU	INT_EIF1_I2C0IF,		26
	.EQU	INT_EIF1_OSCIF,		25
	.EQU	INT_EIF1_CMUIF,		24
	.EQU	INT_EIF1_EINT31TO21IF,		23
	.EQU	INT_EIF1_CANFDBUSIF,		22
	.EQU	INT_EIF1_EINT19TO18IF,		21
	.EQU	INT_EIF1_SPI1IF,		20
	.EQU	INT_EIF1_SPI0IF,		19
	.EQU	INT_EIF1_USART3IF,		18
	.EQU	INT_EIF1_USART2IF,		17
	.EQU	INT_EIF1_USART1IF,		16
	.EQU	INT_EIF1_USART0IF,		15
	.EQU	INT_EIF1_CMPIF,		14
	.EQU	INT_EIF1_DMA0IF,		13
	.EQU	INT_EIF1_ADC0IF,		12
	.EQU	INT_EIF1_T5IF,		11
	.EQU	INT_EIF1_T4IF,		10
	.EQU	INT_EIF1_T3IF,		9
	.EQU	INT_EIF1_T2IF,		8
	.EQU	INT_EIF1_T1IF,		7
	.EQU	INT_EIF1_T0IF,		6
	.EQU	INT_EIF1_PDIF,		5
	.EQU	INT_EIF1_PCIF,		4
	.EQU	INT_EIF1_PBIF,		3
	.EQU	INT_EIF1_PAIF,		2
	.EQU	INT_EIF1_EINT16IF,		1
	.EQU	INT_EIF1_WWDTIF,		0
//  register-------------------------------------
	.EQU	INT_EIF2,		0x4020002C
//  0x4020 002C  INT_EIF2   Bits-------------------------------------
	.EQU	INT_EIF2_CANFDMB6348IF,		10
	.EQU	INT_EIF2_CANFDMB4732IF,		9
	.EQU	INT_EIF2_CANFDMB3116IF,		8
	.EQU	INT_EIF2_CANFDMB150IF,		7
	.EQU	INT_EIF2_CANFDECCIF,		6
	.EQU	INT_EIF2_CANFDGENIF,		5
	.EQU	INT_EIF2_BUSERRIF,		4
	.EQU	INT_EIF2_FLASHECCIF,		3
	.EQU	INT_EIF2_DRAMECCIF,		2
	.EQU	INT_EIF2_SRAMECCIF,		1
	.EQU	INT_EIF2_WKPIF,		0
//  register-------------------------------------
	.EQU	INT_IP0,		0x40200034
//  0x4020 0034  INT_IP0   Bits-------------------------------------
	.EQU	INT_IP0_PRI7_7,		31
	.EQU	INT_IP0_PRI7_6,		30
	.EQU	INT_IP0_PRI7_5,		29
	.EQU	INT_IP0_PRI7_4,		28
	.EQU	INT_IP0_PRI7_3,		27
	.EQU	INT_IP0_PRI7_2,		26
	.EQU	INT_IP0_PRI7_1,		25
	.EQU	INT_IP0_PRI7_0,		24
	.EQU	INT_IP0_PRI6_7,		23
	.EQU	INT_IP0_PRI6_6,		22
	.EQU	INT_IP0_PRI6_5,		21
	.EQU	INT_IP0_PRI6_4,		20
	.EQU	INT_IP0_PRI6_3,		19
	.EQU	INT_IP0_PRI6_2,		18
	.EQU	INT_IP0_PRI6_1,		17
	.EQU	INT_IP0_PRI6_0,		16
	.EQU	INT_IP0_PRI5_7,		15
	.EQU	INT_IP0_PRI5_6,		14
	.EQU	INT_IP0_PRI5_5,		13
	.EQU	INT_IP0_PRI5_4,		12
	.EQU	INT_IP0_PRI5_3,		11
	.EQU	INT_IP0_PRI5_2,		10
	.EQU	INT_IP0_PRI5_1,		9
	.EQU	INT_IP0_PRI5_0,		8
	.EQU	INT_IP0_PRI4_7,		7
	.EQU	INT_IP0_PRI4_6,		6
	.EQU	INT_IP0_PRI4_5,		5
	.EQU	INT_IP0_PRI4_4,		4
	.EQU	INT_IP0_PRI4_3,		3
	.EQU	INT_IP0_PRI4_2,		2
	.EQU	INT_IP0_PRI4_1,		1
	.EQU	INT_IP0_PRI4_0,		0
//  register-------------------------------------
	.EQU	INT_IP1,		0x40200038
//  0x4020 0038  INT_IP1   Bits-------------------------------------
	.EQU	INT_IP1_PRI11_7,		31
	.EQU	INT_IP1_PRI11_6,		30
	.EQU	INT_IP1_PRI11_5,		29
	.EQU	INT_IP1_PRI11_4,		28
	.EQU	INT_IP1_PRI11_3,		27
	.EQU	INT_IP1_PRI11_2,		26
	.EQU	INT_IP1_PRI11_1,		25
	.EQU	INT_IP1_PRI11_0,		24
	.EQU	INT_IP1_PRI10_7,		23
	.EQU	INT_IP1_PRI10_6,		22
	.EQU	INT_IP1_PRI10_5,		21
	.EQU	INT_IP1_PRI10_4,		20
	.EQU	INT_IP1_PRI10_3,		19
	.EQU	INT_IP1_PRI10_2,		18
	.EQU	INT_IP1_PRI10_1,		17
	.EQU	INT_IP1_PRI10_0,		16
	.EQU	INT_IP1_PRI9_7,		15
	.EQU	INT_IP1_PRI9_6,		14
	.EQU	INT_IP1_PRI9_5,		13
	.EQU	INT_IP1_PRI9_4,		12
	.EQU	INT_IP1_PRI9_3,		11
	.EQU	INT_IP1_PRI9_2,		10
	.EQU	INT_IP1_PRI9_1,		9
	.EQU	INT_IP1_PRI9_0,		8
	.EQU	INT_IP1_PRI8_7,		7
	.EQU	INT_IP1_PRI8_6,		6
	.EQU	INT_IP1_PRI8_5,		5
	.EQU	INT_IP1_PRI8_4,		4
	.EQU	INT_IP1_PRI8_3,		3
	.EQU	INT_IP1_PRI8_2,		2
	.EQU	INT_IP1_PRI8_1,		1
	.EQU	INT_IP1_PRI8_0,		0
//  register-------------------------------------
	.EQU	INT_IP2,		0x4020003C
//  0x4020 003C  INT_IP2   Bits-------------------------------------
	.EQU	INT_IP2_PRI15_7,		31
	.EQU	INT_IP2_PRI15_6,		30
	.EQU	INT_IP2_PRI15_5,		29
	.EQU	INT_IP2_PRI15_4,		28
	.EQU	INT_IP2_PRI15_3,		27
	.EQU	INT_IP2_PRI15_2,		26
	.EQU	INT_IP2_PRI15_1,		25
	.EQU	INT_IP2_PRI15_0,		24
	.EQU	INT_IP2_PRI14_7,		23
	.EQU	INT_IP2_PRI14_6,		22
	.EQU	INT_IP2_PRI14_5,		21
	.EQU	INT_IP2_PRI14_4,		20
	.EQU	INT_IP2_PRI14_3,		19
	.EQU	INT_IP2_PRI14_2,		18
	.EQU	INT_IP2_PRI14_1,		17
	.EQU	INT_IP2_PRI14_0,		16
	.EQU	INT_IP2_PRI13_7,		15
	.EQU	INT_IP2_PRI13_6,		14
	.EQU	INT_IP2_PRI13_5,		13
	.EQU	INT_IP2_PRI13_4,		12
	.EQU	INT_IP2_PRI13_3,		11
	.EQU	INT_IP2_PRI13_2,		10
	.EQU	INT_IP2_PRI13_1,		9
	.EQU	INT_IP2_PRI13_0,		8
	.EQU	INT_IP2_PRI12_7,		7
	.EQU	INT_IP2_PRI12_6,		6
	.EQU	INT_IP2_PRI12_5,		5
	.EQU	INT_IP2_PRI12_4,		4
	.EQU	INT_IP2_PRI12_3,		3
	.EQU	INT_IP2_PRI12_2,		2
	.EQU	INT_IP2_PRI12_1,		1
	.EQU	INT_IP2_PRI12_0,		0
//  register-------------------------------------
	.EQU	INT_IP3,		0x40200040
//  0x4020 0040  INT_IP3   Bits-------------------------------------
	.EQU	INT_IP3_PRI19_7,		31
	.EQU	INT_IP3_PRI19_6,		30
	.EQU	INT_IP3_PRI19_5,		29
	.EQU	INT_IP3_PRI19_4,		28
	.EQU	INT_IP3_PRI19_3,		27
	.EQU	INT_IP3_PRI19_2,		26
	.EQU	INT_IP3_PRI19_1,		25
	.EQU	INT_IP3_PRI19_0,		24
	.EQU	INT_IP3_PRI18_7,		23
	.EQU	INT_IP3_PRI18_6,		22
	.EQU	INT_IP3_PRI18_5,		21
	.EQU	INT_IP3_PRI18_4,		20
	.EQU	INT_IP3_PRI18_3,		19
	.EQU	INT_IP3_PRI18_2,		18
	.EQU	INT_IP3_PRI18_1,		17
	.EQU	INT_IP3_PRI18_0,		16
	.EQU	INT_IP3_PRI17_7,		15
	.EQU	INT_IP3_PRI17_6,		14
	.EQU	INT_IP3_PRI17_5,		13
	.EQU	INT_IP3_PRI17_4,		12
	.EQU	INT_IP3_PRI17_3,		11
	.EQU	INT_IP3_PRI17_2,		10
	.EQU	INT_IP3_PRI17_1,		9
	.EQU	INT_IP3_PRI17_0,		8
	.EQU	INT_IP3_PRI16_7,		7
	.EQU	INT_IP3_PRI16_6,		6
	.EQU	INT_IP3_PRI16_5,		5
	.EQU	INT_IP3_PRI16_4,		4
	.EQU	INT_IP3_PRI16_3,		3
	.EQU	INT_IP3_PRI16_2,		2
	.EQU	INT_IP3_PRI16_1,		1
	.EQU	INT_IP3_PRI16_0,		0
//  register-------------------------------------
	.EQU	INT_IP4,		0x40200044
//  0x4020 0044  INT_IP4   Bits-------------------------------------
	.EQU	INT_IP4_PRI23_7,		31
	.EQU	INT_IP4_PRI23_6,		30
	.EQU	INT_IP4_PRI23_5,		29
	.EQU	INT_IP4_PRI23_4,		28
	.EQU	INT_IP4_PRI23_3,		27
	.EQU	INT_IP4_PRI23_2,		26
	.EQU	INT_IP4_PRI23_1,		25
	.EQU	INT_IP4_PRI23_0,		24
	.EQU	INT_IP4_PRI22_7,		23
	.EQU	INT_IP4_PRI22_6,		22
	.EQU	INT_IP4_PRI22_5,		21
	.EQU	INT_IP4_PRI22_4,		20
	.EQU	INT_IP4_PRI22_3,		19
	.EQU	INT_IP4_PRI22_2,		18
	.EQU	INT_IP4_PRI22_1,		17
	.EQU	INT_IP4_PRI22_0,		16
	.EQU	INT_IP4_PRI21_7,		15
	.EQU	INT_IP4_PRI21_6,		14
	.EQU	INT_IP4_PRI21_5,		13
	.EQU	INT_IP4_PRI21_4,		12
	.EQU	INT_IP4_PRI21_3,		11
	.EQU	INT_IP4_PRI21_2,		10
	.EQU	INT_IP4_PRI21_1,		9
	.EQU	INT_IP4_PRI21_0,		8
	.EQU	INT_IP4_PRI20_7,		7
	.EQU	INT_IP4_PRI20_6,		6
	.EQU	INT_IP4_PRI20_5,		5
	.EQU	INT_IP4_PRI20_4,		4
	.EQU	INT_IP4_PRI20_3,		3
	.EQU	INT_IP4_PRI20_2,		2
	.EQU	INT_IP4_PRI20_1,		1
	.EQU	INT_IP4_PRI20_0,		0
//  register-------------------------------------
	.EQU	INT_IP5,		0x40200048
//  0x4020 0048  INT_IP5   Bits-------------------------------------
	.EQU	INT_IP5_PRI27_7,		31
	.EQU	INT_IP5_PRI27_6,		30
	.EQU	INT_IP5_PRI27_5,		29
	.EQU	INT_IP5_PRI27_4,		28
	.EQU	INT_IP5_PRI27_3,		27
	.EQU	INT_IP5_PRI27_2,		26
	.EQU	INT_IP5_PRI27_1,		25
	.EQU	INT_IP5_PRI27_0,		24
	.EQU	INT_IP5_PRI26_7,		23
	.EQU	INT_IP5_PRI26_6,		22
	.EQU	INT_IP5_PRI26_5,		21
	.EQU	INT_IP5_PRI26_4,		20
	.EQU	INT_IP5_PRI26_3,		19
	.EQU	INT_IP5_PRI26_2,		18
	.EQU	INT_IP5_PRI26_1,		17
	.EQU	INT_IP5_PRI26_0,		16
	.EQU	INT_IP5_PRI25_7,		15
	.EQU	INT_IP5_PRI25_6,		14
	.EQU	INT_IP5_PRI25_5,		13
	.EQU	INT_IP5_PRI25_4,		12
	.EQU	INT_IP5_PRI25_3,		11
	.EQU	INT_IP5_PRI25_2,		10
	.EQU	INT_IP5_PRI25_1,		9
	.EQU	INT_IP5_PRI25_0,		8
	.EQU	INT_IP5_PRI24_7,		7
	.EQU	INT_IP5_PRI24_6,		6
	.EQU	INT_IP5_PRI24_5,		5
	.EQU	INT_IP5_PRI24_4,		4
	.EQU	INT_IP5_PRI24_3,		3
	.EQU	INT_IP5_PRI24_2,		2
	.EQU	INT_IP5_PRI24_1,		1
	.EQU	INT_IP5_PRI24_0,		0
//  register-------------------------------------
	.EQU	INT_IP6,		0x4020004C
//  0x4020 004C  INT_IP6   Bits-------------------------------------
	.EQU	INT_IP6_PRI31_7,		31
	.EQU	INT_IP6_PRI31_6,		30
	.EQU	INT_IP6_PRI31_5,		29
	.EQU	INT_IP6_PRI31_4,		28
	.EQU	INT_IP6_PRI31_3,		27
	.EQU	INT_IP6_PRI31_2,		26
	.EQU	INT_IP6_PRI31_1,		25
	.EQU	INT_IP6_PRI31_0,		24
	.EQU	INT_IP6_PRI30_7,		23
	.EQU	INT_IP6_PRI30_6,		22
	.EQU	INT_IP6_PRI30_5,		21
	.EQU	INT_IP6_PRI30_4,		20
	.EQU	INT_IP6_PRI30_3,		19
	.EQU	INT_IP6_PRI30_2,		18
	.EQU	INT_IP6_PRI30_1,		17
	.EQU	INT_IP6_PRI30_0,		16
	.EQU	INT_IP6_PRI29_7,		15
	.EQU	INT_IP6_PRI29_6,		14
	.EQU	INT_IP6_PRI29_5,		13
	.EQU	INT_IP6_PRI29_4,		12
	.EQU	INT_IP6_PRI29_3,		11
	.EQU	INT_IP6_PRI29_2,		10
	.EQU	INT_IP6_PRI29_1,		9
	.EQU	INT_IP6_PRI29_0,		8
	.EQU	INT_IP6_PRI28_7,		7
	.EQU	INT_IP6_PRI28_6,		6
	.EQU	INT_IP6_PRI28_5,		5
	.EQU	INT_IP6_PRI28_4,		4
	.EQU	INT_IP6_PRI28_3,		3
	.EQU	INT_IP6_PRI28_2,		2
	.EQU	INT_IP6_PRI28_1,		1
	.EQU	INT_IP6_PRI28_0,		0
//  register-------------------------------------
	.EQU	INT_IP7,		0x40200050
//  0x4020 0050  INT_IP7   Bits-------------------------------------
	.EQU	INT_IP7_PRI35_7,		31
	.EQU	INT_IP7_PRI35_6,		30
	.EQU	INT_IP7_PRI35_5,		29
	.EQU	INT_IP7_PRI35_4,		28
	.EQU	INT_IP7_PRI35_3,		27
	.EQU	INT_IP7_PRI35_2,		26
	.EQU	INT_IP7_PRI35_1,		25
	.EQU	INT_IP7_PRI35_0,		24
	.EQU	INT_IP7_PRI34_7,		23
	.EQU	INT_IP7_PRI34_6,		22
	.EQU	INT_IP7_PRI34_5,		21
	.EQU	INT_IP7_PRI34_4,		20
	.EQU	INT_IP7_PRI34_3,		19
	.EQU	INT_IP7_PRI34_2,		18
	.EQU	INT_IP7_PRI34_1,		17
	.EQU	INT_IP7_PRI34_0,		16
	.EQU	INT_IP7_PRI33_7,		15
	.EQU	INT_IP7_PRI33_6,		14
	.EQU	INT_IP7_PRI33_5,		13
	.EQU	INT_IP7_PRI33_4,		12
	.EQU	INT_IP7_PRI33_3,		11
	.EQU	INT_IP7_PRI33_2,		10
	.EQU	INT_IP7_PRI33_1,		9
	.EQU	INT_IP7_PRI33_0,		8
	.EQU	INT_IP7_PRI32_7,		7
	.EQU	INT_IP7_PRI32_6,		6
	.EQU	INT_IP7_PRI32_5,		5
	.EQU	INT_IP7_PRI32_4,		4
	.EQU	INT_IP7_PRI32_3,		3
	.EQU	INT_IP7_PRI32_2,		2
	.EQU	INT_IP7_PRI32_1,		1
	.EQU	INT_IP7_PRI32_0,		0
//  register-------------------------------------
	.EQU	INT_IP8,		0x40200054
//  0x4020 0054  INT_IP8   Bits-------------------------------------
	.EQU	INT_IP8_PRI339_7,		31
	.EQU	INT_IP8_PRI339_6,		30
	.EQU	INT_IP8_PRI339_5,		29
	.EQU	INT_IP8_PRI339_4,		28
	.EQU	INT_IP8_PRI339_3,		27
	.EQU	INT_IP8_PRI339_2,		26
	.EQU	INT_IP8_PRI339_1,		25
	.EQU	INT_IP8_PRI339_0,		24
	.EQU	INT_IP8_PRI38_7,		23
	.EQU	INT_IP8_PRI38_6,		22
	.EQU	INT_IP8_PRI38_5,		21
	.EQU	INT_IP8_PRI38_4,		20
	.EQU	INT_IP8_PRI38_3,		19
	.EQU	INT_IP8_PRI38_2,		18
	.EQU	INT_IP8_PRI38_1,		17
	.EQU	INT_IP8_PRI38_0,		16
	.EQU	INT_IP8_PRI37_7,		15
	.EQU	INT_IP8_PRI37_6,		14
	.EQU	INT_IP8_PRI37_5,		13
	.EQU	INT_IP8_PRI37_4,		12
	.EQU	INT_IP8_PRI37_3,		11
	.EQU	INT_IP8_PRI37_2,		10
	.EQU	INT_IP8_PRI37_1,		9
	.EQU	INT_IP8_PRI37_0,		8
	.EQU	INT_IP8_PR36_7,		7
	.EQU	INT_IP8_PR36_6,		6
	.EQU	INT_IP8_PR36_5,		5
	.EQU	INT_IP8_PR36_4,		4
	.EQU	INT_IP8_PR36_3,		3
	.EQU	INT_IP8_PR36_2,		2
	.EQU	INT_IP8_PR36_1,		1
	.EQU	INT_IP8_PR36_0,		0
//  register-------------------------------------
	.EQU	INT_IP9,		0x40200058
//  0x4020 0058  INT_IP9   Bits-------------------------------------
	.EQU	INT_IP9_PRI43_7,		31
	.EQU	INT_IP9_PRI43_6,		30
	.EQU	INT_IP9_PRI43_5,		29
	.EQU	INT_IP9_PRI43_4,		28
	.EQU	INT_IP9_PRI43_3,		27
	.EQU	INT_IP9_PRI43_2,		26
	.EQU	INT_IP9_PRI43_1,		25
	.EQU	INT_IP9_PRI43_0,		24
	.EQU	INT_IP9_PRI42_7,		23
	.EQU	INT_IP9_PRI42_6,		22
	.EQU	INT_IP9_PRI42_5,		21
	.EQU	INT_IP9_PRI42_4,		20
	.EQU	INT_IP9_PRI42_3,		19
	.EQU	INT_IP9_PRI42_2,		18
	.EQU	INT_IP9_PRI42_1,		17
	.EQU	INT_IP9_PRI42_0,		16
	.EQU	INT_IP9_PRI41_7,		15
	.EQU	INT_IP9_PRI41_6,		14
	.EQU	INT_IP9_PRI41_5,		13
	.EQU	INT_IP9_PRI41_4,		12
	.EQU	INT_IP9_PRI41_3,		11
	.EQU	INT_IP9_PRI41_2,		10
	.EQU	INT_IP9_PRI41_1,		9
	.EQU	INT_IP9_PRI41_0,		8
	.EQU	INT_IP9_PRI40_7,		7
	.EQU	INT_IP9_PRI40_6,		6
	.EQU	INT_IP9_PRI40_5,		5
	.EQU	INT_IP9_PRI40_4,		4
	.EQU	INT_IP9_PRI40_3,		3
	.EQU	INT_IP9_PRI40_2,		2
	.EQU	INT_IP9_PRI40_1,		1
	.EQU	INT_IP9_PRI40_0,		0
//  register-------------------------------------
	.EQU	INT_IP10,		0x4020005C
//  0x4020 005C  INT_IP10   Bits-------------------------------------
	.EQU	INT_IP10_PRI47_7,		31
	.EQU	INT_IP10_PRI47_6,		30
	.EQU	INT_IP10_PRI47_5,		29
	.EQU	INT_IP10_PRI47_4,		28
	.EQU	INT_IP10_PRI47_3,		27
	.EQU	INT_IP10_PRI47_2,		26
	.EQU	INT_IP10_PRI47_1,		25
	.EQU	INT_IP10_PRI47_0,		24
	.EQU	INT_IP10_PRI46_7,		23
	.EQU	INT_IP10_PRI46_6,		22
	.EQU	INT_IP10_PRI46_5,		21
	.EQU	INT_IP10_PRI46_4,		20
	.EQU	INT_IP10_PRI46_3,		19
	.EQU	INT_IP10_PRI46_2,		18
	.EQU	INT_IP10_PRI46_1,		17
	.EQU	INT_IP10_PRI46_0,		16
	.EQU	INT_IP10_PRI45_7,		15
	.EQU	INT_IP10_PRI45_6,		14
	.EQU	INT_IP10_PRI45_5,		13
	.EQU	INT_IP10_PRI45_4,		12
	.EQU	INT_IP10_PRI45_3,		11
	.EQU	INT_IP10_PRI45_2,		10
	.EQU	INT_IP10_PRI45_1,		9
	.EQU	INT_IP10_PRI45_0,		8
	.EQU	INT_IP10_PRI44_7,		7
	.EQU	INT_IP10_PRI44_6,		6
	.EQU	INT_IP10_PRI44_5,		5
	.EQU	INT_IP10_PRI44_4,		4
	.EQU	INT_IP10_PRI44_3,		3
	.EQU	INT_IP10_PRI44_2,		2
	.EQU	INT_IP10_PRI44_1,		1
	.EQU	INT_IP10_PRI44_0,		0
//  register-------------------------------------
	.EQU	INT_IP11,		0x40200060
//  0x4020 0060  INT_IP11   Bits-------------------------------------
	.EQU	INT_IP11_PRI51_7,		31
	.EQU	INT_IP11_PRI51_6,		30
	.EQU	INT_IP11_PRI51_5,		29
	.EQU	INT_IP11_PRI51_4,		28
	.EQU	INT_IP11_PRI51_3,		27
	.EQU	INT_IP11_PRI51_2,		26
	.EQU	INT_IP11_PRI51_1,		25
	.EQU	INT_IP11_PRI51_0,		24
	.EQU	INT_IP11_PRI50_7,		23
	.EQU	INT_IP11_PRI50_6,		22
	.EQU	INT_IP11_PRI50_5,		21
	.EQU	INT_IP11_PRI50_4,		20
	.EQU	INT_IP11_PRI50_3,		19
	.EQU	INT_IP11_PRI50_2,		18
	.EQU	INT_IP11_PRI50_1,		17
	.EQU	INT_IP11_PRI50_0,		16
	.EQU	INT_IP11_PRI49_7,		15
	.EQU	INT_IP11_PRI49_6,		14
	.EQU	INT_IP11_PRI49_5,		13
	.EQU	INT_IP11_PRI49_4,		12
	.EQU	INT_IP11_PRI49_3,		11
	.EQU	INT_IP11_PRI49_2,		10
	.EQU	INT_IP11_PRI49_1,		9
	.EQU	INT_IP11_PRI49_0,		8
	.EQU	INT_IP11_PRI48_7,		7
	.EQU	INT_IP11_PRI48_6,		6
	.EQU	INT_IP11_PRI48_5,		5
	.EQU	INT_IP11_PRI48_4,		4
	.EQU	INT_IP11_PRI48_3,		3
	.EQU	INT_IP11_PRI48_2,		2
	.EQU	INT_IP11_PRI48_1,		1
	.EQU	INT_IP11_PRI48_0,		0
//  register-------------------------------------
	.EQU	INT_IP12,		0x40200064
//  0x4020 0064  INT_IP12   Bits-------------------------------------
	.EQU	INT_IP12_PRI55_7,		31
	.EQU	INT_IP12_PRI55_6,		30
	.EQU	INT_IP12_PRI55_5,		29
	.EQU	INT_IP12_PRI55_4,		28
	.EQU	INT_IP12_PRI55_3,		27
	.EQU	INT_IP12_PRI55_2,		26
	.EQU	INT_IP12_PRI55_1,		25
	.EQU	INT_IP12_PRI55_0,		24
	.EQU	INT_IP12_PRI54_7,		23
	.EQU	INT_IP12_PRI54_6,		22
	.EQU	INT_IP12_PRI54_5,		21
	.EQU	INT_IP12_PRI54_4,		20
	.EQU	INT_IP12_PRI54_3,		19
	.EQU	INT_IP12_PRI54_2,		18
	.EQU	INT_IP12_PRI54_1,		17
	.EQU	INT_IP12_PRI54_0,		16
	.EQU	INT_IP12_PRI53_7,		15
	.EQU	INT_IP12_PRI53_6,		14
	.EQU	INT_IP12_PRI53_5,		13
	.EQU	INT_IP12_PRI53_4,		12
	.EQU	INT_IP12_PRI53_3,		11
	.EQU	INT_IP12_PRI53_2,		10
	.EQU	INT_IP12_PRI53_1,		9
	.EQU	INT_IP12_PRI53_0,		8
	.EQU	INT_IP12_PRI52_7,		7
	.EQU	INT_IP12_PRI52_6,		6
	.EQU	INT_IP12_PRI52_5,		5
	.EQU	INT_IP12_PRI52_4,		4
	.EQU	INT_IP12_PRI52_3,		3
	.EQU	INT_IP12_PRI52_2,		2
	.EQU	INT_IP12_PRI52_1,		1
	.EQU	INT_IP12_PRI52_0,		0
//  register-------------------------------------
	.EQU	INT_IP13,		0x40200068
//  0x4020 0068  INT_IP13   Bits-------------------------------------
	.EQU	INT_IP13_PRI58_7,		23
	.EQU	INT_IP13_PRI58_6,		22
	.EQU	INT_IP13_PRI58_5,		21
	.EQU	INT_IP13_PRI58_4,		20
	.EQU	INT_IP13_PRI58_3,		19
	.EQU	INT_IP13_PRI58_2,		18
	.EQU	INT_IP13_PRI58_1,		17
	.EQU	INT_IP13_PRI58_0,		16
	.EQU	INT_IP13_PRI57_7,		15
	.EQU	INT_IP13_PRI57_6,		14
	.EQU	INT_IP13_PRI57_5,		13
	.EQU	INT_IP13_PRI57_4,		12
	.EQU	INT_IP13_PRI57_3,		11
	.EQU	INT_IP13_PRI57_2,		10
	.EQU	INT_IP13_PRI57_1,		9
	.EQU	INT_IP13_PRI57_0,		8
	.EQU	INT_IP13_PRI56_7,		7
	.EQU	INT_IP13_PRI56_6,		6
	.EQU	INT_IP13_PRI56_5,		5
	.EQU	INT_IP13_PRI56_4,		4
	.EQU	INT_IP13_PRI56_3,		3
	.EQU	INT_IP13_PRI56_2,		2
	.EQU	INT_IP13_PRI56_1,		1
	.EQU	INT_IP13_PRI56_0,		0
//  register-------------------------------------
	.EQU	INT_EINTMASK,	0x40200080
//  0x4020 0080  INT_EINTMASK   Bits-------------------------------------
	.EQU	INT_EINTMASK_EINTM31,		31
	.EQU	INT_EINTMASK_EINTM30,		30
	.EQU	INT_EINTMASK_EINTM29,		29
	.EQU	INT_EINTMASK_EINTM28,		28
	.EQU	INT_EINTMASK_EINTM27,		27
	.EQU	INT_EINTMASK_EINTM26,		26
	.EQU	INT_EINTMASK_EINTM25,		25
	.EQU	INT_EINTMASK_EINTM24,		24
	.EQU	INT_EINTMASK_EINTM23,		23
	.EQU	INT_EINTMASK_EINTM22,		22
	.EQU	INT_EINTMASK_EINTM21,		21
	.EQU	INT_EINTMASK_EINTM20,		20
	.EQU	INT_EINTMASK_EINTM19,		19
	.EQU	INT_EINTMASK_EINTM18,		18
	.EQU	INT_EINTMASK_EINTM17,		17
	.EQU	INT_EINTMASK_EINTM16,		16
//  register-------------------------------------
	.EQU	INT_EINTRISE,	0x40200084
//  0x4020 0084  INT_EINTRISE   Bits-------------------------------------
	.EQU	INT_EINTRISE_EINTRI31,		31
	.EQU	INT_EINTRISE_EINTRI30,		30
	.EQU	INT_EINTRISE_EINTRI29,		29
	.EQU	INT_EINTRISE_EINTRI28,		28
	.EQU	INT_EINTRISE_EINTRI27,		27
	.EQU	INT_EINTRISE_EINTRI26,		26
	.EQU	INT_EINTRISE_EINTRI25,		25
	.EQU	INT_EINTRISE_EINTRI24,		24
	.EQU	INT_EINTRISE_EINTRI23,		23
	.EQU	INT_EINTRISE_EINTRI22,		22
	.EQU	INT_EINTRISE_EINTRI21,		21
	.EQU	INT_EINTRISE_EINTRI20,		20
	.EQU	INT_EINTRISE_EINTRI19,		19
	.EQU	INT_EINTRISE_EINTRI18,		18
	.EQU	INT_EINTRISE_EINTRI17,		17
	.EQU	INT_EINTRISE_EINTRI16,		16
//  register-------------------------------------
	.EQU	INT_EINTFALL,	0x40200088
//  0x4020 0088  INT_EINTFALL   Bits-------------------------------------
	.EQU	INT_EINTFALL_EINTFA31,		31
	.EQU	INT_EINTFALL_EINTFA30,		30
	.EQU	INT_EINTFALL_EINTFA29,		29
	.EQU	INT_EINTFALL_EINTFA28,		28
	.EQU	INT_EINTFALL_EINTFA27,		27
	.EQU	INT_EINTFALL_EINTFA26,		26
	.EQU	INT_EINTFALL_EINTFA25,		25
	.EQU	INT_EINTFALL_EINTFA24,		24
	.EQU	INT_EINTFALL_EINTFA23,		23
	.EQU	INT_EINTFALL_EINTFA22,		22
	.EQU	INT_EINTFALL_EINTFA21,		21
	.EQU	INT_EINTFALL_EINTFA20,		20
	.EQU	INT_EINTFALL_EINTFA19,		19
	.EQU	INT_EINTFALL_EINTFA18,		18
	.EQU	INT_EINTFALL_EINTFA17,		17
	.EQU	INT_EINTFALL_EINTFA16,		16
//  register-------------------------------------
	.EQU	INT_EINTF,		0x4020008C
//  0x4020 008C  INT_EINTF   Bits-------------------------------------
	.EQU	INT_EINTF_EINTIF31,		31
	.EQU	INT_EINTF_EINTIF30,		30
	.EQU	INT_EINTF_EINTIF29,		29
	.EQU	INT_EINTF_EINTIF28,		28
	.EQU	INT_EINTF_EINTIF27,		27
	.EQU	INT_EINTF_EINTIF26,		26
	.EQU	INT_EINTF_EINTIF25,		25
	.EQU	INT_EINTF_EINTIF24,		24
	.EQU	INT_EINTF_EINTIF23,		23
	.EQU	INT_EINTF_EINTIF22,		22
	.EQU	INT_EINTF_EINTIF21,		21
	.EQU	INT_EINTF_EINTIF20,		20
	.EQU	INT_EINTF_EINTIF19,		19
	.EQU	INT_EINTF_EINTIF18,		18
	.EQU	INT_EINTF_EINTIF17,		17
	.EQU	INT_EINTF_EINTIF16,		16
//  register-------------------------------------
	.EQU	INT_EINTEL,	0x40200090
//  0x4020 0090  INT_EINTEL   Bits-------------------------------------
	.EQU	INT_EINTEL_EINTEL31,		31
	.EQU	INT_EINTEL_EINTEL30,		30
	.EQU	INT_EINTEL_EINTEL29,		29
	.EQU	INT_EINTEL_EINTEL28,		28
	.EQU	INT_EINTEL_EINTEL27,		27
	.EQU	INT_EINTEL_EINTEL26,		26
	.EQU	INT_EINTEL_EINTEL25,		25
	.EQU	INT_EINTEL_EINTEL24,		24
	.EQU	INT_EINTEL_EINTEL23,		23
	.EQU	INT_EINTEL_EINTEL22,		22
	.EQU	INT_EINTEL_EINTEL21,		21
	.EQU	INT_EINTEL_EINTEL20,		20
	.EQU	INT_EINTEL_EINTEL19,		19
	.EQU	INT_EINTEL_EINTEL18,		18
	.EQU	INT_EINTEL_EINTEL17,		17
	.EQU	INT_EINTEL_EINTEL16,		16
//  register-------------------------------------
	.EQU	SYS_PSW,		0x402000B0
//  0x4020 00B0  SYS_PSW   Bits-------------------------------------
	.EQU	SYS_PSW_N,			31
	.EQU	SYS_PSW_Z,			30
	.EQU	SYS_PSW_C,			29
	.EQU	SYS_PSW_V,			28
//  register-------------------------------------
	.EQU	SYS_MCTL,		0x402000B4
//  0x4020 00B4  SYS_MCTL   Bits-------------------------------------
	.EQU	SYS_MCTL_FETCHOUT,		31
	.EQU	SYS_MCTL_RUNOUT,		30
	.EQU	SYS_MCTL_SPSEL,		16
	.EQU	SYS_MCTL_SUSTA,		15
	.EQU	SYS_MCTL_STACKALIGN,		9
	.EQU	SYS_MCTL_SLPONMOD,		4
	.EQU	SYS_MCTL_SLEEPDEEP,		2
	.EQU	SYS_MCTL_SLEEPONEXIT,		1
//  register-------------------------------------
	.EQU	SYS_ARCTL,		0x402000B8
//  0x4020 00B8  SYS_ARCTL   Bits-------------------------------------
	.EQU	SYS_ARCTL_ARKEY31,		31
	.EQU	SYS_ARCTL_ARKEY30,		30
	.EQU	SYS_ARCTL_ARKEY29,		29
	.EQU	SYS_ARCTL_ARKEY28,		28
	.EQU	SYS_ARCTL_ARKEY27,		27
	.EQU	SYS_ARCTL_ARKEY26,		26
	.EQU	SYS_ARCTL_ARKEY25,		25
	.EQU	SYS_ARCTL_ARKEY24,		24
	.EQU	SYS_ARCTL_ARKEY23,		23
	.EQU	SYS_ARCTL_ARKEY22,		22
	.EQU	SYS_ARCTL_ARKEY21,		21
	.EQU	SYS_ARCTL_ARKEY20,		20
	.EQU	SYS_ARCTL_ARKEY19,		19
	.EQU	SYS_ARCTL_ARKEY18,		18
	.EQU	SYS_ARCTL_ARKEY17,		17
	.EQU	SYS_ARCTL_ARKEY16,		16
	.EQU	SYS_ARCTL_ROMLOCK,		11
	.EQU	SYS_ARCTL_CDMALDC1,		10
	.EQU	SYS_ARCTL_CDMALDC0,		9
	.EQU	SYS_ARCTL_CDBUGBS,		8
	.EQU	SYS_ARCTL_CDMADC,		7
	.EQU	SYS_ARCTL_CRWDC,		6
	.EQU	SYS_ARCTL_CDMAAM,		5
	.EQU	SYS_ARCTL_CDMAR,		4
	.EQU	SYS_ARCTL_SYSTEMRST,		2
//  register-------------------------------------
	.EQU	SYS_VECTOFF,	0x402000BC
//  0x4020 00BC  SYS_VECTOFF   Bits-------------------------------------
	.EQU	SYS_VECTOFF_TBLOFF31,		31
	.EQU	SYS_VECTOFF_TBLOFF30,		30
	.EQU	SYS_VECTOFF_TBLOFF29,		29
	.EQU	SYS_VECTOFF_TBLOFF28,		28
	.EQU	SYS_VECTOFF_TBLOFF27,		27
	.EQU	SYS_VECTOFF_TBLOFF26,		26
	.EQU	SYS_VECTOFF_TBLOFF25,		25
	.EQU	SYS_VECTOFF_TBLOFF24,		24
	.EQU	SYS_VECTOFF_TBLOFF23,		23
	.EQU	SYS_VECTOFF_TBLOFF22,		22
	.EQU	SYS_VECTOFF_TBLOFF21,		21
	.EQU	SYS_VECTOFF_TBLOFF20,		20
	.EQU	SYS_VECTOFF_TBLOFF19,		19
	.EQU	SYS_VECTOFF_TBLOFF18,		18
	.EQU	SYS_VECTOFF_TBLOFF17,		17
	.EQU	SYS_VECTOFF_TBLOFF16,		16
	.EQU	SYS_VECTOFF_TBLOFF15,		15
	.EQU	SYS_VECTOFF_TBLOFF14,		14
	.EQU	SYS_VECTOFF_TBLOFF13,		13
	.EQU	SYS_VECTOFF_TBLOFF12,		12
	.EQU	SYS_VECTOFF_TBLOFF11,		11
	.EQU	SYS_VECTOFF_TBLOFF10,		10
	.EQU	SYS_VECTOFF_TBLOFF9,		9
	.EQU	SYS_VECTOFF_TBLOFF8,		8
	.EQU	SYS_VECTOFF_TBLOFF7,		7
	.EQU	SYS_VECTOFF_TBLOFF6,		6
	.EQU	SYS_VECTOFF_TBLOFF5,		5
	.EQU	SYS_VECTOFF_TBLOFF4,		4
	.EQU	SYS_VECTOFF_TBLOFF3,		3
	.EQU	SYS_VECTOFF_TBLOFF2,		2
	.EQU	SYS_VECTOFF_TBLOFF1,		1
	.EQU	SYS_VECTOFF_TBLOFF0,		0
//  register-------------------------------------
	.EQU	CACHE_CTLR,	0x402000C0
//  0x4020 00C0  CACHE_CTLR   Bits-------------------------------------
	.EQU	CACHE_CTLR_BUSWERR,		18
	.EQU	CACHE_CTLR_BUSRERR,		17
	.EQU	CACHE_CTLR_BUSTD1,		16
	.EQU	CACHE_CTLR_BUSTD0,		15
	.EQU	CACHE_CTLR_BUSTMODE,		14
	.EQU	CACHE_CTLR_BUSTSTART,		13
	.EQU	CACHE_CTLR_BUSTEN,		12
	.EQU	CACHE_CTLR_CACHETEN,		11
	.EQU	CACHE_CTLR_CECCEN,		4
	.EQU	CACHE_CTLR_ICRD2LEN,		3
	.EQU	CACHE_CTLR_ICWR2LEN,		2
	.EQU	CACHE_CTLR_CACHERST,		1
	.EQU	CACHE_CTLR_CACHEEN,		0
//  register-------------------------------------
	.EQU	SYS_RAMSPA,	0x402000C4
//  0x4020 00C4  SYS_RAMSPA   Bits-------------------------------------
	.EQU	SYS_RAMSPA_RAMSPA25,		25
	.EQU	SYS_RAMSPA_RAMSPA24,		24
	.EQU	SYS_RAMSPA_RAMSPA23,		23
	.EQU	SYS_RAMSPA_RAMSPA22,		22
	.EQU	SYS_RAMSPA_RAMSPA21,		21
	.EQU	SYS_RAMSPA_RAMSPA20,		20
	.EQU	SYS_RAMSPA_RAMSPA19,		19
	.EQU	SYS_RAMSPA_RAMSPA18,		18
	.EQU	SYS_RAMSPA_RAMSPA17,		17
	.EQU	SYS_RAMSPA_RAMSPA16,		16
	.EQU	SYS_RAMSPA_RAMSPA15,		15
	.EQU	SYS_RAMSPA_RAMSPA14,		14
	.EQU	SYS_RAMSPA_RAMSPA13,		13
	.EQU	SYS_RAMSPA_RAMSPA12,		12
	.EQU	SYS_RAMSPA_RAMSPA11,		11
	.EQU	SYS_RAMSPA_RAMSPA10,		10
	.EQU	SYS_RAMSPA_RAMSPA9,		9
	.EQU	SYS_RAMSPA_RAMSPA8,		8
	.EQU	SYS_RAMSPA_RAMSPA7,		7
	.EQU	SYS_RAMSPA_RAMSPA6,		6
	.EQU	SYS_RAMSPA_RAMSPA5,		5
	.EQU	SYS_RAMSPA_RAMSPA4,		4
	.EQU	SYS_RAMSPA_RAMSPA3,		3
	.EQU	SYS_RAMSPA_RAMSPA2,		2
	.EQU	SYS_RAMSPA_RAMSPA1,		1
	.EQU	SYS_RAMSPA_RAMSPA0,		0
//  register-------------------------------------
	.EQU	SYS_MEMCTL,	0x402000C8
//  0x4020 00C8  SYS_MEMCTL   Bits-------------------------------------
	.EQU	SYS_MEMCTL_MEMM1,		1
	.EQU	SYS_MEMCTL_MEMM0,		0
//  register-------------------------------------
	.EQU	SYS_MSPSPA,	0x402000CC
//  0x4020 00CC  SYS_MSPSPA   Bits-------------------------------------
	.EQU	SYS_MSPSPA_MSPSPAH15,		31
	.EQU	SYS_MSPSPA_MSPSPAH14,		30
	.EQU	SYS_MSPSPA_MSPSPAH13,		29
	.EQU	SYS_MSPSPA_MSPSPAH12,		28
	.EQU	SYS_MSPSPA_MSPSPAH11,		27
	.EQU	SYS_MSPSPA_MSPSPAH10,		26
	.EQU	SYS_MSPSPA_MSPSPAH9,		25
	.EQU	SYS_MSPSPA_MSPSPAH8,		24
	.EQU	SYS_MSPSPA_MSPSPAH7,		23
	.EQU	SYS_MSPSPA_MSPSPAH6,		22
	.EQU	SYS_MSPSPA_MSPSPAH5,		21
	.EQU	SYS_MSPSPA_MSPSPAH4,		20
	.EQU	SYS_MSPSPA_MSPSPAH3,		19
	.EQU	SYS_MSPSPA_MSPSPAH2,		18
	.EQU	SYS_MSPSPA_MSPSPAH1,		17
	.EQU	SYS_MSPSPA_MSPSPAH0,		16
	.EQU	SYS_MSPSPA_MSPSPAL15,		15
	.EQU	SYS_MSPSPA_MSPSPAL14,		14
	.EQU	SYS_MSPSPA_MSPSPAL13,		13
	.EQU	SYS_MSPSPA_MSPSPAL12,		12
	.EQU	SYS_MSPSPA_MSPSPAL11,		11
	.EQU	SYS_MSPSPA_MSPSPAL10,		10
	.EQU	SYS_MSPSPA_MSPSPAL9,		9
	.EQU	SYS_MSPSPA_MSPSPAL8,		8
	.EQU	SYS_MSPSPA_MSPSPAL7,		7
	.EQU	SYS_MSPSPA_MSPSPAL6,		6
	.EQU	SYS_MSPSPA_MSPSPAL5,		5
	.EQU	SYS_MSPSPA_MSPSPAL4,		4
	.EQU	SYS_MSPSPA_MSPSPAL3,		3
	.EQU	SYS_MSPSPA_MSPSPAL2,		2
	.EQU	SYS_MSPSPA_MSPSPAL1,		1
	.EQU	SYS_MSPSPA_MSPSPAL0,		0
//  register-------------------------------------
	.EQU	SYS_PSPSPA,	0x402000D0
//  0x4020 00D0  SYS_PSPSPA   Bits-------------------------------------
	.EQU	SYS_PSPSPA_PSPSPAH15,		31
	.EQU	SYS_PSPSPA_PSPSPAH14,		30
	.EQU	SYS_PSPSPA_PSPSPAH13,		29
	.EQU	SYS_PSPSPA_PSPSPAH12,		28
	.EQU	SYS_PSPSPA_PSPSPAH11,		27
	.EQU	SYS_PSPSPA_PSPSPAH10,		26
	.EQU	SYS_PSPSPA_PSPSPAH9,		25
	.EQU	SYS_PSPSPA_PSPSPAH8,		24
	.EQU	SYS_PSPSPA_PSPSPAH7,		23
	.EQU	SYS_PSPSPA_PSPSPAH6,		22
	.EQU	SYS_PSPSPA_PSPSPAH5,		21
	.EQU	SYS_PSPSPA_PSPSPAH4,		20
	.EQU	SYS_PSPSPA_PSPSPAH3,		19
	.EQU	SYS_PSPSPA_PSPSPAH2,		18
	.EQU	SYS_PSPSPA_PSPSPAH1,		17
	.EQU	SYS_PSPSPA_PSPSPAH0,		16
	.EQU	SYS_PSPSPA_PSPSPAL15,		15
	.EQU	SYS_PSPSPA_PSPSPAL14,		14
	.EQU	SYS_PSPSPA_PSPSPAL13,		13
	.EQU	SYS_PSPSPA_PSPSPAL12,		12
	.EQU	SYS_PSPSPA_PSPSPAL11,		11
	.EQU	SYS_PSPSPA_PSPSPAL10,		10
	.EQU	SYS_PSPSPA_PSPSPAL9,		9
	.EQU	SYS_PSPSPA_PSPSPAL8,		8
	.EQU	SYS_PSPSPA_PSPSPAL7,		7
	.EQU	SYS_PSPSPA_PSPSPAL6,		6
	.EQU	SYS_PSPSPA_PSPSPAL5,		5
	.EQU	SYS_PSPSPA_PSPSPAL4,		4
	.EQU	SYS_PSPSPA_PSPSPAL3,		3
	.EQU	SYS_PSPSPA_PSPSPAL2,		2
	.EQU	SYS_PSPSPA_PSPSPAL1,		1
	.EQU	SYS_PSPSPA_PSPSPAL0,		0
//  register-------------------------------------
	.EQU	DMA_CTLR1,		0x40001100
//  0x4000 1100  DMA_CTLR1   Bits-------------------------------------
	.EQU	DMA_CTLR1_NUMODT15,		31
	.EQU	DMA_CTLR1_NUMODT14,		30
	.EQU	DMA_CTLR1_NUMODT13,		29
	.EQU	DMA_CTLR1_NUMODT12,		28
	.EQU	DMA_CTLR1_NUMODT11,		27
	.EQU	DMA_CTLR1_NUMODT10,		26
	.EQU	DMA_CTLR1_NUMODT9,		25
	.EQU	DMA_CTLR1_NUMODT8,		24
	.EQU	DMA_CTLR1_NUMODT7,		23
	.EQU	DMA_CTLR1_NUMODT6,		22
	.EQU	DMA_CTLR1_NUMODT5,		21
	.EQU	DMA_CTLR1_NUMODT4,		20
	.EQU	DMA_CTLR1_NUMODT3,		19
	.EQU	DMA_CTLR1_NUMODT2,		18
	.EQU	DMA_CTLR1_NUMODT1,		17
	.EQU	DMA_CTLR1_NUMODT0,		16
	.EQU	DMA_CTLR1_M2M,		15
	.EQU	DMA_CTLR1_CPL1,		14
	.EQU	DMA_CTLR1_CPL0,		13
	.EQU	DMA_CTLR1_ONESHOT,		12
	.EQU	DMA_CTLR1_PDS1,		11
	.EQU	DMA_CTLR1_PDS0,		10
	.EQU	DMA_CTLR1_MDS1,		9
	.EQU	DMA_CTLR1_MDS0,		8
	.EQU	DMA_CTLR1_PINC,		7
	.EQU	DMA_CTLR1_MINC,		6
	.EQU	DMA_CTLR1_LPM,		5
	.EQU	DMA_CTLR1_DDIR,		4
	.EQU	DMA_CTLR1_BLKM,		3
	.EQU	DMA_CTLR1_DMAHALT,		1
	.EQU	DMA_CTLR1_DMAEN,		0
//  register-------------------------------------
	.EQU	DMA_CTLR2,		0x40001104
//  0x4000 1104  DMA_CTLR2   Bits-------------------------------------
	.EQU	DMA_CTLR2_NUMODT15,		31
	.EQU	DMA_CTLR2_NUMODT14,		30
	.EQU	DMA_CTLR2_NUMODT13,		29
	.EQU	DMA_CTLR2_NUMODT12,		28
	.EQU	DMA_CTLR2_NUMODT11,		27
	.EQU	DMA_CTLR2_NUMODT10,		26
	.EQU	DMA_CTLR2_NUMODT9,		25
	.EQU	DMA_CTLR2_NUMODT8,		24
	.EQU	DMA_CTLR2_NUMODT7,		23
	.EQU	DMA_CTLR2_NUMODT6,		22
	.EQU	DMA_CTLR2_NUMODT5,		21
	.EQU	DMA_CTLR2_NUMODT4,		20
	.EQU	DMA_CTLR2_NUMODT3,		19
	.EQU	DMA_CTLR2_NUMODT2,		18
	.EQU	DMA_CTLR2_NUMODT1,		17
	.EQU	DMA_CTLR2_NUMODT0,		16
	.EQU	DMA_CTLR2_M2M,		15
	.EQU	DMA_CTLR2_CPL1,		14
	.EQU	DMA_CTLR2_CPL0,		13
	.EQU	DMA_CTLR2_ONESHOT,		12
	.EQU	DMA_CTLR2_PDS1,		11
	.EQU	DMA_CTLR2_PDS0,		10
	.EQU	DMA_CTLR2_MDS1,		9
	.EQU	DMA_CTLR2_MDS0,		8
	.EQU	DMA_CTLR2_PINC,		7
	.EQU	DMA_CTLR2_MINC,		6
	.EQU	DMA_CTLR2_LPM,		5
	.EQU	DMA_CTLR2_DDIR,		4
	.EQU	DMA_CTLR2_BLKM,		3
	.EQU	DMA_CTLR2_DMAHALT,		1
	.EQU	DMA_CTLR2_DMAEN,		0
//  register-------------------------------------
	.EQU	DMA_CTLR3,		0x40001108
//  0x4000 1108  DMA_CTLR3   Bits-------------------------------------
	.EQU	DMA_CTLR3_NUMODT15,		31
	.EQU	DMA_CTLR3_NUMODT14,		30
	.EQU	DMA_CTLR3_NUMODT13,		29
	.EQU	DMA_CTLR3_NUMODT12,		28
	.EQU	DMA_CTLR3_NUMODT11,		27
	.EQU	DMA_CTLR3_NUMODT10,		26
	.EQU	DMA_CTLR3_NUMODT9,		25
	.EQU	DMA_CTLR3_NUMODT8,		24
	.EQU	DMA_CTLR3_NUMODT7,		23
	.EQU	DMA_CTLR3_NUMODT6,		22
	.EQU	DMA_CTLR3_NUMODT5,		21
	.EQU	DMA_CTLR3_NUMODT4,		20
	.EQU	DMA_CTLR3_NUMODT3,		19
	.EQU	DMA_CTLR3_NUMODT2,		18
	.EQU	DMA_CTLR3_NUMODT1,		17
	.EQU	DMA_CTLR3_NUMODT0,		16
	.EQU	DMA_CTLR3_M2M,		15
	.EQU	DMA_CTLR3_CPL1,		14
	.EQU	DMA_CTLR3_CPL0,		13
	.EQU	DMA_CTLR3_ONESHOT,		12
	.EQU	DMA_CTLR3_PDS1,		11
	.EQU	DMA_CTLR3_PDS0,		10
	.EQU	DMA_CTLR3_MDS1,		9
	.EQU	DMA_CTLR3_MDS0,		8
	.EQU	DMA_CTLR3_PINC,		7
	.EQU	DMA_CTLR3_MINC,		6
	.EQU	DMA_CTLR3_LPM,		5
	.EQU	DMA_CTLR3_DDIR,		4
	.EQU	DMA_CTLR3_BLKM,		3
	.EQU	DMA_CTLR3_DMAHALT,		1
	.EQU	DMA_CTLR3_DMAEN,		0
//  register-------------------------------------
	.EQU	DMA_CTLR4,		0x4000110C
//  0x4000 110C  DMA_CTLR4   Bits-------------------------------------
	.EQU	DMA_CTLR4_NUMODT15,		31
	.EQU	DMA_CTLR4_NUMODT14,		30
	.EQU	DMA_CTLR4_NUMODT13,		29
	.EQU	DMA_CTLR4_NUMODT12,		28
	.EQU	DMA_CTLR4_NUMODT11,		27
	.EQU	DMA_CTLR4_NUMODT10,		26
	.EQU	DMA_CTLR4_NUMODT9,		25
	.EQU	DMA_CTLR4_NUMODT8,		24
	.EQU	DMA_CTLR4_NUMODT7,		23
	.EQU	DMA_CTLR4_NUMODT6,		22
	.EQU	DMA_CTLR4_NUMODT5,		21
	.EQU	DMA_CTLR4_NUMODT4,		20
	.EQU	DMA_CTLR4_NUMODT3,		19
	.EQU	DMA_CTLR4_NUMODT2,		18
	.EQU	DMA_CTLR4_NUMODT1,		17
	.EQU	DMA_CTLR4_NUMODT0,		16
	.EQU	DMA_CTLR4_M2M,		15
	.EQU	DMA_CTLR4_CPL1,		14
	.EQU	DMA_CTLR4_CPL0,		13
	.EQU	DMA_CTLR4_ONESHOT,		12
	.EQU	DMA_CTLR4_PDS1,		11
	.EQU	DMA_CTLR4_PDS0,		10
	.EQU	DMA_CTLR4_MDS1,		9
	.EQU	DMA_CTLR4_MDS0,		8
	.EQU	DMA_CTLR4_PINC,		7
	.EQU	DMA_CTLR4_MINC,		6
	.EQU	DMA_CTLR4_LPM,		5
	.EQU	DMA_CTLR4_DDIR,		4
	.EQU	DMA_CTLR4_BLKM,		3
	.EQU	DMA_CTLR4_DMAHALT,		1
	.EQU	DMA_CTLR4_DMAEN,		0
//  register-------------------------------------
	.EQU	DMA_CTLR5,		0x40001110
//  0x4000 1110  DMA_CTLR5   Bits-------------------------------------
	.EQU	DMA_CTLR5_NUMODT15,		31
	.EQU	DMA_CTLR5_NUMODT14,		30
	.EQU	DMA_CTLR5_NUMODT13,		29
	.EQU	DMA_CTLR5_NUMODT12,		28
	.EQU	DMA_CTLR5_NUMODT11,		27
	.EQU	DMA_CTLR5_NUMODT10,		26
	.EQU	DMA_CTLR5_NUMODT9,		25
	.EQU	DMA_CTLR5_NUMODT8,		24
	.EQU	DMA_CTLR5_NUMODT7,		23
	.EQU	DMA_CTLR5_NUMODT6,		22
	.EQU	DMA_CTLR5_NUMODT5,		21
	.EQU	DMA_CTLR5_NUMODT4,		20
	.EQU	DMA_CTLR5_NUMODT3,		19
	.EQU	DMA_CTLR5_NUMODT2,		18
	.EQU	DMA_CTLR5_NUMODT1,		17
	.EQU	DMA_CTLR5_NUMODT0,		16
	.EQU	DMA_CTLR5_M2M,		15
	.EQU	DMA_CTLR5_CPL1,		14
	.EQU	DMA_CTLR5_CPL0,		13
	.EQU	DMA_CTLR5_ONESHOT,		12
	.EQU	DMA_CTLR5_PDS1,		11
	.EQU	DMA_CTLR5_PDS0,		10
	.EQU	DMA_CTLR5_MDS1,		9
	.EQU	DMA_CTLR5_MDS0,		8
	.EQU	DMA_CTLR5_PINC,		7
	.EQU	DMA_CTLR5_MINC,		6
	.EQU	DMA_CTLR5_LPM,		5
	.EQU	DMA_CTLR5_DDIR,		4
	.EQU	DMA_CTLR5_BLKM,		3
	.EQU	DMA_CTLR5_DMAHALT,		1
	.EQU	DMA_CTLR5_DMAEN,		0
//  register-------------------------------------
	.EQU	DMA_CTLR6,		0x40001114
//  0x4000 1114  DMA_CTLR6   Bits-------------------------------------
	.EQU	DMA_CTLR6_NUMODT15,		31
	.EQU	DMA_CTLR6_NUMODT14,		30
	.EQU	DMA_CTLR6_NUMODT13,		29
	.EQU	DMA_CTLR6_NUMODT12,		28
	.EQU	DMA_CTLR6_NUMODT11,		27
	.EQU	DMA_CTLR6_NUMODT10,		26
	.EQU	DMA_CTLR6_NUMODT9,		25
	.EQU	DMA_CTLR6_NUMODT8,		24
	.EQU	DMA_CTLR6_NUMODT7,		23
	.EQU	DMA_CTLR6_NUMODT6,		22
	.EQU	DMA_CTLR6_NUMODT5,		21
	.EQU	DMA_CTLR6_NUMODT4,		20
	.EQU	DMA_CTLR6_NUMODT3,		19
	.EQU	DMA_CTLR6_NUMODT2,		18
	.EQU	DMA_CTLR6_NUMODT1,		17
	.EQU	DMA_CTLR6_NUMODT0,		16
	.EQU	DMA_CTLR6_M2M,		15
	.EQU	DMA_CTLR6_CPL1,		14
	.EQU	DMA_CTLR6_CPL0,		13
	.EQU	DMA_CTLR6_ONESHOT,		12
	.EQU	DMA_CTLR6_PDS1,		11
	.EQU	DMA_CTLR6_PDS0,		10
	.EQU	DMA_CTLR6_MDS1,		9
	.EQU	DMA_CTLR6_MDS0,		8
	.EQU	DMA_CTLR6_PINC,		7
	.EQU	DMA_CTLR6_MINC,		6
	.EQU	DMA_CTLR6_LPM,		5
	.EQU	DMA_CTLR6_DDIR,		4
	.EQU	DMA_CTLR6_BLKM,		3
	.EQU	DMA_CTLR6_DMAHALT,		1
	.EQU	DMA_CTLR6_DMAEN,		0
//  register-------------------------------------
	.EQU	DMA_CTLR7,		0x40001118
//  0x4000 1118  DMA_CTLR7   Bits-------------------------------------
	.EQU	DMA_CTLR7_NUMODT15,		31
	.EQU	DMA_CTLR7_NUMODT14,		30
	.EQU	DMA_CTLR7_NUMODT13,		29
	.EQU	DMA_CTLR7_NUMODT12,		28
	.EQU	DMA_CTLR7_NUMODT11,		27
	.EQU	DMA_CTLR7_NUMODT10,		26
	.EQU	DMA_CTLR7_NUMODT9,		25
	.EQU	DMA_CTLR7_NUMODT8,		24
	.EQU	DMA_CTLR7_NUMODT7,		23
	.EQU	DMA_CTLR7_NUMODT6,		22
	.EQU	DMA_CTLR7_NUMODT5,		21
	.EQU	DMA_CTLR7_NUMODT4,		20
	.EQU	DMA_CTLR7_NUMODT3,		19
	.EQU	DMA_CTLR7_NUMODT2,		18
	.EQU	DMA_CTLR7_NUMODT1,		17
	.EQU	DMA_CTLR7_NUMODT0,		16
	.EQU	DMA_CTLR7_M2M,		15
	.EQU	DMA_CTLR7_CPL1,		14
	.EQU	DMA_CTLR7_CPL0,		13
	.EQU	DMA_CTLR7_ONESHOT,		12
	.EQU	DMA_CTLR7_PDS1,		11
	.EQU	DMA_CTLR7_PDS0,		10
	.EQU	DMA_CTLR7_MDS1,		9
	.EQU	DMA_CTLR7_MDS0,		8
	.EQU	DMA_CTLR7_PINC,		7
	.EQU	DMA_CTLR7_MINC,		6
	.EQU	DMA_CTLR7_LPM,		5
	.EQU	DMA_CTLR7_DDIR,		4
	.EQU	DMA_CTLR7_BLKM,		3
	.EQU	DMA_CTLR7_DMAHALT,		1
	.EQU	DMA_CTLR7_DMAEN,		0
//  register-------------------------------------
	.EQU	DMA_PADDR1,	0x40001120
//  0x4000 1120  DMA_PADDR1   Bits-------------------------------------
	.EQU	DMA_PADDR1_PADDR31,		31
	.EQU	DMA_PADDR1_PADDR30,		30
	.EQU	DMA_PADDR1_PADDR29,		29
	.EQU	DMA_PADDR1_PADDR28,		28
	.EQU	DMA_PADDR1_PADDR27,		27
	.EQU	DMA_PADDR1_PADDR26,		26
	.EQU	DMA_PADDR1_PADDR25,		25
	.EQU	DMA_PADDR1_PADDR24,		24
	.EQU	DMA_PADDR1_PADDR23,		23
	.EQU	DMA_PADDR1_PADDR22,		22
	.EQU	DMA_PADDR1_PADDR21,		21
	.EQU	DMA_PADDR1_PADDR20,		20
	.EQU	DMA_PADDR1_PADDR19,		19
	.EQU	DMA_PADDR1_PADDR18,		18
	.EQU	DMA_PADDR1_PADDR17,		17
	.EQU	DMA_PADDR1_PADDR16,		16
	.EQU	DMA_PADDR1_PADDR15,		15
	.EQU	DMA_PADDR1_PADDR14,		14
	.EQU	DMA_PADDR1_PADDR13,		13
	.EQU	DMA_PADDR1_PADDR12,		12
	.EQU	DMA_PADDR1_PADDR11,		11
	.EQU	DMA_PADDR1_PADDR10,		10
	.EQU	DMA_PADDR1_PADDR9,		9
	.EQU	DMA_PADDR1_PADDR8,		8
	.EQU	DMA_PADDR1_PADDR7,		7
	.EQU	DMA_PADDR1_PADDR6,		6
	.EQU	DMA_PADDR1_PADDR5,		5
	.EQU	DMA_PADDR1_PADDR4,		4
	.EQU	DMA_PADDR1_PADDR3,		3
	.EQU	DMA_PADDR1_PADDR2,		2
	.EQU	DMA_PADDR1_PADDR1,		1
	.EQU	DMA_PADDR1_PADDR0,		0
//  register-------------------------------------
	.EQU	DMA_PADDR2,	0x40001124
//  0x4000 1124  DMA_PADDR2   Bits-------------------------------------
	.EQU	DMA_PADDR2_PADDR31,		31
	.EQU	DMA_PADDR2_PADDR30,		30
	.EQU	DMA_PADDR2_PADDR29,		29
	.EQU	DMA_PADDR2_PADDR28,		28
	.EQU	DMA_PADDR2_PADDR27,		27
	.EQU	DMA_PADDR2_PADDR26,		26
	.EQU	DMA_PADDR2_PADDR25,		25
	.EQU	DMA_PADDR2_PADDR24,		24
	.EQU	DMA_PADDR2_PADDR23,		23
	.EQU	DMA_PADDR2_PADDR22,		22
	.EQU	DMA_PADDR2_PADDR21,		21
	.EQU	DMA_PADDR2_PADDR20,		20
	.EQU	DMA_PADDR2_PADDR19,		19
	.EQU	DMA_PADDR2_PADDR18,		18
	.EQU	DMA_PADDR2_PADDR17,		17
	.EQU	DMA_PADDR2_PADDR16,		16
	.EQU	DMA_PADDR2_PADDR15,		15
	.EQU	DMA_PADDR2_PADDR14,		14
	.EQU	DMA_PADDR2_PADDR13,		13
	.EQU	DMA_PADDR2_PADDR12,		12
	.EQU	DMA_PADDR2_PADDR11,		11
	.EQU	DMA_PADDR2_PADDR10,		10
	.EQU	DMA_PADDR2_PADDR9,		9
	.EQU	DMA_PADDR2_PADDR8,		8
	.EQU	DMA_PADDR2_PADDR7,		7
	.EQU	DMA_PADDR2_PADDR6,		6
	.EQU	DMA_PADDR2_PADDR5,		5
	.EQU	DMA_PADDR2_PADDR4,		4
	.EQU	DMA_PADDR2_PADDR3,		3
	.EQU	DMA_PADDR2_PADDR2,		2
	.EQU	DMA_PADDR2_PADDR1,		1
	.EQU	DMA_PADDR2_PADDR0,		0
//  register-------------------------------------
	.EQU	DMA_PADDR3,	0x40001128
//  0x4000 1128  DMA_PADDR3   Bits-------------------------------------
	.EQU	DMA_PADDR3_PADDR31,		31
	.EQU	DMA_PADDR3_PADDR30,		30
	.EQU	DMA_PADDR3_PADDR29,		29
	.EQU	DMA_PADDR3_PADDR28,		28
	.EQU	DMA_PADDR3_PADDR27,		27
	.EQU	DMA_PADDR3_PADDR26,		26
	.EQU	DMA_PADDR3_PADDR25,		25
	.EQU	DMA_PADDR3_PADDR24,		24
	.EQU	DMA_PADDR3_PADDR23,		23
	.EQU	DMA_PADDR3_PADDR22,		22
	.EQU	DMA_PADDR3_PADDR21,		21
	.EQU	DMA_PADDR3_PADDR20,		20
	.EQU	DMA_PADDR3_PADDR19,		19
	.EQU	DMA_PADDR3_PADDR18,		18
	.EQU	DMA_PADDR3_PADDR17,		17
	.EQU	DMA_PADDR3_PADDR16,		16
	.EQU	DMA_PADDR3_PADDR15,		15
	.EQU	DMA_PADDR3_PADDR14,		14
	.EQU	DMA_PADDR3_PADDR13,		13
	.EQU	DMA_PADDR3_PADDR12,		12
	.EQU	DMA_PADDR3_PADDR11,		11
	.EQU	DMA_PADDR3_PADDR10,		10
	.EQU	DMA_PADDR3_PADDR9,		9
	.EQU	DMA_PADDR3_PADDR8,		8
	.EQU	DMA_PADDR3_PADDR7,		7
	.EQU	DMA_PADDR3_PADDR6,		6
	.EQU	DMA_PADDR3_PADDR5,		5
	.EQU	DMA_PADDR3_PADDR4,		4
	.EQU	DMA_PADDR3_PADDR3,		3
	.EQU	DMA_PADDR3_PADDR2,		2
	.EQU	DMA_PADDR3_PADDR1,		1
	.EQU	DMA_PADDR3_PADDR0,		0
//  register-------------------------------------
	.EQU	DMA_PADDR4,	0x4000112C
//  0x4000 112C  DMA_PADDR4   Bits-------------------------------------
	.EQU	DMA_PADDR4_PADDR31,		31
	.EQU	DMA_PADDR4_PADDR30,		30
	.EQU	DMA_PADDR4_PADDR29,		29
	.EQU	DMA_PADDR4_PADDR28,		28
	.EQU	DMA_PADDR4_PADDR27,		27
	.EQU	DMA_PADDR4_PADDR26,		26
	.EQU	DMA_PADDR4_PADDR25,		25
	.EQU	DMA_PADDR4_PADDR24,		24
	.EQU	DMA_PADDR4_PADDR23,		23
	.EQU	DMA_PADDR4_PADDR22,		22
	.EQU	DMA_PADDR4_PADDR21,		21
	.EQU	DMA_PADDR4_PADDR20,		20
	.EQU	DMA_PADDR4_PADDR19,		19
	.EQU	DMA_PADDR4_PADDR18,		18
	.EQU	DMA_PADDR4_PADDR17,		17
	.EQU	DMA_PADDR4_PADDR16,		16
	.EQU	DMA_PADDR4_PADDR15,		15
	.EQU	DMA_PADDR4_PADDR14,		14
	.EQU	DMA_PADDR4_PADDR13,		13
	.EQU	DMA_PADDR4_PADDR12,		12
	.EQU	DMA_PADDR4_PADDR11,		11
	.EQU	DMA_PADDR4_PADDR10,		10
	.EQU	DMA_PADDR4_PADDR9,		9
	.EQU	DMA_PADDR4_PADDR8,		8
	.EQU	DMA_PADDR4_PADDR7,		7
	.EQU	DMA_PADDR4_PADDR6,		6
	.EQU	DMA_PADDR4_PADDR5,		5
	.EQU	DMA_PADDR4_PADDR4,		4
	.EQU	DMA_PADDR4_PADDR3,		3
	.EQU	DMA_PADDR4_PADDR2,		2
	.EQU	DMA_PADDR4_PADDR1,		1
	.EQU	DMA_PADDR4_PADDR0,		0
//  register-------------------------------------
	.EQU	DMA_PADDR5,	0x40001130
//  0x4000 1130  DMA_PADDR5   Bits-------------------------------------
	.EQU	DMA_PADDR5_PADDR31,		31
	.EQU	DMA_PADDR5_PADDR30,		30
	.EQU	DMA_PADDR5_PADDR29,		29
	.EQU	DMA_PADDR5_PADDR28,		28
	.EQU	DMA_PADDR5_PADDR27,		27
	.EQU	DMA_PADDR5_PADDR26,		26
	.EQU	DMA_PADDR5_PADDR25,		25
	.EQU	DMA_PADDR5_PADDR24,		24
	.EQU	DMA_PADDR5_PADDR23,		23
	.EQU	DMA_PADDR5_PADDR22,		22
	.EQU	DMA_PADDR5_PADDR21,		21
	.EQU	DMA_PADDR5_PADDR20,		20
	.EQU	DMA_PADDR5_PADDR19,		19
	.EQU	DMA_PADDR5_PADDR18,		18
	.EQU	DMA_PADDR5_PADDR17,		17
	.EQU	DMA_PADDR5_PADDR16,		16
	.EQU	DMA_PADDR5_PADDR15,		15
	.EQU	DMA_PADDR5_PADDR14,		14
	.EQU	DMA_PADDR5_PADDR13,		13
	.EQU	DMA_PADDR5_PADDR12,		12
	.EQU	DMA_PADDR5_PADDR11,		11
	.EQU	DMA_PADDR5_PADDR10,		10
	.EQU	DMA_PADDR5_PADDR9,		9
	.EQU	DMA_PADDR5_PADDR8,		8
	.EQU	DMA_PADDR5_PADDR7,		7
	.EQU	DMA_PADDR5_PADDR6,		6
	.EQU	DMA_PADDR5_PADDR5,		5
	.EQU	DMA_PADDR5_PADDR4,		4
	.EQU	DMA_PADDR5_PADDR3,		3
	.EQU	DMA_PADDR5_PADDR2,		2
	.EQU	DMA_PADDR5_PADDR1,		1
	.EQU	DMA_PADDR5_PADDR0,		0
//  register-------------------------------------
	.EQU	DMA_PADDR6,	0x40001134
//  0x4000 1134  DMA_PADDR6   Bits-------------------------------------
	.EQU	DMA_PADDR6_PADDR31,		31
	.EQU	DMA_PADDR6_PADDR30,		30
	.EQU	DMA_PADDR6_PADDR29,		29
	.EQU	DMA_PADDR6_PADDR28,		28
	.EQU	DMA_PADDR6_PADDR27,		27
	.EQU	DMA_PADDR6_PADDR26,		26
	.EQU	DMA_PADDR6_PADDR25,		25
	.EQU	DMA_PADDR6_PADDR24,		24
	.EQU	DMA_PADDR6_PADDR23,		23
	.EQU	DMA_PADDR6_PADDR22,		22
	.EQU	DMA_PADDR6_PADDR21,		21
	.EQU	DMA_PADDR6_PADDR20,		20
	.EQU	DMA_PADDR6_PADDR19,		19
	.EQU	DMA_PADDR6_PADDR18,		18
	.EQU	DMA_PADDR6_PADDR17,		17
	.EQU	DMA_PADDR6_PADDR16,		16
	.EQU	DMA_PADDR6_PADDR15,		15
	.EQU	DMA_PADDR6_PADDR14,		14
	.EQU	DMA_PADDR6_PADDR13,		13
	.EQU	DMA_PADDR6_PADDR12,		12
	.EQU	DMA_PADDR6_PADDR11,		11
	.EQU	DMA_PADDR6_PADDR10,		10
	.EQU	DMA_PADDR6_PADDR9,		9
	.EQU	DMA_PADDR6_PADDR8,		8
	.EQU	DMA_PADDR6_PADDR7,		7
	.EQU	DMA_PADDR6_PADDR6,		6
	.EQU	DMA_PADDR6_PADDR5,		5
	.EQU	DMA_PADDR6_PADDR4,		4
	.EQU	DMA_PADDR6_PADDR3,		3
	.EQU	DMA_PADDR6_PADDR2,		2
	.EQU	DMA_PADDR6_PADDR1,		1
	.EQU	DMA_PADDR6_PADDR0,		0
//  register-------------------------------------
	.EQU	DMA_PADDR7,	0x40001138
//  0x4000 1138  DMA_PADDR7   Bits-------------------------------------
	.EQU	DMA_PADDR7_PADDR31,		31
	.EQU	DMA_PADDR7_PADDR30,		30
	.EQU	DMA_PADDR7_PADDR29,		29
	.EQU	DMA_PADDR7_PADDR28,		28
	.EQU	DMA_PADDR7_PADDR27,		27
	.EQU	DMA_PADDR7_PADDR26,		26
	.EQU	DMA_PADDR7_PADDR25,		25
	.EQU	DMA_PADDR7_PADDR24,		24
	.EQU	DMA_PADDR7_PADDR23,		23
	.EQU	DMA_PADDR7_PADDR22,		22
	.EQU	DMA_PADDR7_PADDR21,		21
	.EQU	DMA_PADDR7_PADDR20,		20
	.EQU	DMA_PADDR7_PADDR19,		19
	.EQU	DMA_PADDR7_PADDR18,		18
	.EQU	DMA_PADDR7_PADDR17,		17
	.EQU	DMA_PADDR7_PADDR16,		16
	.EQU	DMA_PADDR7_PADDR15,		15
	.EQU	DMA_PADDR7_PADDR14,		14
	.EQU	DMA_PADDR7_PADDR13,		13
	.EQU	DMA_PADDR7_PADDR12,		12
	.EQU	DMA_PADDR7_PADDR11,		11
	.EQU	DMA_PADDR7_PADDR10,		10
	.EQU	DMA_PADDR7_PADDR9,		9
	.EQU	DMA_PADDR7_PADDR8,		8
	.EQU	DMA_PADDR7_PADDR7,		7
	.EQU	DMA_PADDR7_PADDR6,		6
	.EQU	DMA_PADDR7_PADDR5,		5
	.EQU	DMA_PADDR7_PADDR4,		4
	.EQU	DMA_PADDR7_PADDR3,		3
	.EQU	DMA_PADDR7_PADDR2,		2
	.EQU	DMA_PADDR7_PADDR1,		1
	.EQU	DMA_PADDR7_PADDR0,		0
//  register-------------------------------------
	.EQU	DMA_MADDR1,	0x40001140
//  0x4000 1140  DMA_MADDR1   Bits-------------------------------------
	.EQU	DMA_MADDR1_MADDR31,		31
	.EQU	DMA_MADDR1_MADDR30,		30
	.EQU	DMA_MADDR1_MADDR29,		29
	.EQU	DMA_MADDR1_MADDR28,		28
	.EQU	DMA_MADDR1_MADDR27,		27
	.EQU	DMA_MADDR1_MADDR26,		26
	.EQU	DMA_MADDR1_MADDR25,		25
	.EQU	DMA_MADDR1_MADDR24,		24
	.EQU	DMA_MADDR1_MADDR23,		23
	.EQU	DMA_MADDR1_MADDR22,		22
	.EQU	DMA_MADDR1_MADDR21,		21
	.EQU	DMA_MADDR1_MADDR20,		20
	.EQU	DMA_MADDR1_MADDR19,		19
	.EQU	DMA_MADDR1_MADDR18,		18
	.EQU	DMA_MADDR1_MADDR17,		17
	.EQU	DMA_MADDR1_MADDR16,		16
	.EQU	DMA_MADDR1_MADDR15,		15
	.EQU	DMA_MADDR1_MADDR14,		14
	.EQU	DMA_MADDR1_MADDR13,		13
	.EQU	DMA_MADDR1_MADDR12,		12
	.EQU	DMA_MADDR1_MADDR11,		11
	.EQU	DMA_MADDR1_MADDR10,		10
	.EQU	DMA_MADDR1_MADDR9,		9
	.EQU	DMA_MADDR1_MADDR8,		8
	.EQU	DMA_MADDR1_MADDR7,		7
	.EQU	DMA_MADDR1_MADDR6,		6
	.EQU	DMA_MADDR1_MADDR5,		5
	.EQU	DMA_MADDR1_MADDR4,		4
	.EQU	DMA_MADDR1_MADDR3,		3
	.EQU	DMA_MADDR1_MADDR2,		2
	.EQU	DMA_MADDR1_MADDR1,		1
	.EQU	DMA_MADDR1_MADDR0,		0
//  register-------------------------------------
	.EQU	DMA_MADDR2,	0x40001144
//  0x4000 1144  DMA_MADDR2   Bits-------------------------------------
	.EQU	DMA_MADDR2_MADDR31,		31
	.EQU	DMA_MADDR2_MADDR30,		30
	.EQU	DMA_MADDR2_MADDR29,		29
	.EQU	DMA_MADDR2_MADDR28,		28
	.EQU	DMA_MADDR2_MADDR27,		27
	.EQU	DMA_MADDR2_MADDR26,		26
	.EQU	DMA_MADDR2_MADDR25,		25
	.EQU	DMA_MADDR2_MADDR24,		24
	.EQU	DMA_MADDR2_MADDR23,		23
	.EQU	DMA_MADDR2_MADDR22,		22
	.EQU	DMA_MADDR2_MADDR21,		21
	.EQU	DMA_MADDR2_MADDR20,		20
	.EQU	DMA_MADDR2_MADDR19,		19
	.EQU	DMA_MADDR2_MADDR18,		18
	.EQU	DMA_MADDR2_MADDR17,		17
	.EQU	DMA_MADDR2_MADDR16,		16
	.EQU	DMA_MADDR2_MADDR15,		15
	.EQU	DMA_MADDR2_MADDR14,		14
	.EQU	DMA_MADDR2_MADDR13,		13
	.EQU	DMA_MADDR2_MADDR12,		12
	.EQU	DMA_MADDR2_MADDR11,		11
	.EQU	DMA_MADDR2_MADDR10,		10
	.EQU	DMA_MADDR2_MADDR9,		9
	.EQU	DMA_MADDR2_MADDR8,		8
	.EQU	DMA_MADDR2_MADDR7,		7
	.EQU	DMA_MADDR2_MADDR6,		6
	.EQU	DMA_MADDR2_MADDR5,		5
	.EQU	DMA_MADDR2_MADDR4,		4
	.EQU	DMA_MADDR2_MADDR3,		3
	.EQU	DMA_MADDR2_MADDR2,		2
	.EQU	DMA_MADDR2_MADDR1,		1
	.EQU	DMA_MADDR2_MADDR0,		0
//  register-------------------------------------
	.EQU	DMA_MADDR3,	0x40001148
//  0x4000 1148  DMA_MADDR3   Bits-------------------------------------
	.EQU	DMA_MADDR3_MADDR31,		31
	.EQU	DMA_MADDR3_MADDR30,		30
	.EQU	DMA_MADDR3_MADDR29,		29
	.EQU	DMA_MADDR3_MADDR28,		28
	.EQU	DMA_MADDR3_MADDR27,		27
	.EQU	DMA_MADDR3_MADDR26,		26
	.EQU	DMA_MADDR3_MADDR25,		25
	.EQU	DMA_MADDR3_MADDR24,		24
	.EQU	DMA_MADDR3_MADDR23,		23
	.EQU	DMA_MADDR3_MADDR22,		22
	.EQU	DMA_MADDR3_MADDR21,		21
	.EQU	DMA_MADDR3_MADDR20,		20
	.EQU	DMA_MADDR3_MADDR19,		19
	.EQU	DMA_MADDR3_MADDR18,		18
	.EQU	DMA_MADDR3_MADDR17,		17
	.EQU	DMA_MADDR3_MADDR16,		16
	.EQU	DMA_MADDR3_MADDR15,		15
	.EQU	DMA_MADDR3_MADDR14,		14
	.EQU	DMA_MADDR3_MADDR13,		13
	.EQU	DMA_MADDR3_MADDR12,		12
	.EQU	DMA_MADDR3_MADDR11,		11
	.EQU	DMA_MADDR3_MADDR10,		10
	.EQU	DMA_MADDR3_MADDR9,		9
	.EQU	DMA_MADDR3_MADDR8,		8
	.EQU	DMA_MADDR3_MADDR7,		7
	.EQU	DMA_MADDR3_MADDR6,		6
	.EQU	DMA_MADDR3_MADDR5,		5
	.EQU	DMA_MADDR3_MADDR4,		4
	.EQU	DMA_MADDR3_MADDR3,		3
	.EQU	DMA_MADDR3_MADDR2,		2
	.EQU	DMA_MADDR3_MADDR1,		1
	.EQU	DMA_MADDR3_MADDR0,		0
//  register-------------------------------------
	.EQU	DMA_MADDR4,	0x4000114C
//  0x4000 114C  DMA_MADDR4   Bits-------------------------------------
	.EQU	DMA_MADDR4_MADDR31,		31
	.EQU	DMA_MADDR4_MADDR30,		30
	.EQU	DMA_MADDR4_MADDR29,		29
	.EQU	DMA_MADDR4_MADDR28,		28
	.EQU	DMA_MADDR4_MADDR27,		27
	.EQU	DMA_MADDR4_MADDR26,		26
	.EQU	DMA_MADDR4_MADDR25,		25
	.EQU	DMA_MADDR4_MADDR24,		24
	.EQU	DMA_MADDR4_MADDR23,		23
	.EQU	DMA_MADDR4_MADDR22,		22
	.EQU	DMA_MADDR4_MADDR21,		21
	.EQU	DMA_MADDR4_MADDR20,		20
	.EQU	DMA_MADDR4_MADDR19,		19
	.EQU	DMA_MADDR4_MADDR18,		18
	.EQU	DMA_MADDR4_MADDR17,		17
	.EQU	DMA_MADDR4_MADDR16,		16
	.EQU	DMA_MADDR4_MADDR15,		15
	.EQU	DMA_MADDR4_MADDR14,		14
	.EQU	DMA_MADDR4_MADDR13,		13
	.EQU	DMA_MADDR4_MADDR12,		12
	.EQU	DMA_MADDR4_MADDR11,		11
	.EQU	DMA_MADDR4_MADDR10,		10
	.EQU	DMA_MADDR4_MADDR9,		9
	.EQU	DMA_MADDR4_MADDR8,		8
	.EQU	DMA_MADDR4_MADDR7,		7
	.EQU	DMA_MADDR4_MADDR6,		6
	.EQU	DMA_MADDR4_MADDR5,		5
	.EQU	DMA_MADDR4_MADDR4,		4
	.EQU	DMA_MADDR4_MADDR3,		3
	.EQU	DMA_MADDR4_MADDR2,		2
	.EQU	DMA_MADDR4_MADDR1,		1
	.EQU	DMA_MADDR4_MADDR0,		0
//  register-------------------------------------
	.EQU	DMA_MADDR5,	0x40001150
//  0x4000 1150  DMA_MADDR5   Bits-------------------------------------
	.EQU	DMA_MADDR5_MADDR31,		31
	.EQU	DMA_MADDR5_MADDR30,		30
	.EQU	DMA_MADDR5_MADDR29,		29
	.EQU	DMA_MADDR5_MADDR28,		28
	.EQU	DMA_MADDR5_MADDR27,		27
	.EQU	DMA_MADDR5_MADDR26,		26
	.EQU	DMA_MADDR5_MADDR25,		25
	.EQU	DMA_MADDR5_MADDR24,		24
	.EQU	DMA_MADDR5_MADDR23,		23
	.EQU	DMA_MADDR5_MADDR22,		22
	.EQU	DMA_MADDR5_MADDR21,		21
	.EQU	DMA_MADDR5_MADDR20,		20
	.EQU	DMA_MADDR5_MADDR19,		19
	.EQU	DMA_MADDR5_MADDR18,		18
	.EQU	DMA_MADDR5_MADDR17,		17
	.EQU	DMA_MADDR5_MADDR16,		16
	.EQU	DMA_MADDR5_MADDR15,		15
	.EQU	DMA_MADDR5_MADDR14,		14
	.EQU	DMA_MADDR5_MADDR13,		13
	.EQU	DMA_MADDR5_MADDR12,		12
	.EQU	DMA_MADDR5_MADDR11,		11
	.EQU	DMA_MADDR5_MADDR10,		10
	.EQU	DMA_MADDR5_MADDR9,		9
	.EQU	DMA_MADDR5_MADDR8,		8
	.EQU	DMA_MADDR5_MADDR7,		7
	.EQU	DMA_MADDR5_MADDR6,		6
	.EQU	DMA_MADDR5_MADDR5,		5
	.EQU	DMA_MADDR5_MADDR4,		4
	.EQU	DMA_MADDR5_MADDR3,		3
	.EQU	DMA_MADDR5_MADDR2,		2
	.EQU	DMA_MADDR5_MADDR1,		1
	.EQU	DMA_MADDR5_MADDR0,		0
//  register-------------------------------------
	.EQU	DMA_MADDR6,	0x40001154
//  0x4000 1154  DMA_MADDR6   Bits-------------------------------------
	.EQU	DMA_MADDR6_MADDR31,		31
	.EQU	DMA_MADDR6_MADDR30,		30
	.EQU	DMA_MADDR6_MADDR29,		29
	.EQU	DMA_MADDR6_MADDR28,		28
	.EQU	DMA_MADDR6_MADDR27,		27
	.EQU	DMA_MADDR6_MADDR26,		26
	.EQU	DMA_MADDR6_MADDR25,		25
	.EQU	DMA_MADDR6_MADDR24,		24
	.EQU	DMA_MADDR6_MADDR23,		23
	.EQU	DMA_MADDR6_MADDR22,		22
	.EQU	DMA_MADDR6_MADDR21,		21
	.EQU	DMA_MADDR6_MADDR20,		20
	.EQU	DMA_MADDR6_MADDR19,		19
	.EQU	DMA_MADDR6_MADDR18,		18
	.EQU	DMA_MADDR6_MADDR17,		17
	.EQU	DMA_MADDR6_MADDR16,		16
	.EQU	DMA_MADDR6_MADDR15,		15
	.EQU	DMA_MADDR6_MADDR14,		14
	.EQU	DMA_MADDR6_MADDR13,		13
	.EQU	DMA_MADDR6_MADDR12,		12
	.EQU	DMA_MADDR6_MADDR11,		11
	.EQU	DMA_MADDR6_MADDR10,		10
	.EQU	DMA_MADDR6_MADDR9,		9
	.EQU	DMA_MADDR6_MADDR8,		8
	.EQU	DMA_MADDR6_MADDR7,		7
	.EQU	DMA_MADDR6_MADDR6,		6
	.EQU	DMA_MADDR6_MADDR5,		5
	.EQU	DMA_MADDR6_MADDR4,		4
	.EQU	DMA_MADDR6_MADDR3,		3
	.EQU	DMA_MADDR6_MADDR2,		2
	.EQU	DMA_MADDR6_MADDR1,		1
	.EQU	DMA_MADDR6_MADDR0,		0
//  register-------------------------------------
	.EQU	DMA_MADDR7,	0x40001158
//  0x4000 1158  DMA_MADDR7   Bits-------------------------------------
	.EQU	DMA_MADDR7_MADDR31,		31
	.EQU	DMA_MADDR7_MADDR30,		30
	.EQU	DMA_MADDR7_MADDR29,		29
	.EQU	DMA_MADDR7_MADDR28,		28
	.EQU	DMA_MADDR7_MADDR27,		27
	.EQU	DMA_MADDR7_MADDR26,		26
	.EQU	DMA_MADDR7_MADDR25,		25
	.EQU	DMA_MADDR7_MADDR24,		24
	.EQU	DMA_MADDR7_MADDR23,		23
	.EQU	DMA_MADDR7_MADDR22,		22
	.EQU	DMA_MADDR7_MADDR21,		21
	.EQU	DMA_MADDR7_MADDR20,		20
	.EQU	DMA_MADDR7_MADDR19,		19
	.EQU	DMA_MADDR7_MADDR18,		18
	.EQU	DMA_MADDR7_MADDR17,		17
	.EQU	DMA_MADDR7_MADDR16,		16
	.EQU	DMA_MADDR7_MADDR15,		15
	.EQU	DMA_MADDR7_MADDR14,		14
	.EQU	DMA_MADDR7_MADDR13,		13
	.EQU	DMA_MADDR7_MADDR12,		12
	.EQU	DMA_MADDR7_MADDR11,		11
	.EQU	DMA_MADDR7_MADDR10,		10
	.EQU	DMA_MADDR7_MADDR9,		9
	.EQU	DMA_MADDR7_MADDR8,		8
	.EQU	DMA_MADDR7_MADDR7,		7
	.EQU	DMA_MADDR7_MADDR6,		6
	.EQU	DMA_MADDR7_MADDR5,		5
	.EQU	DMA_MADDR7_MADDR4,		4
	.EQU	DMA_MADDR7_MADDR3,		3
	.EQU	DMA_MADDR7_MADDR2,		2
	.EQU	DMA_MADDR7_MADDR1,		1
	.EQU	DMA_MADDR7_MADDR0,		0
//  register-------------------------------------
	.EQU	DMA_CPAR1,		0x40001160
//  0x4000 1160  DMA_CPAR1   Bits-------------------------------------
	.EQU	DMA_CPAR1_CPAR31,		31
	.EQU	DMA_CPAR1_CPAR30,		30
	.EQU	DMA_CPAR1_CPAR29,		29
	.EQU	DMA_CPAR1_CPAR28,		28
	.EQU	DMA_CPAR1_CPAR27,		27
	.EQU	DMA_CPAR1_CPAR26,		26
	.EQU	DMA_CPAR1_CPAR25,		25
	.EQU	DMA_CPAR1_CPAR24,		24
	.EQU	DMA_CPAR1_CPAR23,		23
	.EQU	DMA_CPAR1_CPAR22,		22
	.EQU	DMA_CPAR1_CPAR21,		21
	.EQU	DMA_CPAR1_CPAR20,		20
	.EQU	DMA_CPAR1_CPAR19,		19
	.EQU	DMA_CPAR1_CPAR18,		18
	.EQU	DMA_CPAR1_CPAR17,		17
	.EQU	DMA_CPAR1_CPAR16,		16
	.EQU	DMA_CPAR1_CPAR15,		15
	.EQU	DMA_CPAR1_CPAR14,		14
	.EQU	DMA_CPAR1_CPAR13,		13
	.EQU	DMA_CPAR1_CPAR12,		12
	.EQU	DMA_CPAR1_CPAR11,		11
	.EQU	DMA_CPAR1_CPAR10,		10
	.EQU	DMA_CPAR1_CPAR9,		9
	.EQU	DMA_CPAR1_CPAR8,		8
	.EQU	DMA_CPAR1_CPAR7,		7
	.EQU	DMA_CPAR1_CPAR6,		6
	.EQU	DMA_CPAR1_CPAR5,		5
	.EQU	DMA_CPAR1_CPAR4,		4
	.EQU	DMA_CPAR1_CPAR3,		3
	.EQU	DMA_CPAR1_CPAR2,		2
	.EQU	DMA_CPAR1_CPAR1,		1
	.EQU	DMA_CPAR1_CPAR0,		0
//  register-------------------------------------
	.EQU	DMA_CPAR2,		0x40001164
//  0x4000 1164  DMA_CPAR2   Bits-------------------------------------
	.EQU	DMA_CPAR2_CPAR31,		31
	.EQU	DMA_CPAR2_CPAR30,		30
	.EQU	DMA_CPAR2_CPAR29,		29
	.EQU	DMA_CPAR2_CPAR28,		28
	.EQU	DMA_CPAR2_CPAR27,		27
	.EQU	DMA_CPAR2_CPAR26,		26
	.EQU	DMA_CPAR2_CPAR25,		25
	.EQU	DMA_CPAR2_CPAR24,		24
	.EQU	DMA_CPAR2_CPAR23,		23
	.EQU	DMA_CPAR2_CPAR22,		22
	.EQU	DMA_CPAR2_CPAR21,		21
	.EQU	DMA_CPAR2_CPAR20,		20
	.EQU	DMA_CPAR2_CPAR19,		19
	.EQU	DMA_CPAR2_CPAR18,		18
	.EQU	DMA_CPAR2_CPAR17,		17
	.EQU	DMA_CPAR2_CPAR16,		16
	.EQU	DMA_CPAR2_CPAR15,		15
	.EQU	DMA_CPAR2_CPAR14,		14
	.EQU	DMA_CPAR2_CPAR13,		13
	.EQU	DMA_CPAR2_CPAR12,		12
	.EQU	DMA_CPAR2_CPAR11,		11
	.EQU	DMA_CPAR2_CPAR10,		10
	.EQU	DMA_CPAR2_CPAR9,		9
	.EQU	DMA_CPAR2_CPAR8,		8
	.EQU	DMA_CPAR2_CPAR7,		7
	.EQU	DMA_CPAR2_CPAR6,		6
	.EQU	DMA_CPAR2_CPAR5,		5
	.EQU	DMA_CPAR2_CPAR4,		4
	.EQU	DMA_CPAR2_CPAR3,		3
	.EQU	DMA_CPAR2_CPAR2,		2
	.EQU	DMA_CPAR2_CPAR1,		1
	.EQU	DMA_CPAR2_CPAR0,		0
//  register-------------------------------------
	.EQU	DMA_CPAR3,		0x40001168
//  0x4000 1168  DMA_CPAR3   Bits-------------------------------------
	.EQU	DMA_CPAR3_CPAR31,		31
	.EQU	DMA_CPAR3_CPAR30,		30
	.EQU	DMA_CPAR3_CPAR29,		29
	.EQU	DMA_CPAR3_CPAR28,		28
	.EQU	DMA_CPAR3_CPAR27,		27
	.EQU	DMA_CPAR3_CPAR26,		26
	.EQU	DMA_CPAR3_CPAR25,		25
	.EQU	DMA_CPAR3_CPAR24,		24
	.EQU	DMA_CPAR3_CPAR23,		23
	.EQU	DMA_CPAR3_CPAR22,		22
	.EQU	DMA_CPAR3_CPAR21,		21
	.EQU	DMA_CPAR3_CPAR20,		20
	.EQU	DMA_CPAR3_CPAR19,		19
	.EQU	DMA_CPAR3_CPAR18,		18
	.EQU	DMA_CPAR3_CPAR17,		17
	.EQU	DMA_CPAR3_CPAR16,		16
	.EQU	DMA_CPAR3_CPAR15,		15
	.EQU	DMA_CPAR3_CPAR14,		14
	.EQU	DMA_CPAR3_CPAR13,		13
	.EQU	DMA_CPAR3_CPAR12,		12
	.EQU	DMA_CPAR3_CPAR11,		11
	.EQU	DMA_CPAR3_CPAR10,		10
	.EQU	DMA_CPAR3_CPAR9,		9
	.EQU	DMA_CPAR3_CPAR8,		8
	.EQU	DMA_CPAR3_CPAR7,		7
	.EQU	DMA_CPAR3_CPAR6,		6
	.EQU	DMA_CPAR3_CPAR5,		5
	.EQU	DMA_CPAR3_CPAR4,		4
	.EQU	DMA_CPAR3_CPAR3,		3
	.EQU	DMA_CPAR3_CPAR2,		2
	.EQU	DMA_CPAR3_CPAR1,		1
	.EQU	DMA_CPAR3_CPAR0,		0
//  register-------------------------------------
	.EQU	DMA_CPAR4,		0x4000116C
//  0x4000 116C  DMA_CPAR4   Bits-------------------------------------
	.EQU	DMA_CPAR4_CPAR31,		31
	.EQU	DMA_CPAR4_CPAR30,		30
	.EQU	DMA_CPAR4_CPAR29,		29
	.EQU	DMA_CPAR4_CPAR28,		28
	.EQU	DMA_CPAR4_CPAR27,		27
	.EQU	DMA_CPAR4_CPAR26,		26
	.EQU	DMA_CPAR4_CPAR25,		25
	.EQU	DMA_CPAR4_CPAR24,		24
	.EQU	DMA_CPAR4_CPAR23,		23
	.EQU	DMA_CPAR4_CPAR22,		22
	.EQU	DMA_CPAR4_CPAR21,		21
	.EQU	DMA_CPAR4_CPAR20,		20
	.EQU	DMA_CPAR4_CPAR19,		19
	.EQU	DMA_CPAR4_CPAR18,		18
	.EQU	DMA_CPAR4_CPAR17,		17
	.EQU	DMA_CPAR4_CPAR16,		16
	.EQU	DMA_CPAR4_CPAR15,		15
	.EQU	DMA_CPAR4_CPAR14,		14
	.EQU	DMA_CPAR4_CPAR13,		13
	.EQU	DMA_CPAR4_CPAR12,		12
	.EQU	DMA_CPAR4_CPAR11,		11
	.EQU	DMA_CPAR4_CPAR10,		10
	.EQU	DMA_CPAR4_CPAR9,		9
	.EQU	DMA_CPAR4_CPAR8,		8
	.EQU	DMA_CPAR4_CPAR7,		7
	.EQU	DMA_CPAR4_CPAR6,		6
	.EQU	DMA_CPAR4_CPAR5,		5
	.EQU	DMA_CPAR4_CPAR4,		4
	.EQU	DMA_CPAR4_CPAR3,		3
	.EQU	DMA_CPAR4_CPAR2,		2
	.EQU	DMA_CPAR4_CPAR1,		1
	.EQU	DMA_CPAR4_CPAR0,		0
//  register-------------------------------------
	.EQU	DMA_CPAR5,		0x40001170
//  0x4000 1170  DMA_CPAR5   Bits-------------------------------------
	.EQU	DMA_CPAR5_CPAR31,		31
	.EQU	DMA_CPAR5_CPAR30,		30
	.EQU	DMA_CPAR5_CPAR29,		29
	.EQU	DMA_CPAR5_CPAR28,		28
	.EQU	DMA_CPAR5_CPAR27,		27
	.EQU	DMA_CPAR5_CPAR26,		26
	.EQU	DMA_CPAR5_CPAR25,		25
	.EQU	DMA_CPAR5_CPAR24,		24
	.EQU	DMA_CPAR5_CPAR23,		23
	.EQU	DMA_CPAR5_CPAR22,		22
	.EQU	DMA_CPAR5_CPAR21,		21
	.EQU	DMA_CPAR5_CPAR20,		20
	.EQU	DMA_CPAR5_CPAR19,		19
	.EQU	DMA_CPAR5_CPAR18,		18
	.EQU	DMA_CPAR5_CPAR17,		17
	.EQU	DMA_CPAR5_CPAR16,		16
	.EQU	DMA_CPAR5_CPAR15,		15
	.EQU	DMA_CPAR5_CPAR14,		14
	.EQU	DMA_CPAR5_CPAR13,		13
	.EQU	DMA_CPAR5_CPAR12,		12
	.EQU	DMA_CPAR5_CPAR11,		11
	.EQU	DMA_CPAR5_CPAR10,		10
	.EQU	DMA_CPAR5_CPAR9,		9
	.EQU	DMA_CPAR5_CPAR8,		8
	.EQU	DMA_CPAR5_CPAR7,		7
	.EQU	DMA_CPAR5_CPAR6,		6
	.EQU	DMA_CPAR5_CPAR5,		5
	.EQU	DMA_CPAR5_CPAR4,		4
	.EQU	DMA_CPAR5_CPAR3,		3
	.EQU	DMA_CPAR5_CPAR2,		2
	.EQU	DMA_CPAR5_CPAR1,		1
	.EQU	DMA_CPAR5_CPAR0,		0
//  register-------------------------------------
	.EQU	DMA_CPAR6,		0x40001174
//  0x4000 1174  DMA_CPAR6   Bits-------------------------------------
	.EQU	DMA_CPAR6_CPAR31,		31
	.EQU	DMA_CPAR6_CPAR30,		30
	.EQU	DMA_CPAR6_CPAR29,		29
	.EQU	DMA_CPAR6_CPAR28,		28
	.EQU	DMA_CPAR6_CPAR27,		27
	.EQU	DMA_CPAR6_CPAR26,		26
	.EQU	DMA_CPAR6_CPAR25,		25
	.EQU	DMA_CPAR6_CPAR24,		24
	.EQU	DMA_CPAR6_CPAR23,		23
	.EQU	DMA_CPAR6_CPAR22,		22
	.EQU	DMA_CPAR6_CPAR21,		21
	.EQU	DMA_CPAR6_CPAR20,		20
	.EQU	DMA_CPAR6_CPAR19,		19
	.EQU	DMA_CPAR6_CPAR18,		18
	.EQU	DMA_CPAR6_CPAR17,		17
	.EQU	DMA_CPAR6_CPAR16,		16
	.EQU	DMA_CPAR6_CPAR15,		15
	.EQU	DMA_CPAR6_CPAR14,		14
	.EQU	DMA_CPAR6_CPAR13,		13
	.EQU	DMA_CPAR6_CPAR12,		12
	.EQU	DMA_CPAR6_CPAR11,		11
	.EQU	DMA_CPAR6_CPAR10,		10
	.EQU	DMA_CPAR6_CPAR9,		9
	.EQU	DMA_CPAR6_CPAR8,		8
	.EQU	DMA_CPAR6_CPAR7,		7
	.EQU	DMA_CPAR6_CPAR6,		6
	.EQU	DMA_CPAR6_CPAR5,		5
	.EQU	DMA_CPAR6_CPAR4,		4
	.EQU	DMA_CPAR6_CPAR3,		3
	.EQU	DMA_CPAR6_CPAR2,		2
	.EQU	DMA_CPAR6_CPAR1,		1
	.EQU	DMA_CPAR6_CPAR0,		0
//  register-------------------------------------
	.EQU	DMA_CPAR7,		0x40001178
//  0x4000 1178  DMA_CPAR7   Bits-------------------------------------
	.EQU	DMA_CPAR7_CPAR31,		31
	.EQU	DMA_CPAR7_CPAR30,		30
	.EQU	DMA_CPAR7_CPAR29,		29
	.EQU	DMA_CPAR7_CPAR28,		28
	.EQU	DMA_CPAR7_CPAR27,		27
	.EQU	DMA_CPAR7_CPAR26,		26
	.EQU	DMA_CPAR7_CPAR25,		25
	.EQU	DMA_CPAR7_CPAR24,		24
	.EQU	DMA_CPAR7_CPAR23,		23
	.EQU	DMA_CPAR7_CPAR22,		22
	.EQU	DMA_CPAR7_CPAR21,		21
	.EQU	DMA_CPAR7_CPAR20,		20
	.EQU	DMA_CPAR7_CPAR19,		19
	.EQU	DMA_CPAR7_CPAR18,		18
	.EQU	DMA_CPAR7_CPAR17,		17
	.EQU	DMA_CPAR7_CPAR16,		16
	.EQU	DMA_CPAR7_CPAR15,		15
	.EQU	DMA_CPAR7_CPAR14,		14
	.EQU	DMA_CPAR7_CPAR13,		13
	.EQU	DMA_CPAR7_CPAR12,		12
	.EQU	DMA_CPAR7_CPAR11,		11
	.EQU	DMA_CPAR7_CPAR10,		10
	.EQU	DMA_CPAR7_CPAR9,		9
	.EQU	DMA_CPAR7_CPAR8,		8
	.EQU	DMA_CPAR7_CPAR7,		7
	.EQU	DMA_CPAR7_CPAR6,		6
	.EQU	DMA_CPAR7_CPAR5,		5
	.EQU	DMA_CPAR7_CPAR4,		4
	.EQU	DMA_CPAR7_CPAR3,		3
	.EQU	DMA_CPAR7_CPAR2,		2
	.EQU	DMA_CPAR7_CPAR1,		1
	.EQU	DMA_CPAR7_CPAR0,		0
//  register-------------------------------------
	.EQU	DMA_CMAR1,		0x40001180
//  0x4000 1180  DMA_CMAR1   Bits-------------------------------------
	.EQU	DMA_CMAR1_CMAR31,		31
	.EQU	DMA_CMAR1_CMAR30,		30
	.EQU	DMA_CMAR1_CMAR29,		29
	.EQU	DMA_CMAR1_CMAR28,		28
	.EQU	DMA_CMAR1_CMAR27,		27
	.EQU	DMA_CMAR1_CMAR26,		26
	.EQU	DMA_CMAR1_CMAR25,		25
	.EQU	DMA_CMAR1_CMAR24,		24
	.EQU	DMA_CMAR1_CMAR23,		23
	.EQU	DMA_CMAR1_CMAR22,		22
	.EQU	DMA_CMAR1_CMAR21,		21
	.EQU	DMA_CMAR1_CMAR20,		20
	.EQU	DMA_CMAR1_CMAR19,		19
	.EQU	DMA_CMAR1_CMAR18,		18
	.EQU	DMA_CMAR1_CMAR17,		17
	.EQU	DMA_CMAR1_CMAR16,		16
	.EQU	DMA_CMAR1_CMAR15,		15
	.EQU	DMA_CMAR1_CMAR14,		14
	.EQU	DMA_CMAR1_CMAR13,		13
	.EQU	DMA_CMAR1_CMAR12,		12
	.EQU	DMA_CMAR1_CMAR11,		11
	.EQU	DMA_CMAR1_CMAR10,		10
	.EQU	DMA_CMAR1_CMAR9,		9
	.EQU	DMA_CMAR1_CMAR8,		8
	.EQU	DMA_CMAR1_CMAR7,		7
	.EQU	DMA_CMAR1_CMAR6,		6
	.EQU	DMA_CMAR1_CMAR5,		5
	.EQU	DMA_CMAR1_CMAR4,		4
	.EQU	DMA_CMAR1_CMAR3,		3
	.EQU	DMA_CMAR1_CMAR2,		2
	.EQU	DMA_CMAR1_CMAR1,		1
	.EQU	DMA_CMAR1_CMAR0,		0
//  register-------------------------------------
	.EQU	DMA_CMAR2,		0x40001184
//  0x4000 1184  DMA_CMAR2   Bits-------------------------------------
	.EQU	DMA_CMAR2_CMAR31,		31
	.EQU	DMA_CMAR2_CMAR30,		30
	.EQU	DMA_CMAR2_CMAR29,		29
	.EQU	DMA_CMAR2_CMAR28,		28
	.EQU	DMA_CMAR2_CMAR27,		27
	.EQU	DMA_CMAR2_CMAR26,		26
	.EQU	DMA_CMAR2_CMAR25,		25
	.EQU	DMA_CMAR2_CMAR24,		24
	.EQU	DMA_CMAR2_CMAR23,		23
	.EQU	DMA_CMAR2_CMAR22,		22
	.EQU	DMA_CMAR2_CMAR21,		21
	.EQU	DMA_CMAR2_CMAR20,		20
	.EQU	DMA_CMAR2_CMAR19,		19
	.EQU	DMA_CMAR2_CMAR18,		18
	.EQU	DMA_CMAR2_CMAR17,		17
	.EQU	DMA_CMAR2_CMAR16,		16
	.EQU	DMA_CMAR2_CMAR15,		15
	.EQU	DMA_CMAR2_CMAR14,		14
	.EQU	DMA_CMAR2_CMAR13,		13
	.EQU	DMA_CMAR2_CMAR12,		12
	.EQU	DMA_CMAR2_CMAR11,		11
	.EQU	DMA_CMAR2_CMAR10,		10
	.EQU	DMA_CMAR2_CMAR9,		9
	.EQU	DMA_CMAR2_CMAR8,		8
	.EQU	DMA_CMAR2_CMAR7,		7
	.EQU	DMA_CMAR2_CMAR6,		6
	.EQU	DMA_CMAR2_CMAR5,		5
	.EQU	DMA_CMAR2_CMAR4,		4
	.EQU	DMA_CMAR2_CMAR3,		3
	.EQU	DMA_CMAR2_CMAR2,		2
	.EQU	DMA_CMAR2_CMAR1,		1
	.EQU	DMA_CMAR2_CMAR0,		0
//  register-------------------------------------
	.EQU	DMA_CMAR3,		0x40001188
//  0x4000 1188  DMA_CMAR3   Bits-------------------------------------
	.EQU	DMA_CMAR3_CMAR31,		31
	.EQU	DMA_CMAR3_CMAR30,		30
	.EQU	DMA_CMAR3_CMAR29,		29
	.EQU	DMA_CMAR3_CMAR28,		28
	.EQU	DMA_CMAR3_CMAR27,		27
	.EQU	DMA_CMAR3_CMAR26,		26
	.EQU	DMA_CMAR3_CMAR25,		25
	.EQU	DMA_CMAR3_CMAR24,		24
	.EQU	DMA_CMAR3_CMAR23,		23
	.EQU	DMA_CMAR3_CMAR22,		22
	.EQU	DMA_CMAR3_CMAR21,		21
	.EQU	DMA_CMAR3_CMAR20,		20
	.EQU	DMA_CMAR3_CMAR19,		19
	.EQU	DMA_CMAR3_CMAR18,		18
	.EQU	DMA_CMAR3_CMAR17,		17
	.EQU	DMA_CMAR3_CMAR16,		16
	.EQU	DMA_CMAR3_CMAR15,		15
	.EQU	DMA_CMAR3_CMAR14,		14
	.EQU	DMA_CMAR3_CMAR13,		13
	.EQU	DMA_CMAR3_CMAR12,		12
	.EQU	DMA_CMAR3_CMAR11,		11
	.EQU	DMA_CMAR3_CMAR10,		10
	.EQU	DMA_CMAR3_CMAR9,		9
	.EQU	DMA_CMAR3_CMAR8,		8
	.EQU	DMA_CMAR3_CMAR7,		7
	.EQU	DMA_CMAR3_CMAR6,		6
	.EQU	DMA_CMAR3_CMAR5,		5
	.EQU	DMA_CMAR3_CMAR4,		4
	.EQU	DMA_CMAR3_CMAR3,		3
	.EQU	DMA_CMAR3_CMAR2,		2
	.EQU	DMA_CMAR3_CMAR1,		1
	.EQU	DMA_CMAR3_CMAR0,		0
//  register-------------------------------------
	.EQU	DMA_CMAR4,		0x4000118C
//  0x4000 118C  DMA_CMAR4   Bits-------------------------------------
	.EQU	DMA_CMAR4_CMAR31,		31
	.EQU	DMA_CMAR4_CMAR30,		30
	.EQU	DMA_CMAR4_CMAR29,		29
	.EQU	DMA_CMAR4_CMAR28,		28
	.EQU	DMA_CMAR4_CMAR27,		27
	.EQU	DMA_CMAR4_CMAR26,		26
	.EQU	DMA_CMAR4_CMAR25,		25
	.EQU	DMA_CMAR4_CMAR24,		24
	.EQU	DMA_CMAR4_CMAR23,		23
	.EQU	DMA_CMAR4_CMAR22,		22
	.EQU	DMA_CMAR4_CMAR21,		21
	.EQU	DMA_CMAR4_CMAR20,		20
	.EQU	DMA_CMAR4_CMAR19,		19
	.EQU	DMA_CMAR4_CMAR18,		18
	.EQU	DMA_CMAR4_CMAR17,		17
	.EQU	DMA_CMAR4_CMAR16,		16
	.EQU	DMA_CMAR4_CMAR15,		15
	.EQU	DMA_CMAR4_CMAR14,		14
	.EQU	DMA_CMAR4_CMAR13,		13
	.EQU	DMA_CMAR4_CMAR12,		12
	.EQU	DMA_CMAR4_CMAR11,		11
	.EQU	DMA_CMAR4_CMAR10,		10
	.EQU	DMA_CMAR4_CMAR9,		9
	.EQU	DMA_CMAR4_CMAR8,		8
	.EQU	DMA_CMAR4_CMAR7,		7
	.EQU	DMA_CMAR4_CMAR6,		6
	.EQU	DMA_CMAR4_CMAR5,		5
	.EQU	DMA_CMAR4_CMAR4,		4
	.EQU	DMA_CMAR4_CMAR3,		3
	.EQU	DMA_CMAR4_CMAR2,		2
	.EQU	DMA_CMAR4_CMAR1,		1
	.EQU	DMA_CMAR4_CMAR0,		0
//  register-------------------------------------
	.EQU	DMA_CMAR5,		0x40001190
//  0x4000 1190  DMA_CMAR5   Bits-------------------------------------
	.EQU	DMA_CMAR5_CMAR31,		31
	.EQU	DMA_CMAR5_CMAR30,		30
	.EQU	DMA_CMAR5_CMAR29,		29
	.EQU	DMA_CMAR5_CMAR28,		28
	.EQU	DMA_CMAR5_CMAR27,		27
	.EQU	DMA_CMAR5_CMAR26,		26
	.EQU	DMA_CMAR5_CMAR25,		25
	.EQU	DMA_CMAR5_CMAR24,		24
	.EQU	DMA_CMAR5_CMAR23,		23
	.EQU	DMA_CMAR5_CMAR22,		22
	.EQU	DMA_CMAR5_CMAR21,		21
	.EQU	DMA_CMAR5_CMAR20,		20
	.EQU	DMA_CMAR5_CMAR19,		19
	.EQU	DMA_CMAR5_CMAR18,		18
	.EQU	DMA_CMAR5_CMAR17,		17
	.EQU	DMA_CMAR5_CMAR16,		16
	.EQU	DMA_CMAR5_CMAR15,		15
	.EQU	DMA_CMAR5_CMAR14,		14
	.EQU	DMA_CMAR5_CMAR13,		13
	.EQU	DMA_CMAR5_CMAR12,		12
	.EQU	DMA_CMAR5_CMAR11,		11
	.EQU	DMA_CMAR5_CMAR10,		10
	.EQU	DMA_CMAR5_CMAR9,		9
	.EQU	DMA_CMAR5_CMAR8,		8
	.EQU	DMA_CMAR5_CMAR7,		7
	.EQU	DMA_CMAR5_CMAR6,		6
	.EQU	DMA_CMAR5_CMAR5,		5
	.EQU	DMA_CMAR5_CMAR4,		4
	.EQU	DMA_CMAR5_CMAR3,		3
	.EQU	DMA_CMAR5_CMAR2,		2
	.EQU	DMA_CMAR5_CMAR1,		1
	.EQU	DMA_CMAR5_CMAR0,		0
//  register-------------------------------------
	.EQU	DMA_CMAR6,		0x40001194
//  0x4000 1194  DMA_CMAR6   Bits-------------------------------------
	.EQU	DMA_CMAR6_CMAR31,		31
	.EQU	DMA_CMAR6_CMAR30,		30
	.EQU	DMA_CMAR6_CMAR29,		29
	.EQU	DMA_CMAR6_CMAR28,		28
	.EQU	DMA_CMAR6_CMAR27,		27
	.EQU	DMA_CMAR6_CMAR26,		26
	.EQU	DMA_CMAR6_CMAR25,		25
	.EQU	DMA_CMAR6_CMAR24,		24
	.EQU	DMA_CMAR6_CMAR23,		23
	.EQU	DMA_CMAR6_CMAR22,		22
	.EQU	DMA_CMAR6_CMAR21,		21
	.EQU	DMA_CMAR6_CMAR20,		20
	.EQU	DMA_CMAR6_CMAR19,		19
	.EQU	DMA_CMAR6_CMAR18,		18
	.EQU	DMA_CMAR6_CMAR17,		17
	.EQU	DMA_CMAR6_CMAR16,		16
	.EQU	DMA_CMAR6_CMAR15,		15
	.EQU	DMA_CMAR6_CMAR14,		14
	.EQU	DMA_CMAR6_CMAR13,		13
	.EQU	DMA_CMAR6_CMAR12,		12
	.EQU	DMA_CMAR6_CMAR11,		11
	.EQU	DMA_CMAR6_CMAR10,		10
	.EQU	DMA_CMAR6_CMAR9,		9
	.EQU	DMA_CMAR6_CMAR8,		8
	.EQU	DMA_CMAR6_CMAR7,		7
	.EQU	DMA_CMAR6_CMAR6,		6
	.EQU	DMA_CMAR6_CMAR5,		5
	.EQU	DMA_CMAR6_CMAR4,		4
	.EQU	DMA_CMAR6_CMAR3,		3
	.EQU	DMA_CMAR6_CMAR2,		2
	.EQU	DMA_CMAR6_CMAR1,		1
	.EQU	DMA_CMAR6_CMAR0,		0
//  register-------------------------------------
	.EQU	DMA_CMAR7,		0x40001198
//  0x4000 1198  DMA_CMAR7   Bits-------------------------------------
	.EQU	DMA_CMAR7_CMAR31,		31
	.EQU	DMA_CMAR7_CMAR30,		30
	.EQU	DMA_CMAR7_CMAR29,		29
	.EQU	DMA_CMAR7_CMAR28,		28
	.EQU	DMA_CMAR7_CMAR27,		27
	.EQU	DMA_CMAR7_CMAR26,		26
	.EQU	DMA_CMAR7_CMAR25,		25
	.EQU	DMA_CMAR7_CMAR24,		24
	.EQU	DMA_CMAR7_CMAR23,		23
	.EQU	DMA_CMAR7_CMAR22,		22
	.EQU	DMA_CMAR7_CMAR21,		21
	.EQU	DMA_CMAR7_CMAR20,		20
	.EQU	DMA_CMAR7_CMAR19,		19
	.EQU	DMA_CMAR7_CMAR18,		18
	.EQU	DMA_CMAR7_CMAR17,		17
	.EQU	DMA_CMAR7_CMAR16,		16
	.EQU	DMA_CMAR7_CMAR15,		15
	.EQU	DMA_CMAR7_CMAR14,		14
	.EQU	DMA_CMAR7_CMAR13,		13
	.EQU	DMA_CMAR7_CMAR12,		12
	.EQU	DMA_CMAR7_CMAR11,		11
	.EQU	DMA_CMAR7_CMAR10,		10
	.EQU	DMA_CMAR7_CMAR9,		9
	.EQU	DMA_CMAR7_CMAR8,		8
	.EQU	DMA_CMAR7_CMAR7,		7
	.EQU	DMA_CMAR7_CMAR6,		6
	.EQU	DMA_CMAR7_CMAR5,		5
	.EQU	DMA_CMAR7_CMAR4,		4
	.EQU	DMA_CMAR7_CMAR3,		3
	.EQU	DMA_CMAR7_CMAR2,		2
	.EQU	DMA_CMAR7_CMAR1,		1
	.EQU	DMA_CMAR7_CMAR0,		0
//  register-------------------------------------
	.EQU	DMA_NCT1,		0x400011A0
//  0x4000 11A0  DMA_NCT1   Bits-------------------------------------
	.EQU	DMA_NCT1_NCT31,		31
	.EQU	DMA_NCT1_NCT30,		30
	.EQU	DMA_NCT1_NCT29,		29
	.EQU	DMA_NCT1_NCT28,		28
	.EQU	DMA_NCT1_NCT27,		27
	.EQU	DMA_NCT1_NCT26,		26
	.EQU	DMA_NCT1_NCT25,		25
	.EQU	DMA_NCT1_NCT24,		24
	.EQU	DMA_NCT1_NCT23,		23
	.EQU	DMA_NCT1_NCT22,		22
	.EQU	DMA_NCT1_NCT21,		21
	.EQU	DMA_NCT1_NCT20,		20
	.EQU	DMA_NCT1_NCT19,		19
	.EQU	DMA_NCT1_NCT18,		18
	.EQU	DMA_NCT1_NCT17,		17
	.EQU	DMA_NCT1_NCT16,		16
//  register-------------------------------------
	.EQU	DMA_NCT2,		0x400011A4
//  0x4000 11A4  DMA_NCT2   Bits-------------------------------------
	.EQU	DMA_NCT2_NCT31,		31
	.EQU	DMA_NCT2_NCT30,		30
	.EQU	DMA_NCT2_NCT29,		29
	.EQU	DMA_NCT2_NCT28,		28
	.EQU	DMA_NCT2_NCT27,		27
	.EQU	DMA_NCT2_NCT26,		26
	.EQU	DMA_NCT2_NCT25,		25
	.EQU	DMA_NCT2_NCT24,		24
	.EQU	DMA_NCT2_NCT23,		23
	.EQU	DMA_NCT2_NCT22,		22
	.EQU	DMA_NCT2_NCT21,		21
	.EQU	DMA_NCT2_NCT20,		20
	.EQU	DMA_NCT2_NCT19,		19
	.EQU	DMA_NCT2_NCT18,		18
	.EQU	DMA_NCT2_NCT17,		17
	.EQU	DMA_NCT2_NCT16,		16
//  register-------------------------------------
	.EQU	DMA_NCT3,		0x400011A8
//  0x4000 11A8  DMA_NCT3   Bits-------------------------------------
	.EQU	DMA_NCT3_NCT31,		31
	.EQU	DMA_NCT3_NCT30,		30
	.EQU	DMA_NCT3_NCT29,		29
	.EQU	DMA_NCT3_NCT28,		28
	.EQU	DMA_NCT3_NCT27,		27
	.EQU	DMA_NCT3_NCT26,		26
	.EQU	DMA_NCT3_NCT25,		25
	.EQU	DMA_NCT3_NCT24,		24
	.EQU	DMA_NCT3_NCT23,		23
	.EQU	DMA_NCT3_NCT22,		22
	.EQU	DMA_NCT3_NCT21,		21
	.EQU	DMA_NCT3_NCT20,		20
	.EQU	DMA_NCT3_NCT19,		19
	.EQU	DMA_NCT3_NCT18,		18
	.EQU	DMA_NCT3_NCT17,		17
	.EQU	DMA_NCT3_NCT16,		16
//  register-------------------------------------
	.EQU	DMA_NCT4,		0x400011AC
//  0x4000 11AC  DMA_NCT4   Bits-------------------------------------
	.EQU	DMA_NCT4_NCT31,		31
	.EQU	DMA_NCT4_NCT30,		30
	.EQU	DMA_NCT4_NCT29,		29
	.EQU	DMA_NCT4_NCT28,		28
	.EQU	DMA_NCT4_NCT27,		27
	.EQU	DMA_NCT4_NCT26,		26
	.EQU	DMA_NCT4_NCT25,		25
	.EQU	DMA_NCT4_NCT24,		24
	.EQU	DMA_NCT4_NCT23,		23
	.EQU	DMA_NCT4_NCT22,		22
	.EQU	DMA_NCT4_NCT21,		21
	.EQU	DMA_NCT4_NCT20,		20
	.EQU	DMA_NCT4_NCT19,		19
	.EQU	DMA_NCT4_NCT18,		18
	.EQU	DMA_NCT4_NCT17,		17
	.EQU	DMA_NCT4_NCT16,		16
//  register-------------------------------------
	.EQU	DMA_NCT5,		0x400011B0
//  0x4000 11B0  DMA_NCT5   Bits-------------------------------------
	.EQU	DMA_NCT5_NCT31,		31
	.EQU	DMA_NCT5_NCT30,		30
	.EQU	DMA_NCT5_NCT29,		29
	.EQU	DMA_NCT5_NCT28,		28
	.EQU	DMA_NCT5_NCT27,		27
	.EQU	DMA_NCT5_NCT26,		26
	.EQU	DMA_NCT5_NCT25,		25
	.EQU	DMA_NCT5_NCT24,		24
	.EQU	DMA_NCT5_NCT23,		23
	.EQU	DMA_NCT5_NCT22,		22
	.EQU	DMA_NCT5_NCT21,		21
	.EQU	DMA_NCT5_NCT20,		20
	.EQU	DMA_NCT5_NCT19,		19
	.EQU	DMA_NCT5_NCT18,		18
	.EQU	DMA_NCT5_NCT17,		17
	.EQU	DMA_NCT5_NCT16,		16
//  register-------------------------------------
	.EQU	DMA_NCT6,		0x400011B4
//  0x4000 11B4  DMA_NCT6   Bits-------------------------------------
	.EQU	DMA_NCT6_NCT31,		31
	.EQU	DMA_NCT6_NCT30,		30
	.EQU	DMA_NCT6_NCT29,		29
	.EQU	DMA_NCT6_NCT28,		28
	.EQU	DMA_NCT6_NCT27,		27
	.EQU	DMA_NCT6_NCT26,		26
	.EQU	DMA_NCT6_NCT25,		25
	.EQU	DMA_NCT6_NCT24,		24
	.EQU	DMA_NCT6_NCT23,		23
	.EQU	DMA_NCT6_NCT22,		22
	.EQU	DMA_NCT6_NCT21,		21
	.EQU	DMA_NCT6_NCT20,		20
	.EQU	DMA_NCT6_NCT19,		19
	.EQU	DMA_NCT6_NCT18,		18
	.EQU	DMA_NCT6_NCT17,		17
	.EQU	DMA_NCT6_NCT16,		16
//  register-------------------------------------
	.EQU	DMA_NCT7,		0x400011B8
//  0x4000 11B8  DMA_NCT7   Bits-------------------------------------
	.EQU	DMA_NCT7_NCT31,		31
	.EQU	DMA_NCT7_NCT30,		30
	.EQU	DMA_NCT7_NCT29,		29
	.EQU	DMA_NCT7_NCT28,		28
	.EQU	DMA_NCT7_NCT27,		27
	.EQU	DMA_NCT7_NCT26,		26
	.EQU	DMA_NCT7_NCT25,		25
	.EQU	DMA_NCT7_NCT24,		24
	.EQU	DMA_NCT7_NCT23,		23
	.EQU	DMA_NCT7_NCT22,		22
	.EQU	DMA_NCT7_NCT21,		21
	.EQU	DMA_NCT7_NCT20,		20
	.EQU	DMA_NCT7_NCT19,		19
	.EQU	DMA_NCT7_NCT18,		18
	.EQU	DMA_NCT7_NCT17,		17
	.EQU	DMA_NCT7_NCT16,		16
//  register-------------------------------------
	.EQU	DMA_LIFR,		0x400011C0
//  0x4000 11C0  DMA_LIFR   Bits-------------------------------------
	.EQU	DMA_LIFR_ETIF7,		20
	.EQU	DMA_LIFR_HTIF7,		19
	.EQU	DMA_LIFR_FTIF7,		18
	.EQU	DMA_LIFR_ETIF6,		17
	.EQU	DMA_LIFR_HTIF6,		16
	.EQU	DMA_LIFR_FTIF6,		15
	.EQU	DMA_LIFR_ETIF5,		14
	.EQU	DMA_LIFR_HTIF5,		13
	.EQU	DMA_LIFR_FTIF5,		12
	.EQU	DMA_LIFR_ETIF4,		11
	.EQU	DMA_LIFR_HTIF4,		10
	.EQU	DMA_LIFR_FTIF4,		9
	.EQU	DMA_LIFR_ETIF3,		8
	.EQU	DMA_LIFR_HTIF3,		7
	.EQU	DMA_LIFR_FTIF3,		6
	.EQU	DMA_LIFR_ETIF2,		5
	.EQU	DMA_LIFR_HTIF2,		4
	.EQU	DMA_LIFR_FTIF2,		3
	.EQU	DMA_LIFR_ETIF1,		2
	.EQU	DMA_LIFR_HTIF1,		1
	.EQU	DMA_LIFR_FTIF1,		0
//  register-------------------------------------
	.EQU	DMA_LIER,		0x400011C4
//  0x4000 11C4  DMA_LIER   Bits-------------------------------------
	.EQU	DMA_LIER_ETIE7,		20
	.EQU	DMA_LIER_HTIE7,		19
	.EQU	DMA_LIER_FTIE7,		18
	.EQU	DMA_LIER_ETIE6,		17
	.EQU	DMA_LIER_HTIE6,		16
	.EQU	DMA_LIER_FTIE6,		15
	.EQU	DMA_LIER_ETIE5,		14
	.EQU	DMA_LIER_HTIE5,		13
	.EQU	DMA_LIER_FTIE5,		12
	.EQU	DMA_LIER_ETIE4,		11
	.EQU	DMA_LIER_HTIE4,		10
	.EQU	DMA_LIER_FTIE4,		9
	.EQU	DMA_LIER_ETIE3,		8
	.EQU	DMA_LIER_HTIE3,		7
	.EQU	DMA_LIER_FTIE3,		6
	.EQU	DMA_LIER_ETIE2,		5
	.EQU	DMA_LIER_HTIE2,		4
	.EQU	DMA_LIER_FTIE2,		3
	.EQU	DMA_LIER_ETIE1,		2
	.EQU	DMA_LIER_HTIE1,		1
	.EQU	DMA_LIER_FTIE1,		0
//  register-------------------------------------
	.EQU	DMA_MUXL,		0x400011C8
//  0x4000 11C8  DMA_MUXL   Bits-------------------------------------
	.EQU	DMA_MUXL_TRGEN4,		31
	.EQU	DMA_MUXL_SOURCE4_3,		27
	.EQU	DMA_MUXL_SOURCE4_2,		26
	.EQU	DMA_MUXL_SOURCE4_1,		25
	.EQU	DMA_MUXL_SOURCE4_0,		24
	.EQU	DMA_MUXL_TRGEN3,		23
	.EQU	DMA_MUXL_SOURCE3_3,		19
	.EQU	DMA_MUXL_SOURCE3_2,		18
	.EQU	DMA_MUXL_SOURCE3_1,		17
	.EQU	DMA_MUXL_SOURCE3_0,		16
	.EQU	DMA_MUXL_TRGEN2,		15
	.EQU	DMA_MUXL_SOURCE2_3,		11
	.EQU	DMA_MUXL_SOURCE2_2,		10
	.EQU	DMA_MUXL_SOURCE2_1,		9
	.EQU	DMA_MUXL_SOURCE2_0,		8
	.EQU	DMA_MUXL_TRGEN1,		7
	.EQU	DMA_MUXL_SOURCE1_3,		3
	.EQU	DMA_MUXL_SOURCE1_2,		2
	.EQU	DMA_MUXL_SOURCE1_1,		1
	.EQU	DMA_MUXL_SOURCE1_0,		0
//  register-------------------------------------
	.EQU	DMA_MUXH,		0x400011CC
//  0x4000 11CC  DMA_MUXH   Bits-------------------------------------
	.EQU	DMA_MUXH_TRGEN7,		23
	.EQU	DMA_MUXH_SOURCE7_3,		19
	.EQU	DMA_MUXH_SOURCE7_2,		18
	.EQU	DMA_MUXH_SOURCE7_1,		17
	.EQU	DMA_MUXH_SOURCE7_0,		16
	.EQU	DMA_MUXH_TRGEN6,		15
	.EQU	DMA_MUXH_SOURCE6_3,		11
	.EQU	DMA_MUXH_SOURCE6_2,		10
	.EQU	DMA_MUXH_SOURCE6_1,		9
	.EQU	DMA_MUXH_SOURCE6_0,		8
	.EQU	DMA_MUXH_TRGEN5,		7
	.EQU	DMA_MUXH_SOURCE5_3,		3
	.EQU	DMA_MUXH_SOURCE5_2,		2
	.EQU	DMA_MUXH_SOURCE5_1,		1
	.EQU	DMA_MUXH_SOURCE5_0,		0
//  register-------------------------------------
	.EQU	ST_CTL,			0x402000A0
//  0x4020 00A0  ST_CTL   Bits-------------------------------------
	.EQU	ST_CTL_COUNTZERO,		16
	.EQU	ST_CTL_STCLKS,		2
	.EQU	ST_CTL_TICKINTEN,		1
	.EQU	ST_CTL_STEN,		0
//  register-------------------------------------
	.EQU	ST_RELOAD,		0x402000A4
//  0x4020 00A4  ST_RELOAD   Bits-------------------------------------
	.EQU	ST_RELOAD_STRELOAD23,		23
	.EQU	ST_RELOAD_STRELOAD22,		22
	.EQU	ST_RELOAD_STRELOAD21,		21
	.EQU	ST_RELOAD_STRELOAD20,		20
	.EQU	ST_RELOAD_STRELOAD19,		19
	.EQU	ST_RELOAD_STRELOAD18,		18
	.EQU	ST_RELOAD_STRELOAD17,		17
	.EQU	ST_RELOAD_STRELOAD16,		16
	.EQU	ST_RELOAD_STRELOAD15,		15
	.EQU	ST_RELOAD_STRELOAD14,		14
	.EQU	ST_RELOAD_STRELOAD13,		13
	.EQU	ST_RELOAD_STRELOAD12,		12
	.EQU	ST_RELOAD_STRELOAD11,		11
	.EQU	ST_RELOAD_STRELOAD10,		10
	.EQU	ST_RELOAD_STRELOAD9,		9
	.EQU	ST_RELOAD_STRELOAD8,		8
	.EQU	ST_RELOAD_STRELOAD7,		7
	.EQU	ST_RELOAD_STRELOAD6,		6
	.EQU	ST_RELOAD_STRELOAD5,		5
	.EQU	ST_RELOAD_STRELOAD4,		4
	.EQU	ST_RELOAD_STRELOAD3,		3
	.EQU	ST_RELOAD_STRELOAD2,		2
	.EQU	ST_RELOAD_STRELOAD1,		1
	.EQU	ST_RELOAD_STRELOAD0,		0
//  register-------------------------------------
	.EQU	ST_CV,			0x402000A8
//  0x4020 00A8  ST_CV   Bits-------------------------------------
	.EQU	ST_CV_STCV23,		23
	.EQU	ST_CV_STCV22,		22
	.EQU	ST_CV_STCV21,		21
	.EQU	ST_CV_STCV20,		20
	.EQU	ST_CV_STCV19,		19
	.EQU	ST_CV_STCV18,		18
	.EQU	ST_CV_STCV17,		17
	.EQU	ST_CV_STCV16,		16
	.EQU	ST_CV_STCV15,		15
	.EQU	ST_CV_STCV14,		14
	.EQU	ST_CV_STCV13,		13
	.EQU	ST_CV_STCV12,		12
	.EQU	ST_CV_STCV11,		11
	.EQU	ST_CV_STCV10,		10
	.EQU	ST_CV_STCV9,		9
	.EQU	ST_CV_STCV8,		8
	.EQU	ST_CV_STCV7,		7
	.EQU	ST_CV_STCV6,		6
	.EQU	ST_CV_STCV5,		5
	.EQU	ST_CV_STCV4,		4
	.EQU	ST_CV_STCV3,		3
	.EQU	ST_CV_STCV2,		2
	.EQU	ST_CV_STCV1,		1
	.EQU	ST_CV_STCV0,		0
//  register-------------------------------------
	.EQU	ST_CALI,		0x402000AC
//  0x4020 00AC  ST_CALI   Bits-------------------------------------
	.EQU	ST_CALI_STCLKREF,		31
	.EQU	ST_CALI_SKEW,		30
	.EQU	ST_CALI_STCALIB23,		23
	.EQU	ST_CALI_STCALIB22,		22
	.EQU	ST_CALI_STCALIB21,		21
	.EQU	ST_CALI_STCALIB20,		20
	.EQU	ST_CALI_STCALIB19,		19
	.EQU	ST_CALI_STCALIB18,		18
	.EQU	ST_CALI_STCALIB17,		17
	.EQU	ST_CALI_STCALIB16,		16
	.EQU	ST_CALI_STCALIB15,		15
	.EQU	ST_CALI_STCALIB14,		14
	.EQU	ST_CALI_STCALIB13,		13
	.EQU	ST_CALI_STCALIB12,		12
	.EQU	ST_CALI_STCALIB11,		11
	.EQU	ST_CALI_STCALIB10,		10
	.EQU	ST_CALI_STCALIB9,		9
	.EQU	ST_CALI_STCALIB8,		8
	.EQU	ST_CALI_STCALIB7,		7
	.EQU	ST_CALI_STCALIB6,		6
	.EQU	ST_CALI_STCALIB5,		5
	.EQU	ST_CALI_STCALIB4,		4
	.EQU	ST_CALI_STCALIB3,		3
	.EQU	ST_CALI_STCALIB2,		2
	.EQU	ST_CALI_STCALIB1,		1
	.EQU	ST_CALI_STCALIB0,		0
//  register-------------------------------------
	.EQU	T0_CNT,			0x40000080
//  0x4000 0080  T0_CNT   Bits-------------------------------------
	.EQU	T0_CNT_TXCNT15,		15
	.EQU	T0_CNT_TXCNT14,		14
	.EQU	T0_CNT_TXCNT13,		13
	.EQU	T0_CNT_TXCNT12,		12
	.EQU	T0_CNT_TXCNT11,		11
	.EQU	T0_CNT_TXCNT10,		10
	.EQU	T0_CNT_TXCNT9,		9
	.EQU	T0_CNT_TXCNT8,		8
	.EQU	T0_CNT_TXCNT7,		7
	.EQU	T0_CNT_TXCNT6,		6
	.EQU	T0_CNT_TXCNT5,		5
	.EQU	T0_CNT_TXCNT4,		4
	.EQU	T0_CNT_TXCNT3,		3
	.EQU	T0_CNT_TXCNT2,		2
	.EQU	T0_CNT_TXCNT1,		1
	.EQU	T0_CNT_TXCNT0,		0
//  register-------------------------------------
	.EQU	T0_CTL1,		0x40000084
//  0x4000 0084  T0_CTL1   Bits-------------------------------------
	.EQU	T0_CTL1_TXIF,		13
	.EQU	T0_CTL1_TXIE,		12
	.EQU	T0_CTL1_TXCMS2,		10
	.EQU	T0_CTL1_TXCMS1,		9
	.EQU	T0_CTL1_TXCMS0,		8
	.EQU	T0_CTL1_TXDIR,		7
	.EQU	T0_CTL1_TXCLK1,		6
	.EQU	T0_CTL1_TXCLK0,		5
	.EQU	T0_CTL1_TXSY,		3
	.EQU	T0_CTL1_TXCS,		1
	.EQU	T0_CTL1_TXEN,		0
//  register-------------------------------------
	.EQU	T0_CTL2,		0x40000088
//  0x4000 0088  T0_CTL2   Bits-------------------------------------
	.EQU	T0_CTL2_TXUR,		13
	.EQU	T0_CTL2_TXMSSYNC,		12
	.EQU	T0_CTL2_TXTS3,		11
	.EQU	T0_CTL2_TXTS2,		10
	.EQU	T0_CTL2_TXTS1,		9
	.EQU	T0_CTL2_TXTS0,		8
	.EQU	T0_CTL2_TXSMS2,		7
	.EQU	T0_CTL2_TXSMS1,		6
	.EQU	T0_CTL2_TXSMS0,		5
	.EQU	T0_CTL2_TXMMS2,		4
	.EQU	T0_CTL2_TXMMS1,		3
	.EQU	T0_CTL2_TXMMS0,		2
	.EQU	T0_CTL2_TXUDEVT,		1
	.EQU	T0_CTL2_TXUDEN,		0
//  register-------------------------------------
	.EQU	T0_PRSC,		0x4000008C
//  0x4000 008C  T0_PRSC   Bits-------------------------------------
	.EQU	T0_PRSC_TXCKS15,		15
	.EQU	T0_PRSC_TXCKS14,		14
	.EQU	T0_PRSC_TXCKS13,		13
	.EQU	T0_PRSC_TXCKS12,		12
	.EQU	T0_PRSC_TXCKS11,		11
	.EQU	T0_PRSC_TXCKS10,		10
	.EQU	T0_PRSC_TXCKS9,		9
	.EQU	T0_PRSC_TXCKS8,		8
	.EQU	T0_PRSC_TXCKS7,		7
	.EQU	T0_PRSC_TXCKS6,		6
	.EQU	T0_PRSC_TXCKS5,		5
	.EQU	T0_PRSC_TXCKS4,		4
	.EQU	T0_PRSC_TXCKS3,		3
	.EQU	T0_PRSC_TXCKS2,		2
	.EQU	T0_PRSC_TXCKS1,		1
	.EQU	T0_PRSC_TXCKS0,		0
//  register-------------------------------------
	.EQU	T0_PPX,			0x40000090
//  0x4000 0090  T0_PPX   Bits-------------------------------------
	.EQU	T0_PPX_PPX15,		15
	.EQU	T0_PPX_PPX14,		14
	.EQU	T0_PPX_PPX13,		13
	.EQU	T0_PPX_PPX12,		12
	.EQU	T0_PPX_PPX11,		11
	.EQU	T0_PPX_PPX10,		10
	.EQU	T0_PPX_PPX9,		9
	.EQU	T0_PPX_PPX8,		8
	.EQU	T0_PPX_PPX7,		7
	.EQU	T0_PPX_PPX6,		6
	.EQU	T0_PPX_PPX5,		5
	.EQU	T0_PPX_PPX4,		4
	.EQU	T0_PPX_PPX3,		3
	.EQU	T0_PPX_PPX2,		2
	.EQU	T0_PPX_PPX1,		1
	.EQU	T0_PPX_PPX0,		0
//  register-------------------------------------
	.EQU	T0_UDTIM,		0x40000094
//  0x4000 0094  T0_UDTIM   Bits-------------------------------------
	.EQU	T0_UDTIM_CAPDEDEN4,		12
	.EQU	T0_UDTIM_CAPDEDEN3,		11
	.EQU	T0_UDTIM_CAPDEDEN2,		10
	.EQU	T0_UDTIM_CAPDEDEN1,		9
	.EQU	T0_UDTIM_TRGPOL,		8
	.EQU	T0_UDTIM_TXUD7,		7
	.EQU	T0_UDTIM_TXUD6,		6
	.EQU	T0_UDTIM_TXUD5,		5
	.EQU	T0_UDTIM_TXUD4,		4
	.EQU	T0_UDTIM_TXUD3,		3
	.EQU	T0_UDTIM_TXUD2,		2
	.EQU	T0_UDTIM_TXUD1,		1
	.EQU	T0_UDTIM_TXUD0,		0
//  register-------------------------------------
	.EQU	T1_CNT,			0x40000100
//  0x4000 0100  T1_CNT   Bits-------------------------------------
	.EQU	T1_CNT_TXCNT15,		15
	.EQU	T1_CNT_TXCNT14,		14
	.EQU	T1_CNT_TXCNT13,		13
	.EQU	T1_CNT_TXCNT12,		12
	.EQU	T1_CNT_TXCNT11,		11
	.EQU	T1_CNT_TXCNT10,		10
	.EQU	T1_CNT_TXCNT9,		9
	.EQU	T1_CNT_TXCNT8,		8
	.EQU	T1_CNT_TXCNT7,		7
	.EQU	T1_CNT_TXCNT6,		6
	.EQU	T1_CNT_TXCNT5,		5
	.EQU	T1_CNT_TXCNT4,		4
	.EQU	T1_CNT_TXCNT3,		3
	.EQU	T1_CNT_TXCNT2,		2
	.EQU	T1_CNT_TXCNT1,		1
	.EQU	T1_CNT_TXCNT0,		0
//  register-------------------------------------
	.EQU	T1_CTL1,		0x40000104
//  0x4000 0104  T1_CTL1   Bits-------------------------------------
	.EQU	T1_CTL1_TXIF,		13
	.EQU	T1_CTL1_TXIE,		12
	.EQU	T1_CTL1_TXCMS2,		10
	.EQU	T1_CTL1_TXCMS1,		9
	.EQU	T1_CTL1_TXCMS0,		8
	.EQU	T1_CTL1_TXDIR,		7
	.EQU	T1_CTL1_TXCLK1,		6
	.EQU	T1_CTL1_TXCLK0,		5
	.EQU	T1_CTL1_TXSY,		3
	.EQU	T1_CTL1_TXCS,		1
	.EQU	T1_CTL1_TXEN,		0
//  register-------------------------------------
	.EQU	T1_CTL2,		0x40000108
//  0x4000 0108  T1_CTL2   Bits-------------------------------------
	.EQU	T1_CTL2_TXUR,		13
	.EQU	T1_CTL2_TXMSSYNC,		12
	.EQU	T1_CTL2_TXTS3,		11
	.EQU	T1_CTL2_TXTS2,		10
	.EQU	T1_CTL2_TXTS1,		9
	.EQU	T1_CTL2_TXTS0,		8
	.EQU	T1_CTL2_TXSMS2,		7
	.EQU	T1_CTL2_TXSMS1,		6
	.EQU	T1_CTL2_TXSMS0,		5
	.EQU	T1_CTL2_TXMMS2,		4
	.EQU	T1_CTL2_TXMMS1,		3
	.EQU	T1_CTL2_TXMMS0,		2
	.EQU	T1_CTL2_TXUDEVT,		1
	.EQU	T1_CTL2_TXUDEN,		0
//  register-------------------------------------
	.EQU	T1_PRSC,		0x4000010C
//  0x4000 010C  T1_PRSC   Bits-------------------------------------
	.EQU	T1_PRSC_TXCKS15,		15
	.EQU	T1_PRSC_TXCKS14,		14
	.EQU	T1_PRSC_TXCKS13,		13
	.EQU	T1_PRSC_TXCKS12,		12
	.EQU	T1_PRSC_TXCKS11,		11
	.EQU	T1_PRSC_TXCKS10,		10
	.EQU	T1_PRSC_TXCKS9,		9
	.EQU	T1_PRSC_TXCKS8,		8
	.EQU	T1_PRSC_TXCKS7,		7
	.EQU	T1_PRSC_TXCKS6,		6
	.EQU	T1_PRSC_TXCKS5,		5
	.EQU	T1_PRSC_TXCKS4,		4
	.EQU	T1_PRSC_TXCKS3,		3
	.EQU	T1_PRSC_TXCKS2,		2
	.EQU	T1_PRSC_TXCKS1,		1
	.EQU	T1_PRSC_TXCKS0,		0
//  register-------------------------------------
	.EQU	T1_PPX,			0x40000110
//  0x4000 0110  T1_PPX   Bits-------------------------------------
	.EQU	T1_PPX_PPX15,		15
	.EQU	T1_PPX_PPX14,		14
	.EQU	T1_PPX_PPX13,		13
	.EQU	T1_PPX_PPX12,		12
	.EQU	T1_PPX_PPX11,		11
	.EQU	T1_PPX_PPX10,		10
	.EQU	T1_PPX_PPX9,		9
	.EQU	T1_PPX_PPX8,		8
	.EQU	T1_PPX_PPX7,		7
	.EQU	T1_PPX_PPX6,		6
	.EQU	T1_PPX_PPX5,		5
	.EQU	T1_PPX_PPX4,		4
	.EQU	T1_PPX_PPX3,		3
	.EQU	T1_PPX_PPX2,		2
	.EQU	T1_PPX_PPX1,		1
	.EQU	T1_PPX_PPX0,		0
//  register-------------------------------------
	.EQU	T1_UDTIM,		0x40000114
//  0x4000 0114  T1_UDTIM   Bits-------------------------------------
	.EQU	T1_UDTIM_CAPDEDEN4,		12
	.EQU	T1_UDTIM_CAPDEDEN3,		11
	.EQU	T1_UDTIM_CAPDEDEN2,		10
	.EQU	T1_UDTIM_CAPDEDEN1,		9
	.EQU	T1_UDTIM_TRGPOL,		8
	.EQU	T1_UDTIM_TXUD7,		7
	.EQU	T1_UDTIM_TXUD6,		6
	.EQU	T1_UDTIM_TXUD5,		5
	.EQU	T1_UDTIM_TXUD4,		4
	.EQU	T1_UDTIM_TXUD3,		3
	.EQU	T1_UDTIM_TXUD2,		2
	.EQU	T1_UDTIM_TXUD1,		1
	.EQU	T1_UDTIM_TXUD0,		0
//  register-------------------------------------
	.EQU	T2_CNT,			0x40000180
//  0x4000 0180  T2_CNT   Bits-------------------------------------
	.EQU	T2_CNT_TXCNT15,		15
	.EQU	T2_CNT_TXCNT14,		14
	.EQU	T2_CNT_TXCNT13,		13
	.EQU	T2_CNT_TXCNT12,		12
	.EQU	T2_CNT_TXCNT11,		11
	.EQU	T2_CNT_TXCNT10,		10
	.EQU	T2_CNT_TXCNT9,		9
	.EQU	T2_CNT_TXCNT8,		8
	.EQU	T2_CNT_TXCNT7,		7
	.EQU	T2_CNT_TXCNT6,		6
	.EQU	T2_CNT_TXCNT5,		5
	.EQU	T2_CNT_TXCNT4,		4
	.EQU	T2_CNT_TXCNT3,		3
	.EQU	T2_CNT_TXCNT2,		2
	.EQU	T2_CNT_TXCNT1,		1
	.EQU	T2_CNT_TXCNT0,		0
//  register-------------------------------------
	.EQU	T2_CTL1,		0x40000184
//  0x4000 0184  T2_CTL1   Bits-------------------------------------
	.EQU	T2_CTL1_TXIF,		13
	.EQU	T2_CTL1_TXIE,		12
	.EQU	T2_CTL1_TXCMS2,		10
	.EQU	T2_CTL1_TXCMS1,		9
	.EQU	T2_CTL1_TXCMS0,		8
	.EQU	T2_CTL1_TXDIR,		7
	.EQU	T2_CTL1_TXCLK1,		6
	.EQU	T2_CTL1_TXCLK0,		5
	.EQU	T2_CTL1_TXSY,		3
	.EQU	T2_CTL1_TXCS,		1
	.EQU	T2_CTL1_TXEN,		0
//  register-------------------------------------
	.EQU	T2_CTL2,		0x40000188
//  0x4000 0188  T2_CTL2   Bits-------------------------------------
	.EQU	T2_CTL2_TXUR,		13
	.EQU	T2_CTL2_TXMSSYNC,		12
	.EQU	T2_CTL2_TXTS3,		11
	.EQU	T2_CTL2_TXTS2,		10
	.EQU	T2_CTL2_TXTS1,		9
	.EQU	T2_CTL2_TXTS0,		8
	.EQU	T2_CTL2_TXSMS2,		7
	.EQU	T2_CTL2_TXSMS1,		6
	.EQU	T2_CTL2_TXSMS0,		5
	.EQU	T2_CTL2_TXMMS2,		4
	.EQU	T2_CTL2_TXMMS1,		3
	.EQU	T2_CTL2_TXMMS0,		2
	.EQU	T2_CTL2_TXUDEVT,		1
	.EQU	T2_CTL2_TXUDEN,		0
//  register-------------------------------------
	.EQU	T2_PRSC,		0x4000018C
//  0x4000 018C  T2_PRSC   Bits-------------------------------------
	.EQU	T2_PRSC_TXCKS15,		15
	.EQU	T2_PRSC_TXCKS14,		14
	.EQU	T2_PRSC_TXCKS13,		13
	.EQU	T2_PRSC_TXCKS12,		12
	.EQU	T2_PRSC_TXCKS11,		11
	.EQU	T2_PRSC_TXCKS10,		10
	.EQU	T2_PRSC_TXCKS9,		9
	.EQU	T2_PRSC_TXCKS8,		8
	.EQU	T2_PRSC_TXCKS7,		7
	.EQU	T2_PRSC_TXCKS6,		6
	.EQU	T2_PRSC_TXCKS5,		5
	.EQU	T2_PRSC_TXCKS4,		4
	.EQU	T2_PRSC_TXCKS3,		3
	.EQU	T2_PRSC_TXCKS2,		2
	.EQU	T2_PRSC_TXCKS1,		1
	.EQU	T2_PRSC_TXCKS0,		0
//  register-------------------------------------
	.EQU	T2_PPX,			0x40000190
//  0x4000 0190  T2_PPX   Bits-------------------------------------
	.EQU	T2_PPX_PPX15,		15
	.EQU	T2_PPX_PPX14,		14
	.EQU	T2_PPX_PPX13,		13
	.EQU	T2_PPX_PPX12,		12
	.EQU	T2_PPX_PPX11,		11
	.EQU	T2_PPX_PPX10,		10
	.EQU	T2_PPX_PPX9,		9
	.EQU	T2_PPX_PPX8,		8
	.EQU	T2_PPX_PPX7,		7
	.EQU	T2_PPX_PPX6,		6
	.EQU	T2_PPX_PPX5,		5
	.EQU	T2_PPX_PPX4,		4
	.EQU	T2_PPX_PPX3,		3
	.EQU	T2_PPX_PPX2,		2
	.EQU	T2_PPX_PPX1,		1
	.EQU	T2_PPX_PPX0,		0
//  register-------------------------------------
	.EQU	T2_UDTIM,		0x40000194
//  0x4000 0194  T2_UDTIM   Bits-------------------------------------
	.EQU	T2_UDTIM_CAPDEDEN4,		12
	.EQU	T2_UDTIM_CAPDEDEN3,		11
	.EQU	T2_UDTIM_CAPDEDEN2,		10
	.EQU	T2_UDTIM_CAPDEDEN1,		9
	.EQU	T2_UDTIM_TRGPOL,		8
	.EQU	T2_UDTIM_TXUD7,		7
	.EQU	T2_UDTIM_TXUD6,		6
	.EQU	T2_UDTIM_TXUD5,		5
	.EQU	T2_UDTIM_TXUD4,		4
	.EQU	T2_UDTIM_TXUD3,		3
	.EQU	T2_UDTIM_TXUD2,		2
	.EQU	T2_UDTIM_TXUD1,		1
	.EQU	T2_UDTIM_TXUD0,		0
//  register-------------------------------------
	.EQU	T3_CNT,			0x40000200
//  0x4000 0200  T3_CNT   Bits-------------------------------------
	.EQU	T3_CNT_TXCNT15,		15
	.EQU	T3_CNT_TXCNT14,		14
	.EQU	T3_CNT_TXCNT13,		13
	.EQU	T3_CNT_TXCNT12,		12
	.EQU	T3_CNT_TXCNT11,		11
	.EQU	T3_CNT_TXCNT10,		10
	.EQU	T3_CNT_TXCNT9,		9
	.EQU	T3_CNT_TXCNT8,		8
	.EQU	T3_CNT_TXCNT7,		7
	.EQU	T3_CNT_TXCNT6,		6
	.EQU	T3_CNT_TXCNT5,		5
	.EQU	T3_CNT_TXCNT4,		4
	.EQU	T3_CNT_TXCNT3,		3
	.EQU	T3_CNT_TXCNT2,		2
	.EQU	T3_CNT_TXCNT1,		1
	.EQU	T3_CNT_TXCNT0,		0
//  register-------------------------------------
	.EQU	T3_CTL1,		0x40000204
//  0x4000 0204  T3_CTL1   Bits-------------------------------------
	.EQU	T3_CTL1_READTEN,		14
	.EQU	T3_CTL1_TXIF,		13
	.EQU	T3_CTL1_TXIE,		12
	.EQU	T3_CTL1_TXCMS2,		10
	.EQU	T3_CTL1_TXCMS1,		9
	.EQU	T3_CTL1_TXCMS0,		8
	.EQU	T3_CTL1_TXDIR,		7
	.EQU	T3_CTL1_TXCLK1,		6
	.EQU	T3_CTL1_TXCLK0,		5
	.EQU	T3_CTL1_TXSY,		3
	.EQU	T3_CTL1_TXCS,		1
	.EQU	T3_CTL1_TXEN,		0
//  register-------------------------------------
	.EQU	T3_CTL2,		0x40000208
//  0x4000 0208  T3_CTL2   Bits-------------------------------------
	.EQU	T3_CTL2_TRGSEL1,		15
	.EQU	T3_CTL2_TRGSEL0,		14
	.EQU	T3_CTL2_TXUR,		13
	.EQU	T3_CTL2_TXMSSYNC,		12
	.EQU	T3_CTL2_TXTS3,		11
	.EQU	T3_CTL2_TXTS2,		10
	.EQU	T3_CTL2_TXTS1,		9
	.EQU	T3_CTL2_TXTS0,		8
	.EQU	T3_CTL2_TXSMS2,		7
	.EQU	T3_CTL2_TXSMS1,		6
	.EQU	T3_CTL2_TXSMS0,		5
	.EQU	T3_CTL2_TXMMS2,		4
	.EQU	T3_CTL2_TXMMS1,		3
	.EQU	T3_CTL2_TXMMS0,		2
	.EQU	T3_CTL2_TXUDEVT,		1
	.EQU	T3_CTL2_TXUDEN,		0
//  register-------------------------------------
	.EQU	T3_PRSC,		0x4000020C
//  0x4000 020C  T3_PRSC   Bits-------------------------------------
	.EQU	T3_PRSC_TXCKS15,		15
	.EQU	T3_PRSC_TXCKS14,		14
	.EQU	T3_PRSC_TXCKS13,		13
	.EQU	T3_PRSC_TXCKS12,		12
	.EQU	T3_PRSC_TXCKS11,		11
	.EQU	T3_PRSC_TXCKS10,		10
	.EQU	T3_PRSC_TXCKS9,		9
	.EQU	T3_PRSC_TXCKS8,		8
	.EQU	T3_PRSC_TXCKS7,		7
	.EQU	T3_PRSC_TXCKS6,		6
	.EQU	T3_PRSC_TXCKS5,		5
	.EQU	T3_PRSC_TXCKS4,		4
	.EQU	T3_PRSC_TXCKS3,		3
	.EQU	T3_PRSC_TXCKS2,		2
	.EQU	T3_PRSC_TXCKS1,		1
	.EQU	T3_PRSC_TXCKS0,		0
//  register-------------------------------------
	.EQU	T3_PPX,			0x40000210
//  0x4000 0210  T3_PPX   Bits-------------------------------------
	.EQU	T3_PPX_PPX15,		15
	.EQU	T3_PPX_PPX14,		14
	.EQU	T3_PPX_PPX13,		13
	.EQU	T3_PPX_PPX12,		12
	.EQU	T3_PPX_PPX11,		11
	.EQU	T3_PPX_PPX10,		10
	.EQU	T3_PPX_PPX9,		9
	.EQU	T3_PPX_PPX8,		8
	.EQU	T3_PPX_PPX7,		7
	.EQU	T3_PPX_PPX6,		6
	.EQU	T3_PPX_PPX5,		5
	.EQU	T3_PPX_PPX4,		4
	.EQU	T3_PPX_PPX3,		3
	.EQU	T3_PPX_PPX2,		2
	.EQU	T3_PPX_PPX1,		1
	.EQU	T3_PPX_PPX0,		0
//  register-------------------------------------
	.EQU	T3_UDTIM,		0x40000214
//  0x4000 0214  T3_UDTIM   Bits-------------------------------------
	.EQU	T3_UDTIM_CAPDEDEN4,		12
	.EQU	T3_UDTIM_CAPDEDEN3,		11
	.EQU	T3_UDTIM_CAPDEDEN2,		10
	.EQU	T3_UDTIM_CAPDEDEN1,		9
	.EQU	T3_UDTIM_TRGPOL,		8
	.EQU	T3_UDTIM_TXUD7,		7
	.EQU	T3_UDTIM_TXUD6,		6
	.EQU	T3_UDTIM_TXUD5,		5
	.EQU	T3_UDTIM_TXUD4,		4
	.EQU	T3_UDTIM_TXUD3,		3
	.EQU	T3_UDTIM_TXUD2,		2
	.EQU	T3_UDTIM_TXUD1,		1
	.EQU	T3_UDTIM_TXUD0,		0
//  register-------------------------------------
	.EQU	T4_CNT,			0x40000280
//  0x4000 0280  T4_CNT   Bits-------------------------------------
	.EQU	T4_CNT_TXCNT15,		15
	.EQU	T4_CNT_TXCNT14,		14
	.EQU	T4_CNT_TXCNT13,		13
	.EQU	T4_CNT_TXCNT12,		12
	.EQU	T4_CNT_TXCNT11,		11
	.EQU	T4_CNT_TXCNT10,		10
	.EQU	T4_CNT_TXCNT9,		9
	.EQU	T4_CNT_TXCNT8,		8
	.EQU	T4_CNT_TXCNT7,		7
	.EQU	T4_CNT_TXCNT6,		6
	.EQU	T4_CNT_TXCNT5,		5
	.EQU	T4_CNT_TXCNT4,		4
	.EQU	T4_CNT_TXCNT3,		3
	.EQU	T4_CNT_TXCNT2,		2
	.EQU	T4_CNT_TXCNT1,		1
	.EQU	T4_CNT_TXCNT0,		0
//  register-------------------------------------
	.EQU	T4_CTL1,		0x40000284
//  0x4000 0284  T4_CTL1   Bits-------------------------------------
	.EQU	T4_CTL1_TXIF,		13
	.EQU	T4_CTL1_TXIE,		12
	.EQU	T4_CTL1_TXCMS2,		10
	.EQU	T4_CTL1_TXCMS1,		9
	.EQU	T4_CTL1_TXCMS0,		8
	.EQU	T4_CTL1_TXDIR,		7
	.EQU	T4_CTL1_TXCLK1,		6
	.EQU	T4_CTL1_TXCLK0,		5
	.EQU	T4_CTL1_TXSY,		3
	.EQU	T4_CTL1_TXCS,		1
	.EQU	T4_CTL1_TXEN,		0
//  register-------------------------------------
	.EQU	T4_CTL2,		0x40000288
//  0x4000 0288  T4_CTL2   Bits-------------------------------------
	.EQU	T4_CTL2_TXUR,		13
	.EQU	T4_CTL2_TXMSSYNC,		12
	.EQU	T4_CTL2_TXTS3,		11
	.EQU	T4_CTL2_TXTS2,		10
	.EQU	T4_CTL2_TXTS1,		9
	.EQU	T4_CTL2_TXTS0,		8
	.EQU	T4_CTL2_TXSMS2,		7
	.EQU	T4_CTL2_TXSMS1,		6
	.EQU	T4_CTL2_TXSMS0,		5
	.EQU	T4_CTL2_TXMMS2,		4
	.EQU	T4_CTL2_TXMMS1,		3
	.EQU	T4_CTL2_TXMMS0,		2
	.EQU	T4_CTL2_TXUDEVT,		1
	.EQU	T4_CTL2_TXUDEN,		0
//  register-------------------------------------
	.EQU	T4_PRSC,		0x4000028C
//  0x4000 028C  T4_PRSC   Bits-------------------------------------
	.EQU	T4_PRSC_TXCKS15,		15
	.EQU	T4_PRSC_TXCKS14,		14
	.EQU	T4_PRSC_TXCKS13,		13
	.EQU	T4_PRSC_TXCKS12,		12
	.EQU	T4_PRSC_TXCKS11,		11
	.EQU	T4_PRSC_TXCKS10,		10
	.EQU	T4_PRSC_TXCKS9,		9
	.EQU	T4_PRSC_TXCKS8,		8
	.EQU	T4_PRSC_TXCKS7,		7
	.EQU	T4_PRSC_TXCKS6,		6
	.EQU	T4_PRSC_TXCKS5,		5
	.EQU	T4_PRSC_TXCKS4,		4
	.EQU	T4_PRSC_TXCKS3,		3
	.EQU	T4_PRSC_TXCKS2,		2
	.EQU	T4_PRSC_TXCKS1,		1
	.EQU	T4_PRSC_TXCKS0,		0
//  register-------------------------------------
	.EQU	T4_PPX,			0x40000290
//  0x4000 0290  T4_PPX   Bits-------------------------------------
	.EQU	T4_PPX_PPX15,		15
	.EQU	T4_PPX_PPX14,		14
	.EQU	T4_PPX_PPX13,		13
	.EQU	T4_PPX_PPX12,		12
	.EQU	T4_PPX_PPX11,		11
	.EQU	T4_PPX_PPX10,		10
	.EQU	T4_PPX_PPX9,		9
	.EQU	T4_PPX_PPX8,		8
	.EQU	T4_PPX_PPX7,		7
	.EQU	T4_PPX_PPX6,		6
	.EQU	T4_PPX_PPX5,		5
	.EQU	T4_PPX_PPX4,		4
	.EQU	T4_PPX_PPX3,		3
	.EQU	T4_PPX_PPX2,		2
	.EQU	T4_PPX_PPX1,		1
	.EQU	T4_PPX_PPX0,		0
//  register-------------------------------------
	.EQU	T4_UDTIM,		0x40000294
//  0x4000 0294  T4_UDTIM   Bits-------------------------------------
	.EQU	T4_UDTIM_CAPDEDEN4,		12
	.EQU	T4_UDTIM_CAPDEDEN3,		11
	.EQU	T4_UDTIM_CAPDEDEN2,		10
	.EQU	T4_UDTIM_CAPDEDEN1,		9
	.EQU	T4_UDTIM_TRGPOL,		8
	.EQU	T4_UDTIM_TXUD7,		7
	.EQU	T4_UDTIM_TXUD6,		6
	.EQU	T4_UDTIM_TXUD5,		5
	.EQU	T4_UDTIM_TXUD4,		4
	.EQU	T4_UDTIM_TXUD3,		3
	.EQU	T4_UDTIM_TXUD2,		2
	.EQU	T4_UDTIM_TXUD1,		1
	.EQU	T4_UDTIM_TXUD0,		0
//  register-------------------------------------
	.EQU	T5_CNT,			0x40000300
//  0x4000 0300  T5_CNT   Bits-------------------------------------
	.EQU	T5_CNT_TXCNT15,		15
	.EQU	T5_CNT_TXCNT14,		14
	.EQU	T5_CNT_TXCNT13,		13
	.EQU	T5_CNT_TXCNT12,		12
	.EQU	T5_CNT_TXCNT11,		11
	.EQU	T5_CNT_TXCNT10,		10
	.EQU	T5_CNT_TXCNT9,		9
	.EQU	T5_CNT_TXCNT8,		8
	.EQU	T5_CNT_TXCNT7,		7
	.EQU	T5_CNT_TXCNT6,		6
	.EQU	T5_CNT_TXCNT5,		5
	.EQU	T5_CNT_TXCNT4,		4
	.EQU	T5_CNT_TXCNT3,		3
	.EQU	T5_CNT_TXCNT2,		2
	.EQU	T5_CNT_TXCNT1,		1
	.EQU	T5_CNT_TXCNT0,		0
//  register-------------------------------------
	.EQU	T5_CTL1,		0x40000304
//  0x4000 0304  T5_CTL1   Bits-------------------------------------
	.EQU	T5_CTL1_TXIF,		13
	.EQU	T5_CTL1_TXIE,		12
	.EQU	T5_CTL1_TXCMS2,		10
	.EQU	T5_CTL1_TXCMS1,		9
	.EQU	T5_CTL1_TXCMS0,		8
	.EQU	T5_CTL1_TXDIR,		7
	.EQU	T5_CTL1_TXCLK1,		6
	.EQU	T5_CTL1_TXCLK0,		5
	.EQU	T5_CTL1_TXSY,		3
	.EQU	T5_CTL1_TXCS,		1
	.EQU	T5_CTL1_TXEN,		0
//  register-------------------------------------
	.EQU	T5_CTL2,		0x40000308
//  0x4000 0308  T5_CTL2   Bits-------------------------------------
	.EQU	T5_CTL2_TXUR,		13
	.EQU	T5_CTL2_TXMSSYNC,		12
	.EQU	T5_CTL2_TXTS3,		11
	.EQU	T5_CTL2_TXTS2,		10
	.EQU	T5_CTL2_TXTS1,		9
	.EQU	T5_CTL2_TXTS0,		8
	.EQU	T5_CTL2_TXSMS2,		7
	.EQU	T5_CTL2_TXSMS1,		6
	.EQU	T5_CTL2_TXSMS0,		5
	.EQU	T5_CTL2_TXMMS2,		4
	.EQU	T5_CTL2_TXMMS1,		3
	.EQU	T5_CTL2_TXMMS0,		2
	.EQU	T5_CTL2_TXUDEVT,		1
	.EQU	T5_CTL2_TXUDEN,		0
//  register-------------------------------------
	.EQU	T5_PRSC,		0x4000030C
//  0x4000 030C  T5_PRSC   Bits-------------------------------------
	.EQU	T5_PRSC_TXCKS15,		15
	.EQU	T5_PRSC_TXCKS14,		14
	.EQU	T5_PRSC_TXCKS13,		13
	.EQU	T5_PRSC_TXCKS12,		12
	.EQU	T5_PRSC_TXCKS11,		11
	.EQU	T5_PRSC_TXCKS10,		10
	.EQU	T5_PRSC_TXCKS9,		9
	.EQU	T5_PRSC_TXCKS8,		8
	.EQU	T5_PRSC_TXCKS7,		7
	.EQU	T5_PRSC_TXCKS6,		6
	.EQU	T5_PRSC_TXCKS5,		5
	.EQU	T5_PRSC_TXCKS4,		4
	.EQU	T5_PRSC_TXCKS3,		3
	.EQU	T5_PRSC_TXCKS2,		2
	.EQU	T5_PRSC_TXCKS1,		1
	.EQU	T5_PRSC_TXCKS0,		0
//  register-------------------------------------
	.EQU	T5_PPX,			0x40000310
//  0x4000 0310  T5_PPX   Bits-------------------------------------
	.EQU	T5_PPX_PPX15,		15
	.EQU	T5_PPX_PPX14,		14
	.EQU	T5_PPX_PPX13,		13
	.EQU	T5_PPX_PPX12,		12
	.EQU	T5_PPX_PPX11,		11
	.EQU	T5_PPX_PPX10,		10
	.EQU	T5_PPX_PPX9,		9
	.EQU	T5_PPX_PPX8,		8
	.EQU	T5_PPX_PPX7,		7
	.EQU	T5_PPX_PPX6,		6
	.EQU	T5_PPX_PPX5,		5
	.EQU	T5_PPX_PPX4,		4
	.EQU	T5_PPX_PPX3,		3
	.EQU	T5_PPX_PPX2,		2
	.EQU	T5_PPX_PPX1,		1
	.EQU	T5_PPX_PPX0,		0
//  register-------------------------------------
	.EQU	T5_UDTIM,		0x40000314
//  0x4000 0314  T5_UDTIM   Bits-------------------------------------
	.EQU	T5_UDTIM_CAPDEDEN4,		12
	.EQU	T5_UDTIM_CAPDEDEN3,		11
	.EQU	T5_UDTIM_CAPDEDEN2,		10
	.EQU	T5_UDTIM_CAPDEDEN1,		9
	.EQU	T5_UDTIM_TRGPOL,		8
	.EQU	T5_UDTIM_TXUD7,		7
	.EQU	T5_UDTIM_TXUD6,		6
	.EQU	T5_UDTIM_TXUD5,		5
	.EQU	T5_UDTIM_TXUD4,		4
	.EQU	T5_UDTIM_TXUD3,		3
	.EQU	T5_UDTIM_TXUD2,		2
	.EQU	T5_UDTIM_TXUD1,		1
	.EQU	T5_UDTIM_TXUD0,		0
//  register-------------------------------------
	.EQU	CCP0_C1,		0x400000A0
//  0x4000 00A0  CCP0_C1   Bits-------------------------------------
	.EQU	CCP0_C1_CCPXCY15,		15
	.EQU	CCP0_C1_CCPXCY14,		14
	.EQU	CCP0_C1_CCPXCY13,		13
	.EQU	CCP0_C1_CCPXCY12,		12
	.EQU	CCP0_C1_CCPXCY11,		11
	.EQU	CCP0_C1_CCPXCY10,		10
	.EQU	CCP0_C1_CCPXCY9,		9
	.EQU	CCP0_C1_CCPXCY8,		8
	.EQU	CCP0_C1_CCPXCY7,		7
	.EQU	CCP0_C1_CCPXCY6,		6
	.EQU	CCP0_C1_CCPXCY5,		5
	.EQU	CCP0_C1_CCPXCY4,		4
	.EQU	CCP0_C1_CCPXCY3,		3
	.EQU	CCP0_C1_CCPXCY2,		2
	.EQU	CCP0_C1_CCPXCY1,		1
	.EQU	CCP0_C1_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP0_C2,		0x400000A4
//  0x4000 00A4  CCP0_C2   Bits-------------------------------------
	.EQU	CCP0_C2_CCPXCY15,		15
	.EQU	CCP0_C2_CCPXCY14,		14
	.EQU	CCP0_C2_CCPXCY13,		13
	.EQU	CCP0_C2_CCPXCY12,		12
	.EQU	CCP0_C2_CCPXCY11,		11
	.EQU	CCP0_C2_CCPXCY10,		10
	.EQU	CCP0_C2_CCPXCY9,		9
	.EQU	CCP0_C2_CCPXCY8,		8
	.EQU	CCP0_C2_CCPXCY7,		7
	.EQU	CCP0_C2_CCPXCY6,		6
	.EQU	CCP0_C2_CCPXCY5,		5
	.EQU	CCP0_C2_CCPXCY4,		4
	.EQU	CCP0_C2_CCPXCY3,		3
	.EQU	CCP0_C2_CCPXCY2,		2
	.EQU	CCP0_C2_CCPXCY1,		1
	.EQU	CCP0_C2_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP0_C3,		0x400000A8
//  0x4000 00A8  CCP0_C3   Bits-------------------------------------
	.EQU	CCP0_C3_CCPXCY15,		15
	.EQU	CCP0_C3_CCPXCY14,		14
	.EQU	CCP0_C3_CCPXCY13,		13
	.EQU	CCP0_C3_CCPXCY12,		12
	.EQU	CCP0_C3_CCPXCY11,		11
	.EQU	CCP0_C3_CCPXCY10,		10
	.EQU	CCP0_C3_CCPXCY9,		9
	.EQU	CCP0_C3_CCPXCY8,		8
	.EQU	CCP0_C3_CCPXCY7,		7
	.EQU	CCP0_C3_CCPXCY6,		6
	.EQU	CCP0_C3_CCPXCY5,		5
	.EQU	CCP0_C3_CCPXCY4,		4
	.EQU	CCP0_C3_CCPXCY3,		3
	.EQU	CCP0_C3_CCPXCY2,		2
	.EQU	CCP0_C3_CCPXCY1,		1
	.EQU	CCP0_C3_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP0_C4,		0x400000AC
//  0x4000 00AC  CCP0_C4   Bits-------------------------------------
	.EQU	CCP0_C4_CCPXCY15,		15
	.EQU	CCP0_C4_CCPXCY14,		14
	.EQU	CCP0_C4_CCPXCY13,		13
	.EQU	CCP0_C4_CCPXCY12,		12
	.EQU	CCP0_C4_CCPXCY11,		11
	.EQU	CCP0_C4_CCPXCY10,		10
	.EQU	CCP0_C4_CCPXCY9,		9
	.EQU	CCP0_C4_CCPXCY8,		8
	.EQU	CCP0_C4_CCPXCY7,		7
	.EQU	CCP0_C4_CCPXCY6,		6
	.EQU	CCP0_C4_CCPXCY5,		5
	.EQU	CCP0_C4_CCPXCY4,		4
	.EQU	CCP0_C4_CCPXCY3,		3
	.EQU	CCP0_C4_CCPXCY2,		2
	.EQU	CCP0_C4_CCPXCY1,		1
	.EQU	CCP0_C4_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP0_SRIC,		0x400000B0
//  0x4000 00B0  CCP0_SRIC   Bits-------------------------------------
	.EQU	CCP0_SRIC_TXIC,		6
	.EQU	CCP0_SRIC_TXUIC,		5
	.EQU	CCP0_SRIC_TXTIC,		4
	.EQU	CCP0_SRIC_CC4IC,		3
	.EQU	CCP0_SRIC_CC3IC,		2
	.EQU	CCP0_SRIC_CC2IC,		1
	.EQU	CCP0_SRIC_CC1IC,		0
//  register-------------------------------------
	.EQU	CCP0_DF,		0x400000B4
//  0x4000 00B4  CCP0_DF   Bits-------------------------------------
	.EQU	CCP0_DF_TXUDF,		5
	.EQU	CCP0_DF_TXTDF,		4
	.EQU	CCP0_DF_CC4DF,		3
	.EQU	CCP0_DF_CC3DF,		2
	.EQU	CCP0_DF_CC2DF,		1
	.EQU	CCP0_DF_CC1DF,		0
//  register-------------------------------------
	.EQU	CCP0_CTL1,		0x400000C0
//  0x4000 00C0  CCP0_CTL1   Bits-------------------------------------
	.EQU	CCP0_CTL1_CH4M3,		15
	.EQU	CCP0_CTL1_CH4M2,		14
	.EQU	CCP0_CTL1_CH4M1,		13
	.EQU	CCP0_CTL1_CH4M0,		12
	.EQU	CCP0_CTL1_CH3M3,		11
	.EQU	CCP0_CTL1_CH3M2,		10
	.EQU	CCP0_CTL1_CH3M1,		9
	.EQU	CCP0_CTL1_CH3M0,		8
	.EQU	CCP0_CTL1_CH2M3,		7
	.EQU	CCP0_CTL1_CH2M2,		6
	.EQU	CCP0_CTL1_CH2M1,		5
	.EQU	CCP0_CTL1_CH2M0,		4
	.EQU	CCP0_CTL1_CH1M3,		3
	.EQU	CCP0_CTL1_CH1M2,		2
	.EQU	CCP0_CTL1_CH1M1,		1
	.EQU	CCP0_CTL1_CH1M0,		0
//  register-------------------------------------
	.EQU	CCP0_R1,		0x400000C4
//  0x4000 00C4  CCP0_R1   Bits-------------------------------------
	.EQU	CCP0_R1_CCPXRY15,		15
	.EQU	CCP0_R1_CCPXRY14,		14
	.EQU	CCP0_R1_CCPXRY13,		13
	.EQU	CCP0_R1_CCPXRY12,		12
	.EQU	CCP0_R1_CCPXRY11,		11
	.EQU	CCP0_R1_CCPXRY10,		10
	.EQU	CCP0_R1_CCPXRY9,		9
	.EQU	CCP0_R1_CCPXRY8,		8
	.EQU	CCP0_R1_CCPXRY7,		7
	.EQU	CCP0_R1_CCPXRY6,		6
	.EQU	CCP0_R1_CCPXRY5,		5
	.EQU	CCP0_R1_CCPXRY4,		4
	.EQU	CCP0_R1_CCPXRY3,		3
	.EQU	CCP0_R1_CCPXRY2,		2
	.EQU	CCP0_R1_CCPXRY1,		1
	.EQU	CCP0_R1_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP0_R2,		0x400000C8
//  0x4000 00C8  CCP0_R2   Bits-------------------------------------
	.EQU	CCP0_R2_CCPXRY15,		15
	.EQU	CCP0_R2_CCPXRY14,		14
	.EQU	CCP0_R2_CCPXRY13,		13
	.EQU	CCP0_R2_CCPXRY12,		12
	.EQU	CCP0_R2_CCPXRY11,		11
	.EQU	CCP0_R2_CCPXRY10,		10
	.EQU	CCP0_R2_CCPXRY9,		9
	.EQU	CCP0_R2_CCPXRY8,		8
	.EQU	CCP0_R2_CCPXRY7,		7
	.EQU	CCP0_R2_CCPXRY6,		6
	.EQU	CCP0_R2_CCPXRY5,		5
	.EQU	CCP0_R2_CCPXRY4,		4
	.EQU	CCP0_R2_CCPXRY3,		3
	.EQU	CCP0_R2_CCPXRY2,		2
	.EQU	CCP0_R2_CCPXRY1,		1
	.EQU	CCP0_R2_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP0_R3,		0x400000CC
//  0x4000 00CC  CCP0_R3   Bits-------------------------------------
	.EQU	CCP0_R3_CCPXRY15,		15
	.EQU	CCP0_R3_CCPXRY14,		14
	.EQU	CCP0_R3_CCPXRY13,		13
	.EQU	CCP0_R3_CCPXRY12,		12
	.EQU	CCP0_R3_CCPXRY11,		11
	.EQU	CCP0_R3_CCPXRY10,		10
	.EQU	CCP0_R3_CCPXRY9,		9
	.EQU	CCP0_R3_CCPXRY8,		8
	.EQU	CCP0_R3_CCPXRY7,		7
	.EQU	CCP0_R3_CCPXRY6,		6
	.EQU	CCP0_R3_CCPXRY5,		5
	.EQU	CCP0_R3_CCPXRY4,		4
	.EQU	CCP0_R3_CCPXRY3,		3
	.EQU	CCP0_R3_CCPXRY2,		2
	.EQU	CCP0_R3_CCPXRY1,		1
	.EQU	CCP0_R3_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP0_R4,		0x400000D0
//  0x4000 00D0  CCP0_R4   Bits-------------------------------------
	.EQU	CCP0_R4_CCPXRY15,		15
	.EQU	CCP0_R4_CCPXRY14,		14
	.EQU	CCP0_R4_CCPXRY13,		13
	.EQU	CCP0_R4_CCPXRY12,		12
	.EQU	CCP0_R4_CCPXRY11,		11
	.EQU	CCP0_R4_CCPXRY10,		10
	.EQU	CCP0_R4_CCPXRY9,		9
	.EQU	CCP0_R4_CCPXRY8,		8
	.EQU	CCP0_R4_CCPXRY7,		7
	.EQU	CCP0_R4_CCPXRY6,		6
	.EQU	CCP0_R4_CCPXRY5,		5
	.EQU	CCP0_R4_CCPXRY4,		4
	.EQU	CCP0_R4_CCPXRY3,		3
	.EQU	CCP0_R4_CCPXRY2,		2
	.EQU	CCP0_R4_CCPXRY1,		1
	.EQU	CCP0_R4_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP0_CTL2,		0x400000D4
//  0x4000 00D4  CCP0_CTL2   Bits-------------------------------------
	.EQU	CCP0_CTL2_PXOC4CE,		15
	.EQU	CCP0_CTL2_PXOC3CE,		14
	.EQU	CCP0_CTL2_PXOC2CE,		13
	.EQU	CCP0_CTL2_PXOC1CE,		12
	.EQU	CCP0_CTL2_PXASS1,		11
	.EQU	CCP0_CTL2_PXASS0,		10
	.EQU	CCP0_CTL2_TCKSEL1,		9
	.EQU	CCP0_CTL2_TCKSEL0,		8
	.EQU	CCP0_CTL2_PXOC4_1,		7
	.EQU	CCP0_CTL2_PXOC4_0,		6
	.EQU	CCP0_CTL2_PXOC3_1,		5
	.EQU	CCP0_CTL2_PXOC3_0,		4
	.EQU	CCP0_CTL2_PXOC2_1,		3
	.EQU	CCP0_CTL2_PXOC2_0,		2
	.EQU	CCP0_CTL2_PXOC1_1,		1
	.EQU	CCP0_CTL2_PXOC1_0,		0
//  register-------------------------------------
	.EQU	CCP0_CTL3,		0x400000D8
//  0x4000 00D8  CCP0_CTL3   Bits-------------------------------------
	.EQU	CCP0_CTL3_PXSPMST,		15
	.EQU	CCP0_CTL3_PXPWMI,		14
	.EQU	CCP0_CTL3_PXXORM,		13
	.EQU	CCP0_CTL3_PXSPM,		12
	.EQU	CCP0_CTL3_TXTDE,		11
	.EQU	CCP0_CTL3_CC4DE,		10
	.EQU	CCP0_CTL3_CC3DE,		9
	.EQU	CCP0_CTL3_CC2DE,		8
	.EQU	CCP0_CTL3_CC1DE,		7
	.EQU	CCP0_CTL3_TXUDE,		6
	.EQU	CCP0_CTL3_TXUIE,		5
	.EQU	CCP0_CTL3_TXTIE,		4
	.EQU	CCP0_CTL3_CC4IE,		3
	.EQU	CCP0_CTL3_CC3IE,		2
	.EQU	CCP0_CTL3_CC2IE,		1
	.EQU	CCP0_CTL3_CC1IE,		0
//  register-------------------------------------
	.EQU	CCP0_EGIF,		0x400000DC
//  0x4000 00DC  CCP0_EGIF   Bits-------------------------------------
	.EQU	CCP0_EGIF_POSSEL,		13
	.EQU	CCP0_EGIF_PXSEL,		12
	.EQU	CCP0_EGIF_TXUIF,		11
	.EQU	CCP0_EGIF_TXTIF,		10
	.EQU	CCP0_EGIF_CC4IF,		9
	.EQU	CCP0_EGIF_CC3IF,		8
	.EQU	CCP0_EGIF_CC2IF,		7
	.EQU	CCP0_EGIF_CC1IF,		6
	.EQU	CCP0_EGIF_TXTRG,		5
	.EQU	CCP0_EGIF_CC4G,		4
	.EQU	CCP0_EGIF_CC3G,		3
	.EQU	CCP0_EGIF_CC2G,		2
	.EQU	CCP0_EGIF_CC1G,		1
	.EQU	CCP0_EGIF_UARTRXEN,		0
//  register-------------------------------------
	.EQU	CCP1_C1,		0x40000120
//  0x4000 0120  CCP1_C1   Bits-------------------------------------
	.EQU	CCP1_C1_CCPXCY15,		15
	.EQU	CCP1_C1_CCPXCY14,		14
	.EQU	CCP1_C1_CCPXCY13,		13
	.EQU	CCP1_C1_CCPXCY12,		12
	.EQU	CCP1_C1_CCPXCY11,		11
	.EQU	CCP1_C1_CCPXCY10,		10
	.EQU	CCP1_C1_CCPXCY9,		9
	.EQU	CCP1_C1_CCPXCY8,		8
	.EQU	CCP1_C1_CCPXCY7,		7
	.EQU	CCP1_C1_CCPXCY6,		6
	.EQU	CCP1_C1_CCPXCY5,		5
	.EQU	CCP1_C1_CCPXCY4,		4
	.EQU	CCP1_C1_CCPXCY3,		3
	.EQU	CCP1_C1_CCPXCY2,		2
	.EQU	CCP1_C1_CCPXCY1,		1
	.EQU	CCP1_C1_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP1_C2,		0x40000124
//  0x4000 0124  CCP1_C2   Bits-------------------------------------
	.EQU	CCP1_C2_CCPXCY15,		15
	.EQU	CCP1_C2_CCPXCY14,		14
	.EQU	CCP1_C2_CCPXCY13,		13
	.EQU	CCP1_C2_CCPXCY12,		12
	.EQU	CCP1_C2_CCPXCY11,		11
	.EQU	CCP1_C2_CCPXCY10,		10
	.EQU	CCP1_C2_CCPXCY9,		9
	.EQU	CCP1_C2_CCPXCY8,		8
	.EQU	CCP1_C2_CCPXCY7,		7
	.EQU	CCP1_C2_CCPXCY6,		6
	.EQU	CCP1_C2_CCPXCY5,		5
	.EQU	CCP1_C2_CCPXCY4,		4
	.EQU	CCP1_C2_CCPXCY3,		3
	.EQU	CCP1_C2_CCPXCY2,		2
	.EQU	CCP1_C2_CCPXCY1,		1
	.EQU	CCP1_C2_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP1_C3,		0x40000128
//  0x4000 0128  CCP1_C3   Bits-------------------------------------
	.EQU	CCP1_C3_CCPXCY15,		15
	.EQU	CCP1_C3_CCPXCY14,		14
	.EQU	CCP1_C3_CCPXCY13,		13
	.EQU	CCP1_C3_CCPXCY12,		12
	.EQU	CCP1_C3_CCPXCY11,		11
	.EQU	CCP1_C3_CCPXCY10,		10
	.EQU	CCP1_C3_CCPXCY9,		9
	.EQU	CCP1_C3_CCPXCY8,		8
	.EQU	CCP1_C3_CCPXCY7,		7
	.EQU	CCP1_C3_CCPXCY6,		6
	.EQU	CCP1_C3_CCPXCY5,		5
	.EQU	CCP1_C3_CCPXCY4,		4
	.EQU	CCP1_C3_CCPXCY3,		3
	.EQU	CCP1_C3_CCPXCY2,		2
	.EQU	CCP1_C3_CCPXCY1,		1
	.EQU	CCP1_C3_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP1_C4,		0x4000012C
//  0x4000 012C  CCP1_C4   Bits-------------------------------------
	.EQU	CCP1_C4_CCPXCY15,		15
	.EQU	CCP1_C4_CCPXCY14,		14
	.EQU	CCP1_C4_CCPXCY13,		13
	.EQU	CCP1_C4_CCPXCY12,		12
	.EQU	CCP1_C4_CCPXCY11,		11
	.EQU	CCP1_C4_CCPXCY10,		10
	.EQU	CCP1_C4_CCPXCY9,		9
	.EQU	CCP1_C4_CCPXCY8,		8
	.EQU	CCP1_C4_CCPXCY7,		7
	.EQU	CCP1_C4_CCPXCY6,		6
	.EQU	CCP1_C4_CCPXCY5,		5
	.EQU	CCP1_C4_CCPXCY4,		4
	.EQU	CCP1_C4_CCPXCY3,		3
	.EQU	CCP1_C4_CCPXCY2,		2
	.EQU	CCP1_C4_CCPXCY1,		1
	.EQU	CCP1_C4_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP1_SRIC,		0x40000130
//  0x4000 0130  CCP1_SRIC   Bits-------------------------------------
	.EQU	CCP1_SRIC_ANA_TEN,		15
	.EQU	CCP1_SRIC_ANA_T2,		14
	.EQU	CCP1_SRIC_ANA_T1,		13
	.EQU	CCP1_SRIC_ANA_T0,		12
	.EQU	CCP1_SRIC_TXIC,		6
	.EQU	CCP1_SRIC_TXUIC,		5
	.EQU	CCP1_SRIC_TXTIC,		4
	.EQU	CCP1_SRIC_CC4IC,		3
	.EQU	CCP1_SRIC_CC3IC,		2
	.EQU	CCP1_SRIC_CC2IC,		1
	.EQU	CCP1_SRIC_CC1IC,		0
//  register-------------------------------------
	.EQU	CCP1_DF,		0x40000134
//  0x4000 0134  CCP1_DF   Bits-------------------------------------
	.EQU	CCP1_DF_TXUDF,		5
	.EQU	CCP1_DF_TXTDF,		4
	.EQU	CCP1_DF_CC4DF,		3
	.EQU	CCP1_DF_CC3DF,		2
	.EQU	CCP1_DF_CC2DF,		1
	.EQU	CCP1_DF_CC1DF,		0
//  register-------------------------------------
	.EQU	CCP1_CTL1,		0x40000140
//  0x4000 0140  CCP1_CTL1   Bits-------------------------------------
	.EQU	CCP1_CTL1_CH4M3,		15
	.EQU	CCP1_CTL1_CH4M2,		14
	.EQU	CCP1_CTL1_CH4M1,		13
	.EQU	CCP1_CTL1_CH4M0,		12
	.EQU	CCP1_CTL1_CH3M3,		11
	.EQU	CCP1_CTL1_CH3M2,		10
	.EQU	CCP1_CTL1_CH3M1,		9
	.EQU	CCP1_CTL1_CH3M0,		8
	.EQU	CCP1_CTL1_CH2M3,		7
	.EQU	CCP1_CTL1_CH2M2,		6
	.EQU	CCP1_CTL1_CH2M1,		5
	.EQU	CCP1_CTL1_CH2M0,		4
	.EQU	CCP1_CTL1_CH1M3,		3
	.EQU	CCP1_CTL1_CH1M2,		2
	.EQU	CCP1_CTL1_CH1M1,		1
	.EQU	CCP1_CTL1_CH1M0,		0
//  register-------------------------------------
	.EQU	CCP1_R1,		0x40000144
//  0x4000 0144  CCP1_R1   Bits-------------------------------------
	.EQU	CCP1_R1_CCPXRY15,		15
	.EQU	CCP1_R1_CCPXRY14,		14
	.EQU	CCP1_R1_CCPXRY13,		13
	.EQU	CCP1_R1_CCPXRY12,		12
	.EQU	CCP1_R1_CCPXRY11,		11
	.EQU	CCP1_R1_CCPXRY10,		10
	.EQU	CCP1_R1_CCPXRY9,		9
	.EQU	CCP1_R1_CCPXRY8,		8
	.EQU	CCP1_R1_CCPXRY7,		7
	.EQU	CCP1_R1_CCPXRY6,		6
	.EQU	CCP1_R1_CCPXRY5,		5
	.EQU	CCP1_R1_CCPXRY4,		4
	.EQU	CCP1_R1_CCPXRY3,		3
	.EQU	CCP1_R1_CCPXRY2,		2
	.EQU	CCP1_R1_CCPXRY1,		1
	.EQU	CCP1_R1_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP1_R2,		0x40000148
//  0x4000 0148  CCP1_R2   Bits-------------------------------------
	.EQU	CCP1_R2_CCPXRY15,		15
	.EQU	CCP1_R2_CCPXRY14,		14
	.EQU	CCP1_R2_CCPXRY13,		13
	.EQU	CCP1_R2_CCPXRY12,		12
	.EQU	CCP1_R2_CCPXRY11,		11
	.EQU	CCP1_R2_CCPXRY10,		10
	.EQU	CCP1_R2_CCPXRY9,		9
	.EQU	CCP1_R2_CCPXRY8,		8
	.EQU	CCP1_R2_CCPXRY7,		7
	.EQU	CCP1_R2_CCPXRY6,		6
	.EQU	CCP1_R2_CCPXRY5,		5
	.EQU	CCP1_R2_CCPXRY4,		4
	.EQU	CCP1_R2_CCPXRY3,		3
	.EQU	CCP1_R2_CCPXRY2,		2
	.EQU	CCP1_R2_CCPXRY1,		1
	.EQU	CCP1_R2_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP1_R3,		0x4000014C
//  0x4000 014C  CCP1_R3   Bits-------------------------------------
	.EQU	CCP1_R3_CCPXRY15,		15
	.EQU	CCP1_R3_CCPXRY14,		14
	.EQU	CCP1_R3_CCPXRY13,		13
	.EQU	CCP1_R3_CCPXRY12,		12
	.EQU	CCP1_R3_CCPXRY11,		11
	.EQU	CCP1_R3_CCPXRY10,		10
	.EQU	CCP1_R3_CCPXRY9,		9
	.EQU	CCP1_R3_CCPXRY8,		8
	.EQU	CCP1_R3_CCPXRY7,		7
	.EQU	CCP1_R3_CCPXRY6,		6
	.EQU	CCP1_R3_CCPXRY5,		5
	.EQU	CCP1_R3_CCPXRY4,		4
	.EQU	CCP1_R3_CCPXRY3,		3
	.EQU	CCP1_R3_CCPXRY2,		2
	.EQU	CCP1_R3_CCPXRY1,		1
	.EQU	CCP1_R3_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP1_R4,		0x40000150
//  0x4000 0150  CCP1_R4   Bits-------------------------------------
	.EQU	CCP1_R4_CCPXRY15,		15
	.EQU	CCP1_R4_CCPXRY14,		14
	.EQU	CCP1_R4_CCPXRY13,		13
	.EQU	CCP1_R4_CCPXRY12,		12
	.EQU	CCP1_R4_CCPXRY11,		11
	.EQU	CCP1_R4_CCPXRY10,		10
	.EQU	CCP1_R4_CCPXRY9,		9
	.EQU	CCP1_R4_CCPXRY8,		8
	.EQU	CCP1_R4_CCPXRY7,		7
	.EQU	CCP1_R4_CCPXRY6,		6
	.EQU	CCP1_R4_CCPXRY5,		5
	.EQU	CCP1_R4_CCPXRY4,		4
	.EQU	CCP1_R4_CCPXRY3,		3
	.EQU	CCP1_R4_CCPXRY2,		2
	.EQU	CCP1_R4_CCPXRY1,		1
	.EQU	CCP1_R4_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP1_CTL2,		0x40000154
//  0x4000 0154  CCP1_CTL2   Bits-------------------------------------
	.EQU	CCP1_CTL2_PXOC4CE,		15
	.EQU	CCP1_CTL2_PXOC3CE,		14
	.EQU	CCP1_CTL2_PXOC2CE,		13
	.EQU	CCP1_CTL2_PXOC1CE,		12
	.EQU	CCP1_CTL2_PXASS1,		11
	.EQU	CCP1_CTL2_PXASS0,		10
	.EQU	CCP1_CTL2_TCKSEL1,		9
	.EQU	CCP1_CTL2_TCKSEL0,		8
	.EQU	CCP1_CTL2_PXOC4_1,		7
	.EQU	CCP1_CTL2_PXOC4_0,		6
	.EQU	CCP1_CTL2_PXOC3_1,		5
	.EQU	CCP1_CTL2_PXOC3_0,		4
	.EQU	CCP1_CTL2_PXOC2_1,		3
	.EQU	CCP1_CTL2_PXOC2_0,		2
	.EQU	CCP1_CTL2_PXOC1_1,		1
	.EQU	CCP1_CTL2_PXOC1_0,		0
//  register-------------------------------------
	.EQU	CCP1_CTL3,		0x40000158
//  0x4000 0158  CCP1_CTL3   Bits-------------------------------------
	.EQU	CCP1_CTL3_PXSPMST,		15
	.EQU	CCP1_CTL3_PXPWMI,		14
	.EQU	CCP1_CTL3_PXXORM,		13
	.EQU	CCP1_CTL3_PXSPM,		12
	.EQU	CCP1_CTL3_TXTDE,		11
	.EQU	CCP1_CTL3_CC4DE,		10
	.EQU	CCP1_CTL3_CC3DE,		9
	.EQU	CCP1_CTL3_CC2DE,		8
	.EQU	CCP1_CTL3_CC1DE,		7
	.EQU	CCP1_CTL3_TXUDE,		6
	.EQU	CCP1_CTL3_TXUIE,		5
	.EQU	CCP1_CTL3_TXTIE,		4
	.EQU	CCP1_CTL3_CC4IE,		3
	.EQU	CCP1_CTL3_CC3IE,		2
	.EQU	CCP1_CTL3_CC2IE,		1
	.EQU	CCP1_CTL3_CC1IE,		0
//  register-------------------------------------
	.EQU	CCP1_EGIF,		0x4000015C
//  0x4000 015C  CCP1_EGIF   Bits-------------------------------------
	.EQU	CCP1_EGIF_POSSEL,		13
	.EQU	CCP1_EGIF_PXSEL,		12
	.EQU	CCP1_EGIF_TXUIF,		11
	.EQU	CCP1_EGIF_TXTIF,		10
	.EQU	CCP1_EGIF_CC4IF,		9
	.EQU	CCP1_EGIF_CC3IF,		8
	.EQU	CCP1_EGIF_CC2IF,		7
	.EQU	CCP1_EGIF_CC1IF,		6
	.EQU	CCP1_EGIF_TXTRG,		5
	.EQU	CCP1_EGIF_CC4G,		4
	.EQU	CCP1_EGIF_CC3G,		3
	.EQU	CCP1_EGIF_CC2G,		2
	.EQU	CCP1_EGIF_CC1G,		1
	.EQU	CCP1_EGIF_UARTRXEN,		0
//  register-------------------------------------
	.EQU	CCP2_C1,		0x400001A0
//  0x4000 01A0  CCP2_C1   Bits-------------------------------------
	.EQU	CCP2_C1_CCPXCY15,		15
	.EQU	CCP2_C1_CCPXCY14,		14
	.EQU	CCP2_C1_CCPXCY13,		13
	.EQU	CCP2_C1_CCPXCY12,		12
	.EQU	CCP2_C1_CCPXCY11,		11
	.EQU	CCP2_C1_CCPXCY10,		10
	.EQU	CCP2_C1_CCPXCY9,		9
	.EQU	CCP2_C1_CCPXCY8,		8
	.EQU	CCP2_C1_CCPXCY7,		7
	.EQU	CCP2_C1_CCPXCY6,		6
	.EQU	CCP2_C1_CCPXCY5,		5
	.EQU	CCP2_C1_CCPXCY4,		4
	.EQU	CCP2_C1_CCPXCY3,		3
	.EQU	CCP2_C1_CCPXCY2,		2
	.EQU	CCP2_C1_CCPXCY1,		1
	.EQU	CCP2_C1_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP2_C2,		0x400001A4
//  0x4000 01A4  CCP2_C2   Bits-------------------------------------
	.EQU	CCP2_C2_CCPXCY15,		15
	.EQU	CCP2_C2_CCPXCY14,		14
	.EQU	CCP2_C2_CCPXCY13,		13
	.EQU	CCP2_C2_CCPXCY12,		12
	.EQU	CCP2_C2_CCPXCY11,		11
	.EQU	CCP2_C2_CCPXCY10,		10
	.EQU	CCP2_C2_CCPXCY9,		9
	.EQU	CCP2_C2_CCPXCY8,		8
	.EQU	CCP2_C2_CCPXCY7,		7
	.EQU	CCP2_C2_CCPXCY6,		6
	.EQU	CCP2_C2_CCPXCY5,		5
	.EQU	CCP2_C2_CCPXCY4,		4
	.EQU	CCP2_C2_CCPXCY3,		3
	.EQU	CCP2_C2_CCPXCY2,		2
	.EQU	CCP2_C2_CCPXCY1,		1
	.EQU	CCP2_C2_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP2_C3,		0x400001A8
//  0x4000 01A8  CCP2_C3   Bits-------------------------------------
	.EQU	CCP2_C3_CCPXCY15,		15
	.EQU	CCP2_C3_CCPXCY14,		14
	.EQU	CCP2_C3_CCPXCY13,		13
	.EQU	CCP2_C3_CCPXCY12,		12
	.EQU	CCP2_C3_CCPXCY11,		11
	.EQU	CCP2_C3_CCPXCY10,		10
	.EQU	CCP2_C3_CCPXCY9,		9
	.EQU	CCP2_C3_CCPXCY8,		8
	.EQU	CCP2_C3_CCPXCY7,		7
	.EQU	CCP2_C3_CCPXCY6,		6
	.EQU	CCP2_C3_CCPXCY5,		5
	.EQU	CCP2_C3_CCPXCY4,		4
	.EQU	CCP2_C3_CCPXCY3,		3
	.EQU	CCP2_C3_CCPXCY2,		2
	.EQU	CCP2_C3_CCPXCY1,		1
	.EQU	CCP2_C3_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP2_C4,		0x400001AC
//  0x4000 01AC  CCP2_C4   Bits-------------------------------------
	.EQU	CCP2_C4_CCPXCY15,		15
	.EQU	CCP2_C4_CCPXCY14,		14
	.EQU	CCP2_C4_CCPXCY13,		13
	.EQU	CCP2_C4_CCPXCY12,		12
	.EQU	CCP2_C4_CCPXCY11,		11
	.EQU	CCP2_C4_CCPXCY10,		10
	.EQU	CCP2_C4_CCPXCY9,		9
	.EQU	CCP2_C4_CCPXCY8,		8
	.EQU	CCP2_C4_CCPXCY7,		7
	.EQU	CCP2_C4_CCPXCY6,		6
	.EQU	CCP2_C4_CCPXCY5,		5
	.EQU	CCP2_C4_CCPXCY4,		4
	.EQU	CCP2_C4_CCPXCY3,		3
	.EQU	CCP2_C4_CCPXCY2,		2
	.EQU	CCP2_C4_CCPXCY1,		1
	.EQU	CCP2_C4_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP2_SRIC,		0x400001B0
//  0x4000 01B0  CCP2_SRIC   Bits-------------------------------------
	.EQU	CCP2_SRIC_TXIC,		6
	.EQU	CCP2_SRIC_TXUIC,		5
	.EQU	CCP2_SRIC_TXTIC,		4
	.EQU	CCP2_SRIC_CC4IC,		3
	.EQU	CCP2_SRIC_CC3IC,		2
	.EQU	CCP2_SRIC_CC2IC,		1
	.EQU	CCP2_SRIC_CC1IC,		0
//  register-------------------------------------
	.EQU	CCP2_DF,		0x400001B4
//  0x4000 01B4  CCP2_DF   Bits-------------------------------------
	.EQU	CCP2_DF_TXUDF,		5
	.EQU	CCP2_DF_TXTDF,		4
	.EQU	CCP2_DF_CC4DF,		3
	.EQU	CCP2_DF_CC3DF,		2
	.EQU	CCP2_DF_CC2DF,		1
	.EQU	CCP2_DF_CC1DF,		0
//  register-------------------------------------
	.EQU	CCP2_CTL1,		0x400001C0
//  0x4000 01C0  CCP2_CTL1   Bits-------------------------------------
	.EQU	CCP2_CTL1_CH4M3,		15
	.EQU	CCP2_CTL1_CH4M2,		14
	.EQU	CCP2_CTL1_CH4M1,		13
	.EQU	CCP2_CTL1_CH4M0,		12
	.EQU	CCP2_CTL1_CH3M3,		11
	.EQU	CCP2_CTL1_CH3M2,		10
	.EQU	CCP2_CTL1_CH3M1,		9
	.EQU	CCP2_CTL1_CH3M0,		8
	.EQU	CCP2_CTL1_CH2M3,		7
	.EQU	CCP2_CTL1_CH2M2,		6
	.EQU	CCP2_CTL1_CH2M1,		5
	.EQU	CCP2_CTL1_CH2M0,		4
	.EQU	CCP2_CTL1_CH1M3,		3
	.EQU	CCP2_CTL1_CH1M2,		2
	.EQU	CCP2_CTL1_CH1M1,		1
	.EQU	CCP2_CTL1_CH1M0,		0
//  register-------------------------------------
	.EQU	CCP2_R1,		0x400001C4
//  0x4000 01C4  CCP2_R1   Bits-------------------------------------
	.EQU	CCP2_R1_CCPXRY15,		15
	.EQU	CCP2_R1_CCPXRY14,		14
	.EQU	CCP2_R1_CCPXRY13,		13
	.EQU	CCP2_R1_CCPXRY12,		12
	.EQU	CCP2_R1_CCPXRY11,		11
	.EQU	CCP2_R1_CCPXRY10,		10
	.EQU	CCP2_R1_CCPXRY9,		9
	.EQU	CCP2_R1_CCPXRY8,		8
	.EQU	CCP2_R1_CCPXRY7,		7
	.EQU	CCP2_R1_CCPXRY6,		6
	.EQU	CCP2_R1_CCPXRY5,		5
	.EQU	CCP2_R1_CCPXRY4,		4
	.EQU	CCP2_R1_CCPXRY3,		3
	.EQU	CCP2_R1_CCPXRY2,		2
	.EQU	CCP2_R1_CCPXRY1,		1
	.EQU	CCP2_R1_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP2_R2,		0x400001C8
//  0x4000 01C8  CCP2_R2   Bits-------------------------------------
	.EQU	CCP2_R2_CCPXRY15,		15
	.EQU	CCP2_R2_CCPXRY14,		14
	.EQU	CCP2_R2_CCPXRY13,		13
	.EQU	CCP2_R2_CCPXRY12,		12
	.EQU	CCP2_R2_CCPXRY11,		11
	.EQU	CCP2_R2_CCPXRY10,		10
	.EQU	CCP2_R2_CCPXRY9,		9
	.EQU	CCP2_R2_CCPXRY8,		8
	.EQU	CCP2_R2_CCPXRY7,		7
	.EQU	CCP2_R2_CCPXRY6,		6
	.EQU	CCP2_R2_CCPXRY5,		5
	.EQU	CCP2_R2_CCPXRY4,		4
	.EQU	CCP2_R2_CCPXRY3,		3
	.EQU	CCP2_R2_CCPXRY2,		2
	.EQU	CCP2_R2_CCPXRY1,		1
	.EQU	CCP2_R2_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP2_R3,		0x400001CC
//  0x4000 01CC  CCP2_R3   Bits-------------------------------------
	.EQU	CCP2_R3_CCPXRY15,		15
	.EQU	CCP2_R3_CCPXRY14,		14
	.EQU	CCP2_R3_CCPXRY13,		13
	.EQU	CCP2_R3_CCPXRY12,		12
	.EQU	CCP2_R3_CCPXRY11,		11
	.EQU	CCP2_R3_CCPXRY10,		10
	.EQU	CCP2_R3_CCPXRY9,		9
	.EQU	CCP2_R3_CCPXRY8,		8
	.EQU	CCP2_R3_CCPXRY7,		7
	.EQU	CCP2_R3_CCPXRY6,		6
	.EQU	CCP2_R3_CCPXRY5,		5
	.EQU	CCP2_R3_CCPXRY4,		4
	.EQU	CCP2_R3_CCPXRY3,		3
	.EQU	CCP2_R3_CCPXRY2,		2
	.EQU	CCP2_R3_CCPXRY1,		1
	.EQU	CCP2_R3_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP2_R4,		0x400001D0
//  0x4000 01D0  CCP2_R4   Bits-------------------------------------
	.EQU	CCP2_R4_CCPXRY15,		15
	.EQU	CCP2_R4_CCPXRY14,		14
	.EQU	CCP2_R4_CCPXRY13,		13
	.EQU	CCP2_R4_CCPXRY12,		12
	.EQU	CCP2_R4_CCPXRY11,		11
	.EQU	CCP2_R4_CCPXRY10,		10
	.EQU	CCP2_R4_CCPXRY9,		9
	.EQU	CCP2_R4_CCPXRY8,		8
	.EQU	CCP2_R4_CCPXRY7,		7
	.EQU	CCP2_R4_CCPXRY6,		6
	.EQU	CCP2_R4_CCPXRY5,		5
	.EQU	CCP2_R4_CCPXRY4,		4
	.EQU	CCP2_R4_CCPXRY3,		3
	.EQU	CCP2_R4_CCPXRY2,		2
	.EQU	CCP2_R4_CCPXRY1,		1
	.EQU	CCP2_R4_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP2_CTL2,		0x400001D4
//  0x4000 01D4  CCP2_CTL2   Bits-------------------------------------
	.EQU	CCP2_CTL2_PXOC4CE,		15
	.EQU	CCP2_CTL2_PXOC3CE,		14
	.EQU	CCP2_CTL2_PXOC2CE,		13
	.EQU	CCP2_CTL2_PXOC1CE,		12
	.EQU	CCP2_CTL2_PXASS1,		11
	.EQU	CCP2_CTL2_PXASS0,		10
	.EQU	CCP2_CTL2_TCKSEL1,		9
	.EQU	CCP2_CTL2_TCKSEL0,		8
	.EQU	CCP2_CTL2_PXOC4_1,		7
	.EQU	CCP2_CTL2_PXOC4_0,		6
	.EQU	CCP2_CTL2_PXOC3_1,		5
	.EQU	CCP2_CTL2_PXOC3_0,		4
	.EQU	CCP2_CTL2_PXOC2_1,		3
	.EQU	CCP2_CTL2_PXOC2_0,		2
	.EQU	CCP2_CTL2_PXOC1_1,		1
	.EQU	CCP2_CTL2_PXOC1_0,		0
//  register-------------------------------------
	.EQU	CCP2_CTL3,		0x400001D8
//  0x4000 01D8  CCP2_CTL3   Bits-------------------------------------
	.EQU	CCP2_CTL3_PXSPMST,		15
	.EQU	CCP2_CTL3_PXPWMI,		14
	.EQU	CCP2_CTL3_PXXORM,		13
	.EQU	CCP2_CTL3_PXSPM,		12
	.EQU	CCP2_CTL3_TXTDE,		11
	.EQU	CCP2_CTL3_CC4DE,		10
	.EQU	CCP2_CTL3_CC3DE,		9
	.EQU	CCP2_CTL3_CC2DE,		8
	.EQU	CCP2_CTL3_CC1DE,		7
	.EQU	CCP2_CTL3_TXUDE,		6
	.EQU	CCP2_CTL3_TXUIE,		5
	.EQU	CCP2_CTL3_TXTIE,		4
	.EQU	CCP2_CTL3_CC4IE,		3
	.EQU	CCP2_CTL3_CC3IE,		2
	.EQU	CCP2_CTL3_CC2IE,		1
	.EQU	CCP2_CTL3_CC1IE,		0
//  register-------------------------------------
	.EQU	CCP2_EGIF,		0x400001DC
//  0x4000 01DC  CCP2_EGIF   Bits-------------------------------------
	.EQU	CCP2_EGIF_POSSEL,		13
	.EQU	CCP2_EGIF_PXSEL,		12
	.EQU	CCP2_EGIF_TXUIF,		11
	.EQU	CCP2_EGIF_TXTIF,		10
	.EQU	CCP2_EGIF_CC4IF,		9
	.EQU	CCP2_EGIF_CC3IF,		8
	.EQU	CCP2_EGIF_CC2IF,		7
	.EQU	CCP2_EGIF_CC1IF,		6
	.EQU	CCP2_EGIF_TXTRG,		5
	.EQU	CCP2_EGIF_CC4G,		4
	.EQU	CCP2_EGIF_CC3G,		3
	.EQU	CCP2_EGIF_CC2G,		2
	.EQU	CCP2_EGIF_CC1G,		1
	.EQU	CCP2_EGIF_UARTRXEN,		0
//  register-------------------------------------
	.EQU	CCP3_C1,		0x40000220
//  0x4000 0220  CCP3_C1   Bits-------------------------------------
	.EQU	CCP3_C1_CCPXCY15,		15
	.EQU	CCP3_C1_CCPXCY14,		14
	.EQU	CCP3_C1_CCPXCY13,		13
	.EQU	CCP3_C1_CCPXCY12,		12
	.EQU	CCP3_C1_CCPXCY11,		11
	.EQU	CCP3_C1_CCPXCY10,		10
	.EQU	CCP3_C1_CCPXCY9,		9
	.EQU	CCP3_C1_CCPXCY8,		8
	.EQU	CCP3_C1_CCPXCY7,		7
	.EQU	CCP3_C1_CCPXCY6,		6
	.EQU	CCP3_C1_CCPXCY5,		5
	.EQU	CCP3_C1_CCPXCY4,		4
	.EQU	CCP3_C1_CCPXCY3,		3
	.EQU	CCP3_C1_CCPXCY2,		2
	.EQU	CCP3_C1_CCPXCY1,		1
	.EQU	CCP3_C1_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP3_C2,		0x40000224
//  0x4000 0224  CCP3_C2   Bits-------------------------------------
	.EQU	CCP3_C2_CCPXCY15,		15
	.EQU	CCP3_C2_CCPXCY14,		14
	.EQU	CCP3_C2_CCPXCY13,		13
	.EQU	CCP3_C2_CCPXCY12,		12
	.EQU	CCP3_C2_CCPXCY11,		11
	.EQU	CCP3_C2_CCPXCY10,		10
	.EQU	CCP3_C2_CCPXCY9,		9
	.EQU	CCP3_C2_CCPXCY8,		8
	.EQU	CCP3_C2_CCPXCY7,		7
	.EQU	CCP3_C2_CCPXCY6,		6
	.EQU	CCP3_C2_CCPXCY5,		5
	.EQU	CCP3_C2_CCPXCY4,		4
	.EQU	CCP3_C2_CCPXCY3,		3
	.EQU	CCP3_C2_CCPXCY2,		2
	.EQU	CCP3_C2_CCPXCY1,		1
	.EQU	CCP3_C2_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP3_C3,		0x40000228
//  0x4000 0228  CCP3_C3   Bits-------------------------------------
	.EQU	CCP3_C3_CCPXCY15,		15
	.EQU	CCP3_C3_CCPXCY14,		14
	.EQU	CCP3_C3_CCPXCY13,		13
	.EQU	CCP3_C3_CCPXCY12,		12
	.EQU	CCP3_C3_CCPXCY11,		11
	.EQU	CCP3_C3_CCPXCY10,		10
	.EQU	CCP3_C3_CCPXCY9,		9
	.EQU	CCP3_C3_CCPXCY8,		8
	.EQU	CCP3_C3_CCPXCY7,		7
	.EQU	CCP3_C3_CCPXCY6,		6
	.EQU	CCP3_C3_CCPXCY5,		5
	.EQU	CCP3_C3_CCPXCY4,		4
	.EQU	CCP3_C3_CCPXCY3,		3
	.EQU	CCP3_C3_CCPXCY2,		2
	.EQU	CCP3_C3_CCPXCY1,		1
	.EQU	CCP3_C3_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP3_C4,		0x4000022C
//  0x4000 022C  CCP3_C4   Bits-------------------------------------
	.EQU	CCP3_C4_CCPXCY15,		15
	.EQU	CCP3_C4_CCPXCY14,		14
	.EQU	CCP3_C4_CCPXCY13,		13
	.EQU	CCP3_C4_CCPXCY12,		12
	.EQU	CCP3_C4_CCPXCY11,		11
	.EQU	CCP3_C4_CCPXCY10,		10
	.EQU	CCP3_C4_CCPXCY9,		9
	.EQU	CCP3_C4_CCPXCY8,		8
	.EQU	CCP3_C4_CCPXCY7,		7
	.EQU	CCP3_C4_CCPXCY6,		6
	.EQU	CCP3_C4_CCPXCY5,		5
	.EQU	CCP3_C4_CCPXCY4,		4
	.EQU	CCP3_C4_CCPXCY3,		3
	.EQU	CCP3_C4_CCPXCY2,		2
	.EQU	CCP3_C4_CCPXCY1,		1
	.EQU	CCP3_C4_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP3_SRIC,		0x40000230
//  0x4000 0230  CCP3_SRIC   Bits-------------------------------------
	.EQU	CCP3_SRIC_TXIC,		6
	.EQU	CCP3_SRIC_TXUIC,		5
	.EQU	CCP3_SRIC_TXTIC,		4
	.EQU	CCP3_SRIC_CC4IC,		3
	.EQU	CCP3_SRIC_CC3IC,		2
	.EQU	CCP3_SRIC_CC2IC,		1
	.EQU	CCP3_SRIC_CC1IC,		0
//  register-------------------------------------
	.EQU	CCP3_DF,		0x40000234
//  0x4000 0234  CCP3_DF   Bits-------------------------------------
	.EQU	CCP3_DF_TXUDF,		5
	.EQU	CCP3_DF_TXTDF,		4
	.EQU	CCP3_DF_CC4DF,		3
	.EQU	CCP3_DF_CC3DF,		2
	.EQU	CCP3_DF_CC2DF,		1
	.EQU	CCP3_DF_CC1DF,		0
//  register-------------------------------------
	.EQU	CCP3_CTL1,		0x40000240
//  0x4000 0240  CCP3_CTL1   Bits-------------------------------------
	.EQU	CCP3_CTL1_CH4M3,		15
	.EQU	CCP3_CTL1_CH4M2,		14
	.EQU	CCP3_CTL1_CH4M1,		13
	.EQU	CCP3_CTL1_CH4M0,		12
	.EQU	CCP3_CTL1_CH3M3,		11
	.EQU	CCP3_CTL1_CH3M2,		10
	.EQU	CCP3_CTL1_CH3M1,		9
	.EQU	CCP3_CTL1_CH3M0,		8
	.EQU	CCP3_CTL1_CH2M3,		7
	.EQU	CCP3_CTL1_CH2M2,		6
	.EQU	CCP3_CTL1_CH2M1,		5
	.EQU	CCP3_CTL1_CH2M0,		4
	.EQU	CCP3_CTL1_CH1M3,		3
	.EQU	CCP3_CTL1_CH1M2,		2
	.EQU	CCP3_CTL1_CH1M1,		1
	.EQU	CCP3_CTL1_CH1M0,		0
//  register-------------------------------------
	.EQU	CCP3_R1,		0x40000244
//  0x4000 0244  CCP3_R1   Bits-------------------------------------
	.EQU	CCP3_R1_CCPXRY15,		15
	.EQU	CCP3_R1_CCPXRY14,		14
	.EQU	CCP3_R1_CCPXRY13,		13
	.EQU	CCP3_R1_CCPXRY12,		12
	.EQU	CCP3_R1_CCPXRY11,		11
	.EQU	CCP3_R1_CCPXRY10,		10
	.EQU	CCP3_R1_CCPXRY9,		9
	.EQU	CCP3_R1_CCPXRY8,		8
	.EQU	CCP3_R1_CCPXRY7,		7
	.EQU	CCP3_R1_CCPXRY6,		6
	.EQU	CCP3_R1_CCPXRY5,		5
	.EQU	CCP3_R1_CCPXRY4,		4
	.EQU	CCP3_R1_CCPXRY3,		3
	.EQU	CCP3_R1_CCPXRY2,		2
	.EQU	CCP3_R1_CCPXRY1,		1
	.EQU	CCP3_R1_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP3_R2,		0x40000248
//  0x4000 0248  CCP3_R2   Bits-------------------------------------
	.EQU	CCP3_R2_CCPXRY15,		15
	.EQU	CCP3_R2_CCPXRY14,		14
	.EQU	CCP3_R2_CCPXRY13,		13
	.EQU	CCP3_R2_CCPXRY12,		12
	.EQU	CCP3_R2_CCPXRY11,		11
	.EQU	CCP3_R2_CCPXRY10,		10
	.EQU	CCP3_R2_CCPXRY9,		9
	.EQU	CCP3_R2_CCPXRY8,		8
	.EQU	CCP3_R2_CCPXRY7,		7
	.EQU	CCP3_R2_CCPXRY6,		6
	.EQU	CCP3_R2_CCPXRY5,		5
	.EQU	CCP3_R2_CCPXRY4,		4
	.EQU	CCP3_R2_CCPXRY3,		3
	.EQU	CCP3_R2_CCPXRY2,		2
	.EQU	CCP3_R2_CCPXRY1,		1
	.EQU	CCP3_R2_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP3_R3,		0x4000024C
//  0x4000 024C  CCP3_R3   Bits-------------------------------------
	.EQU	CCP3_R3_CCPXRY15,		15
	.EQU	CCP3_R3_CCPXRY14,		14
	.EQU	CCP3_R3_CCPXRY13,		13
	.EQU	CCP3_R3_CCPXRY12,		12
	.EQU	CCP3_R3_CCPXRY11,		11
	.EQU	CCP3_R3_CCPXRY10,		10
	.EQU	CCP3_R3_CCPXRY9,		9
	.EQU	CCP3_R3_CCPXRY8,		8
	.EQU	CCP3_R3_CCPXRY7,		7
	.EQU	CCP3_R3_CCPXRY6,		6
	.EQU	CCP3_R3_CCPXRY5,		5
	.EQU	CCP3_R3_CCPXRY4,		4
	.EQU	CCP3_R3_CCPXRY3,		3
	.EQU	CCP3_R3_CCPXRY2,		2
	.EQU	CCP3_R3_CCPXRY1,		1
	.EQU	CCP3_R3_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP3_R4,		0x40000250
//  0x4000 0250  CCP3_R4   Bits-------------------------------------
	.EQU	CCP3_R4_CCPXRY15,		15
	.EQU	CCP3_R4_CCPXRY14,		14
	.EQU	CCP3_R4_CCPXRY13,		13
	.EQU	CCP3_R4_CCPXRY12,		12
	.EQU	CCP3_R4_CCPXRY11,		11
	.EQU	CCP3_R4_CCPXRY10,		10
	.EQU	CCP3_R4_CCPXRY9,		9
	.EQU	CCP3_R4_CCPXRY8,		8
	.EQU	CCP3_R4_CCPXRY7,		7
	.EQU	CCP3_R4_CCPXRY6,		6
	.EQU	CCP3_R4_CCPXRY5,		5
	.EQU	CCP3_R4_CCPXRY4,		4
	.EQU	CCP3_R4_CCPXRY3,		3
	.EQU	CCP3_R4_CCPXRY2,		2
	.EQU	CCP3_R4_CCPXRY1,		1
	.EQU	CCP3_R4_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP3_CTL2,		0x40000254
//  0x4000 0254  CCP3_CTL2   Bits-------------------------------------
	.EQU	CCP3_CTL2_PXOC4CE,		15
	.EQU	CCP3_CTL2_PXOC3CE,		14
	.EQU	CCP3_CTL2_PXOC2CE,		13
	.EQU	CCP3_CTL2_PXOC1CE,		12
	.EQU	CCP3_CTL2_PXASS1,		11
	.EQU	CCP3_CTL2_PXASS0,		10
	.EQU	CCP3_CTL2_TCKSEL1,		9
	.EQU	CCP3_CTL2_TCKSEL0,		8
	.EQU	CCP3_CTL2_PXOC4_1,		7
	.EQU	CCP3_CTL2_PXOC4_0,		6
	.EQU	CCP3_CTL2_PXOC3_1,		5
	.EQU	CCP3_CTL2_PXOC3_0,		4
	.EQU	CCP3_CTL2_PXOC2_1,		3
	.EQU	CCP3_CTL2_PXOC2_0,		2
	.EQU	CCP3_CTL2_PXOC1_1,		1
	.EQU	CCP3_CTL2_PXOC1_0,		0
//  register-------------------------------------
	.EQU	CCP3_CTL3,		0x40000258
//  0x4000 0258  CCP3_CTL3   Bits-------------------------------------
	.EQU	CCP3_CTL3_PXSPMST,		15
	.EQU	CCP3_CTL3_PXPWMI,		14
	.EQU	CCP3_CTL3_PXXORM,		13
	.EQU	CCP3_CTL3_PXSPM,		12
	.EQU	CCP3_CTL3_TXTDE,		11
	.EQU	CCP3_CTL3_CC4DE,		10
	.EQU	CCP3_CTL3_CC3DE,		9
	.EQU	CCP3_CTL3_CC2DE,		8
	.EQU	CCP3_CTL3_CC1DE,		7
	.EQU	CCP3_CTL3_TXUDE,		6
	.EQU	CCP3_CTL3_TXUIE,		5
	.EQU	CCP3_CTL3_TXTIE,		4
	.EQU	CCP3_CTL3_CC4IE,		3
	.EQU	CCP3_CTL3_CC3IE,		2
	.EQU	CCP3_CTL3_CC2IE,		1
	.EQU	CCP3_CTL3_CC1IE,		0
//  register-------------------------------------
	.EQU	CCP3_EGIF,		0x4000025C
//  0x4000 025C  CCP3_EGIF   Bits-------------------------------------
	.EQU	CCP3_EGIF_POSSEL,		13
	.EQU	CCP3_EGIF_PXSEL,		12
	.EQU	CCP3_EGIF_TXUIF,		11
	.EQU	CCP3_EGIF_TXTIF,		10
	.EQU	CCP3_EGIF_CC4IF,		9
	.EQU	CCP3_EGIF_CC3IF,		8
	.EQU	CCP3_EGIF_CC2IF,		7
	.EQU	CCP3_EGIF_CC1IF,		6
	.EQU	CCP3_EGIF_TXTRG,		5
	.EQU	CCP3_EGIF_CC4G,		4
	.EQU	CCP3_EGIF_CC3G,		3
	.EQU	CCP3_EGIF_CC2G,		2
	.EQU	CCP3_EGIF_CC1G,		1
	.EQU	CCP3_EGIF_UARTRXEN,		0
//  register-------------------------------------
	.EQU	CCP4_C1,		0x400002A0
//  0x4000 02A0  CCP4_C1   Bits-------------------------------------
	.EQU	CCP4_C1_CCPXCY15,		15
	.EQU	CCP4_C1_CCPXCY14,		14
	.EQU	CCP4_C1_CCPXCY13,		13
	.EQU	CCP4_C1_CCPXCY12,		12
	.EQU	CCP4_C1_CCPXCY11,		11
	.EQU	CCP4_C1_CCPXCY10,		10
	.EQU	CCP4_C1_CCPXCY9,		9
	.EQU	CCP4_C1_CCPXCY8,		8
	.EQU	CCP4_C1_CCPXCY7,		7
	.EQU	CCP4_C1_CCPXCY6,		6
	.EQU	CCP4_C1_CCPXCY5,		5
	.EQU	CCP4_C1_CCPXCY4,		4
	.EQU	CCP4_C1_CCPXCY3,		3
	.EQU	CCP4_C1_CCPXCY2,		2
	.EQU	CCP4_C1_CCPXCY1,		1
	.EQU	CCP4_C1_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP4_C2,		0x400002A4
//  0x4000 02A4  CCP4_C2   Bits-------------------------------------
	.EQU	CCP4_C2_CCPXCY15,		15
	.EQU	CCP4_C2_CCPXCY14,		14
	.EQU	CCP4_C2_CCPXCY13,		13
	.EQU	CCP4_C2_CCPXCY12,		12
	.EQU	CCP4_C2_CCPXCY11,		11
	.EQU	CCP4_C2_CCPXCY10,		10
	.EQU	CCP4_C2_CCPXCY9,		9
	.EQU	CCP4_C2_CCPXCY8,		8
	.EQU	CCP4_C2_CCPXCY7,		7
	.EQU	CCP4_C2_CCPXCY6,		6
	.EQU	CCP4_C2_CCPXCY5,		5
	.EQU	CCP4_C2_CCPXCY4,		4
	.EQU	CCP4_C2_CCPXCY3,		3
	.EQU	CCP4_C2_CCPXCY2,		2
	.EQU	CCP4_C2_CCPXCY1,		1
	.EQU	CCP4_C2_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP4_C3,		0x400002A8
//  0x4000 02A8  CCP4_C3   Bits-------------------------------------
	.EQU	CCP4_C3_CCPXCY15,		15
	.EQU	CCP4_C3_CCPXCY14,		14
	.EQU	CCP4_C3_CCPXCY13,		13
	.EQU	CCP4_C3_CCPXCY12,		12
	.EQU	CCP4_C3_CCPXCY11,		11
	.EQU	CCP4_C3_CCPXCY10,		10
	.EQU	CCP4_C3_CCPXCY9,		9
	.EQU	CCP4_C3_CCPXCY8,		8
	.EQU	CCP4_C3_CCPXCY7,		7
	.EQU	CCP4_C3_CCPXCY6,		6
	.EQU	CCP4_C3_CCPXCY5,		5
	.EQU	CCP4_C3_CCPXCY4,		4
	.EQU	CCP4_C3_CCPXCY3,		3
	.EQU	CCP4_C3_CCPXCY2,		2
	.EQU	CCP4_C3_CCPXCY1,		1
	.EQU	CCP4_C3_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP4_C4,		0x400002AC
//  0x4000 02AC  CCP4_C4   Bits-------------------------------------
	.EQU	CCP4_C4_CCPXCY15,		15
	.EQU	CCP4_C4_CCPXCY14,		14
	.EQU	CCP4_C4_CCPXCY13,		13
	.EQU	CCP4_C4_CCPXCY12,		12
	.EQU	CCP4_C4_CCPXCY11,		11
	.EQU	CCP4_C4_CCPXCY10,		10
	.EQU	CCP4_C4_CCPXCY9,		9
	.EQU	CCP4_C4_CCPXCY8,		8
	.EQU	CCP4_C4_CCPXCY7,		7
	.EQU	CCP4_C4_CCPXCY6,		6
	.EQU	CCP4_C4_CCPXCY5,		5
	.EQU	CCP4_C4_CCPXCY4,		4
	.EQU	CCP4_C4_CCPXCY3,		3
	.EQU	CCP4_C4_CCPXCY2,		2
	.EQU	CCP4_C4_CCPXCY1,		1
	.EQU	CCP4_C4_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP4_SRIC,		0x400002B0
//  0x4000 02B0  CCP4_SRIC   Bits-------------------------------------
	.EQU	CCP4_SRIC_TXIC,		6
	.EQU	CCP4_SRIC_TXUIC,		5
	.EQU	CCP4_SRIC_TXTIC,		4
	.EQU	CCP4_SRIC_CC4IC,		3
	.EQU	CCP4_SRIC_CC3IC,		2
	.EQU	CCP4_SRIC_CC2IC,		1
	.EQU	CCP4_SRIC_CC1IC,		0
//  register-------------------------------------
	.EQU	CCP4_DF,		0x400002B4
//  0x4000 02B4  CCP4_DF   Bits-------------------------------------
	.EQU	CCP4_DF_TXUDF,		5
	.EQU	CCP4_DF_TXTDF,		4
	.EQU	CCP4_DF_CC4DF,		3
	.EQU	CCP4_DF_CC3DF,		2
	.EQU	CCP4_DF_CC2DF,		1
	.EQU	CCP4_DF_CC1DF,		0
//  register-------------------------------------
	.EQU	CCP4_CTL1,		0x400002C0
//  0x4000 02C0  CCP4_CTL1   Bits-------------------------------------
	.EQU	CCP4_CTL1_CH4M3,		15
	.EQU	CCP4_CTL1_CH4M2,		14
	.EQU	CCP4_CTL1_CH4M1,		13
	.EQU	CCP4_CTL1_CH4M0,		12
	.EQU	CCP4_CTL1_CH3M3,		11
	.EQU	CCP4_CTL1_CH3M2,		10
	.EQU	CCP4_CTL1_CH3M1,		9
	.EQU	CCP4_CTL1_CH3M0,		8
	.EQU	CCP4_CTL1_CH2M3,		7
	.EQU	CCP4_CTL1_CH2M2,		6
	.EQU	CCP4_CTL1_CH2M1,		5
	.EQU	CCP4_CTL1_CH2M0,		4
	.EQU	CCP4_CTL1_CH1M3,		3
	.EQU	CCP4_CTL1_CH1M2,		2
	.EQU	CCP4_CTL1_CH1M1,		1
	.EQU	CCP4_CTL1_CH1M0,		0
//  register-------------------------------------
	.EQU	CCP4_R1,		0x400002C4
//  0x4000 02C4  CCP4_R1   Bits-------------------------------------
	.EQU	CCP4_R1_CCPXRY15,		15
	.EQU	CCP4_R1_CCPXRY14,		14
	.EQU	CCP4_R1_CCPXRY13,		13
	.EQU	CCP4_R1_CCPXRY12,		12
	.EQU	CCP4_R1_CCPXRY11,		11
	.EQU	CCP4_R1_CCPXRY10,		10
	.EQU	CCP4_R1_CCPXRY9,		9
	.EQU	CCP4_R1_CCPXRY8,		8
	.EQU	CCP4_R1_CCPXRY7,		7
	.EQU	CCP4_R1_CCPXRY6,		6
	.EQU	CCP4_R1_CCPXRY5,		5
	.EQU	CCP4_R1_CCPXRY4,		4
	.EQU	CCP4_R1_CCPXRY3,		3
	.EQU	CCP4_R1_CCPXRY2,		2
	.EQU	CCP4_R1_CCPXRY1,		1
	.EQU	CCP4_R1_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP4_R2,		0x400002C8
//  0x4000 02C8  CCP4_R2   Bits-------------------------------------
	.EQU	CCP4_R2_CCPXRY15,		15
	.EQU	CCP4_R2_CCPXRY14,		14
	.EQU	CCP4_R2_CCPXRY13,		13
	.EQU	CCP4_R2_CCPXRY12,		12
	.EQU	CCP4_R2_CCPXRY11,		11
	.EQU	CCP4_R2_CCPXRY10,		10
	.EQU	CCP4_R2_CCPXRY9,		9
	.EQU	CCP4_R2_CCPXRY8,		8
	.EQU	CCP4_R2_CCPXRY7,		7
	.EQU	CCP4_R2_CCPXRY6,		6
	.EQU	CCP4_R2_CCPXRY5,		5
	.EQU	CCP4_R2_CCPXRY4,		4
	.EQU	CCP4_R2_CCPXRY3,		3
	.EQU	CCP4_R2_CCPXRY2,		2
	.EQU	CCP4_R2_CCPXRY1,		1
	.EQU	CCP4_R2_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP4_R3,		0x400002CC
//  0x4000 02CC  CCP4_R3   Bits-------------------------------------
	.EQU	CCP4_R3_CCPXRY15,		15
	.EQU	CCP4_R3_CCPXRY14,		14
	.EQU	CCP4_R3_CCPXRY13,		13
	.EQU	CCP4_R3_CCPXRY12,		12
	.EQU	CCP4_R3_CCPXRY11,		11
	.EQU	CCP4_R3_CCPXRY10,		10
	.EQU	CCP4_R3_CCPXRY9,		9
	.EQU	CCP4_R3_CCPXRY8,		8
	.EQU	CCP4_R3_CCPXRY7,		7
	.EQU	CCP4_R3_CCPXRY6,		6
	.EQU	CCP4_R3_CCPXRY5,		5
	.EQU	CCP4_R3_CCPXRY4,		4
	.EQU	CCP4_R3_CCPXRY3,		3
	.EQU	CCP4_R3_CCPXRY2,		2
	.EQU	CCP4_R3_CCPXRY1,		1
	.EQU	CCP4_R3_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP4_R4,		0x400002D0
//  0x4000 02D0  CCP4_R4   Bits-------------------------------------
	.EQU	CCP4_R4_CCPXRY15,		15
	.EQU	CCP4_R4_CCPXRY14,		14
	.EQU	CCP4_R4_CCPXRY13,		13
	.EQU	CCP4_R4_CCPXRY12,		12
	.EQU	CCP4_R4_CCPXRY11,		11
	.EQU	CCP4_R4_CCPXRY10,		10
	.EQU	CCP4_R4_CCPXRY9,		9
	.EQU	CCP4_R4_CCPXRY8,		8
	.EQU	CCP4_R4_CCPXRY7,		7
	.EQU	CCP4_R4_CCPXRY6,		6
	.EQU	CCP4_R4_CCPXRY5,		5
	.EQU	CCP4_R4_CCPXRY4,		4
	.EQU	CCP4_R4_CCPXRY3,		3
	.EQU	CCP4_R4_CCPXRY2,		2
	.EQU	CCP4_R4_CCPXRY1,		1
	.EQU	CCP4_R4_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP4_CTL2,		0x400002D4
//  0x4000 02D4  CCP4_CTL2   Bits-------------------------------------
	.EQU	CCP4_CTL2_PXOC4CE,		15
	.EQU	CCP4_CTL2_PXOC3CE,		14
	.EQU	CCP4_CTL2_PXOC2CE,		13
	.EQU	CCP4_CTL2_PXOC1CE,		12
	.EQU	CCP4_CTL2_PXASS1,		11
	.EQU	CCP4_CTL2_PXASS0,		10
	.EQU	CCP4_CTL2_TCKSEL1,		9
	.EQU	CCP4_CTL2_TCKSEL0,		8
	.EQU	CCP4_CTL2_PXOC4_1,		7
	.EQU	CCP4_CTL2_PXOC4_0,		6
	.EQU	CCP4_CTL2_PXOC3_1,		5
	.EQU	CCP4_CTL2_PXOC3_0,		4
	.EQU	CCP4_CTL2_PXOC2_1,		3
	.EQU	CCP4_CTL2_PXOC2_0,		2
	.EQU	CCP4_CTL2_PXOC1_1,		1
	.EQU	CCP4_CTL2_PXOC1_0,		0
//  register-------------------------------------
	.EQU	CCP4_CTL3,		0x400002D8
//  0x4000 02D8  CCP4_CTL3   Bits-------------------------------------
	.EQU	CCP4_CTL3_PXSPMST,		15
	.EQU	CCP4_CTL3_PXPWMI,		14
	.EQU	CCP4_CTL3_PXXORM,		13
	.EQU	CCP4_CTL3_PXSPM,		12
	.EQU	CCP4_CTL3_TXTDE,		11
	.EQU	CCP4_CTL3_CC4DE,		10
	.EQU	CCP4_CTL3_CC3DE,		9
	.EQU	CCP4_CTL3_CC2DE,		8
	.EQU	CCP4_CTL3_CC1DE,		7
	.EQU	CCP4_CTL3_TXUDE,		6
	.EQU	CCP4_CTL3_TXUIE,		5
	.EQU	CCP4_CTL3_TXTIE,		4
	.EQU	CCP4_CTL3_CC4IE,		3
	.EQU	CCP4_CTL3_CC3IE,		2
	.EQU	CCP4_CTL3_CC2IE,		1
	.EQU	CCP4_CTL3_CC1IE,		0
//  register-------------------------------------
	.EQU	CCP4_EGIF,		0x400002DC
//  0x4000 02DC  CCP4_EGIF   Bits-------------------------------------
	.EQU	CCP4_EGIF_POSSEL,		13
	.EQU	CCP4_EGIF_PXSEL,		12
	.EQU	CCP4_EGIF_TXUIF,		11
	.EQU	CCP4_EGIF_TXTIF,		10
	.EQU	CCP4_EGIF_CC4IF,		9
	.EQU	CCP4_EGIF_CC3IF,		8
	.EQU	CCP4_EGIF_CC2IF,		7
	.EQU	CCP4_EGIF_CC1IF,		6
	.EQU	CCP4_EGIF_TXTRG,		5
	.EQU	CCP4_EGIF_CC4G,		4
	.EQU	CCP4_EGIF_CC3G,		3
	.EQU	CCP4_EGIF_CC2G,		2
	.EQU	CCP4_EGIF_CC1G,		1
	.EQU	CCP4_EGIF_UARTRXEN,		0
//  register-------------------------------------
	.EQU	CCP5_C1,		0x400003A0
//  0x4000 03A0  CCP5_C1   Bits-------------------------------------
	.EQU	CCP5_C1_CCPXCY15,		15
	.EQU	CCP5_C1_CCPXCY14,		14
	.EQU	CCP5_C1_CCPXCY13,		13
	.EQU	CCP5_C1_CCPXCY12,		12
	.EQU	CCP5_C1_CCPXCY11,		11
	.EQU	CCP5_C1_CCPXCY10,		10
	.EQU	CCP5_C1_CCPXCY9,		9
	.EQU	CCP5_C1_CCPXCY8,		8
	.EQU	CCP5_C1_CCPXCY7,		7
	.EQU	CCP5_C1_CCPXCY6,		6
	.EQU	CCP5_C1_CCPXCY5,		5
	.EQU	CCP5_C1_CCPXCY4,		4
	.EQU	CCP5_C1_CCPXCY3,		3
	.EQU	CCP5_C1_CCPXCY2,		2
	.EQU	CCP5_C1_CCPXCY1,		1
	.EQU	CCP5_C1_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP5_C2,		0x400003A4
//  0x4000 03A4  CCP5_C2   Bits-------------------------------------
	.EQU	CCP5_C2_CCPXCY15,		15
	.EQU	CCP5_C2_CCPXCY14,		14
	.EQU	CCP5_C2_CCPXCY13,		13
	.EQU	CCP5_C2_CCPXCY12,		12
	.EQU	CCP5_C2_CCPXCY11,		11
	.EQU	CCP5_C2_CCPXCY10,		10
	.EQU	CCP5_C2_CCPXCY9,		9
	.EQU	CCP5_C2_CCPXCY8,		8
	.EQU	CCP5_C2_CCPXCY7,		7
	.EQU	CCP5_C2_CCPXCY6,		6
	.EQU	CCP5_C2_CCPXCY5,		5
	.EQU	CCP5_C2_CCPXCY4,		4
	.EQU	CCP5_C2_CCPXCY3,		3
	.EQU	CCP5_C2_CCPXCY2,		2
	.EQU	CCP5_C2_CCPXCY1,		1
	.EQU	CCP5_C2_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP5_C3,		0x400003A8
//  0x4000 03A8  CCP5_C3   Bits-------------------------------------
	.EQU	CCP5_C3_CCPXCY15,		15
	.EQU	CCP5_C3_CCPXCY14,		14
	.EQU	CCP5_C3_CCPXCY13,		13
	.EQU	CCP5_C3_CCPXCY12,		12
	.EQU	CCP5_C3_CCPXCY11,		11
	.EQU	CCP5_C3_CCPXCY10,		10
	.EQU	CCP5_C3_CCPXCY9,		9
	.EQU	CCP5_C3_CCPXCY8,		8
	.EQU	CCP5_C3_CCPXCY7,		7
	.EQU	CCP5_C3_CCPXCY6,		6
	.EQU	CCP5_C3_CCPXCY5,		5
	.EQU	CCP5_C3_CCPXCY4,		4
	.EQU	CCP5_C3_CCPXCY3,		3
	.EQU	CCP5_C3_CCPXCY2,		2
	.EQU	CCP5_C3_CCPXCY1,		1
	.EQU	CCP5_C3_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP5_C4,		0x400003AC
//  0x4000 03AC  CCP5_C4   Bits-------------------------------------
	.EQU	CCP5_C4_CCPXCY15,		15
	.EQU	CCP5_C4_CCPXCY14,		14
	.EQU	CCP5_C4_CCPXCY13,		13
	.EQU	CCP5_C4_CCPXCY12,		12
	.EQU	CCP5_C4_CCPXCY11,		11
	.EQU	CCP5_C4_CCPXCY10,		10
	.EQU	CCP5_C4_CCPXCY9,		9
	.EQU	CCP5_C4_CCPXCY8,		8
	.EQU	CCP5_C4_CCPXCY7,		7
	.EQU	CCP5_C4_CCPXCY6,		6
	.EQU	CCP5_C4_CCPXCY5,		5
	.EQU	CCP5_C4_CCPXCY4,		4
	.EQU	CCP5_C4_CCPXCY3,		3
	.EQU	CCP5_C4_CCPXCY2,		2
	.EQU	CCP5_C4_CCPXCY1,		1
	.EQU	CCP5_C4_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP5_SRIC,		0x400003B0
//  0x4000 03B0  CCP5_SRIC   Bits-------------------------------------
	.EQU	CCP5_SRIC_TXIC,		6
	.EQU	CCP5_SRIC_TXUIC,		5
	.EQU	CCP5_SRIC_TXTIC,		4
	.EQU	CCP5_SRIC_CC4IC,		3
	.EQU	CCP5_SRIC_CC3IC,		2
	.EQU	CCP5_SRIC_CC2IC,		1
	.EQU	CCP5_SRIC_CC1IC,		0
//  register-------------------------------------
	.EQU	CCP5_DF,		0x400003B4
//  0x4000 03B4  CCP5_DF   Bits-------------------------------------
	.EQU	CCP5_DF_TXUDF,		5
	.EQU	CCP5_DF_TXTDF,		4
	.EQU	CCP5_DF_CC4DF,		3
	.EQU	CCP5_DF_CC3DF,		2
	.EQU	CCP5_DF_CC2DF,		1
	.EQU	CCP5_DF_CC1DF,		0
//  register-------------------------------------
	.EQU	CCP5_CTL1,		0x400003C0
//  0x4000 03C0  CCP5_CTL1   Bits-------------------------------------
	.EQU	CCP5_CTL1_CH4M3,		15
	.EQU	CCP5_CTL1_CH4M2,		14
	.EQU	CCP5_CTL1_CH4M1,		13
	.EQU	CCP5_CTL1_CH4M0,		12
	.EQU	CCP5_CTL1_CH3M3,		11
	.EQU	CCP5_CTL1_CH3M2,		10
	.EQU	CCP5_CTL1_CH3M1,		9
	.EQU	CCP5_CTL1_CH3M0,		8
	.EQU	CCP5_CTL1_CH2M3,		7
	.EQU	CCP5_CTL1_CH2M2,		6
	.EQU	CCP5_CTL1_CH2M1,		5
	.EQU	CCP5_CTL1_CH2M0,		4
	.EQU	CCP5_CTL1_CH1M3,		3
	.EQU	CCP5_CTL1_CH1M2,		2
	.EQU	CCP5_CTL1_CH1M1,		1
	.EQU	CCP5_CTL1_CH1M0,		0
//  register-------------------------------------
	.EQU	CCP5_R1,		0x400003C4
//  0x4000 03C4  CCP5_R1   Bits-------------------------------------
	.EQU	CCP5_R1_CCPXRY15,		15
	.EQU	CCP5_R1_CCPXRY14,		14
	.EQU	CCP5_R1_CCPXRY13,		13
	.EQU	CCP5_R1_CCPXRY12,		12
	.EQU	CCP5_R1_CCPXRY11,		11
	.EQU	CCP5_R1_CCPXRY10,		10
	.EQU	CCP5_R1_CCPXRY9,		9
	.EQU	CCP5_R1_CCPXRY8,		8
	.EQU	CCP5_R1_CCPXRY7,		7
	.EQU	CCP5_R1_CCPXRY6,		6
	.EQU	CCP5_R1_CCPXRY5,		5
	.EQU	CCP5_R1_CCPXRY4,		4
	.EQU	CCP5_R1_CCPXRY3,		3
	.EQU	CCP5_R1_CCPXRY2,		2
	.EQU	CCP5_R1_CCPXRY1,		1
	.EQU	CCP5_R1_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP5_R2,		0x400003C8
//  0x4000 03C8  CCP5_R2   Bits-------------------------------------
	.EQU	CCP5_R2_CCPXRY15,		15
	.EQU	CCP5_R2_CCPXRY14,		14
	.EQU	CCP5_R2_CCPXRY13,		13
	.EQU	CCP5_R2_CCPXRY12,		12
	.EQU	CCP5_R2_CCPXRY11,		11
	.EQU	CCP5_R2_CCPXRY10,		10
	.EQU	CCP5_R2_CCPXRY9,		9
	.EQU	CCP5_R2_CCPXRY8,		8
	.EQU	CCP5_R2_CCPXRY7,		7
	.EQU	CCP5_R2_CCPXRY6,		6
	.EQU	CCP5_R2_CCPXRY5,		5
	.EQU	CCP5_R2_CCPXRY4,		4
	.EQU	CCP5_R2_CCPXRY3,		3
	.EQU	CCP5_R2_CCPXRY2,		2
	.EQU	CCP5_R2_CCPXRY1,		1
	.EQU	CCP5_R2_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP5_R3,		0x400003CC
//  0x4000 03CC  CCP5_R3   Bits-------------------------------------
	.EQU	CCP5_R3_CCPXRY15,		15
	.EQU	CCP5_R3_CCPXRY14,		14
	.EQU	CCP5_R3_CCPXRY13,		13
	.EQU	CCP5_R3_CCPXRY12,		12
	.EQU	CCP5_R3_CCPXRY11,		11
	.EQU	CCP5_R3_CCPXRY10,		10
	.EQU	CCP5_R3_CCPXRY9,		9
	.EQU	CCP5_R3_CCPXRY8,		8
	.EQU	CCP5_R3_CCPXRY7,		7
	.EQU	CCP5_R3_CCPXRY6,		6
	.EQU	CCP5_R3_CCPXRY5,		5
	.EQU	CCP5_R3_CCPXRY4,		4
	.EQU	CCP5_R3_CCPXRY3,		3
	.EQU	CCP5_R3_CCPXRY2,		2
	.EQU	CCP5_R3_CCPXRY1,		1
	.EQU	CCP5_R3_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP5_R4,		0x400003D0
//  0x4000 03D0  CCP5_R4   Bits-------------------------------------
	.EQU	CCP5_R4_CCPXRY15,		15
	.EQU	CCP5_R4_CCPXRY14,		14
	.EQU	CCP5_R4_CCPXRY13,		13
	.EQU	CCP5_R4_CCPXRY12,		12
	.EQU	CCP5_R4_CCPXRY11,		11
	.EQU	CCP5_R4_CCPXRY10,		10
	.EQU	CCP5_R4_CCPXRY9,		9
	.EQU	CCP5_R4_CCPXRY8,		8
	.EQU	CCP5_R4_CCPXRY7,		7
	.EQU	CCP5_R4_CCPXRY6,		6
	.EQU	CCP5_R4_CCPXRY5,		5
	.EQU	CCP5_R4_CCPXRY4,		4
	.EQU	CCP5_R4_CCPXRY3,		3
	.EQU	CCP5_R4_CCPXRY2,		2
	.EQU	CCP5_R4_CCPXRY1,		1
	.EQU	CCP5_R4_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP5_CTL2,		0x400003D4
//  0x4000 03D4  CCP5_CTL2   Bits-------------------------------------
	.EQU	CCP5_CTL2_PXOC4CE,		15
	.EQU	CCP5_CTL2_PXOC3CE,		14
	.EQU	CCP5_CTL2_PXOC2CE,		13
	.EQU	CCP5_CTL2_PXOC1CE,		12
	.EQU	CCP5_CTL2_TCKSEL1,		9
	.EQU	CCP5_CTL2_TCKSEL0,		8
	.EQU	CCP5_CTL2_PXOC4_1,		7
	.EQU	CCP5_CTL2_PXOC4_0,		6
	.EQU	CCP5_CTL2_PXOC3_1,		5
	.EQU	CCP5_CTL2_PXOC3_0,		4
	.EQU	CCP5_CTL2_PXOC2_1,		3
	.EQU	CCP5_CTL2_PXOC2_0,		2
	.EQU	CCP5_CTL2_PXOC1_1,		1
	.EQU	CCP5_CTL2_PXOC1_0,		0
//  register-------------------------------------
	.EQU	CCP5_CTL3,		0x400003D8
//  0x4000 03D8  CCP5_CTL3   Bits-------------------------------------
	.EQU	CCP5_CTL3_PXSPMST,		15
	.EQU	CCP5_CTL3_PXPWMI,		14
	.EQU	CCP5_CTL3_PXXORM,		13
	.EQU	CCP5_CTL3_PXSPM,		12
	.EQU	CCP5_CTL3_TXTDE,		11
	.EQU	CCP5_CTL3_CC4DE,		10
	.EQU	CCP5_CTL3_CC3DE,		9
	.EQU	CCP5_CTL3_CC2DE,		8
	.EQU	CCP5_CTL3_CC1DE,		7
	.EQU	CCP5_CTL3_TXUDE,		6
	.EQU	CCP5_CTL3_TXUIE,		5
	.EQU	CCP5_CTL3_TXTIE,		4
	.EQU	CCP5_CTL3_CC4IE,		3
	.EQU	CCP5_CTL3_CC3IE,		2
	.EQU	CCP5_CTL3_CC2IE,		1
	.EQU	CCP5_CTL3_CC1IE,		0
//  register-------------------------------------
	.EQU	CCP5_EGIF,		0x400003DC
//  0x4000 03DC  CCP5_EGIF   Bits-------------------------------------
	.EQU	CCP5_EGIF_POSSEL,		13
	.EQU	CCP5_EGIF_PXSEL,		12
	.EQU	CCP5_EGIF_TXUIF,		11
	.EQU	CCP5_EGIF_TXTIF,		10
	.EQU	CCP5_EGIF_CC4IF,		9
	.EQU	CCP5_EGIF_CC3IF,		8
	.EQU	CCP5_EGIF_CC2IF,		7
	.EQU	CCP5_EGIF_CC1IF,		6
	.EQU	CCP5_EGIF_TXTRG,		5
	.EQU	CCP5_EGIF_CC4G,		4
	.EQU	CCP5_EGIF_CC3G,		3
	.EQU	CCP5_EGIF_CC2G,		2
	.EQU	CCP5_EGIF_CC1G,		1
	.EQU	CCP5_EGIF_UARTRXEN,		0
//  register-------------------------------------
	.EQU	T11_CNT,		0x40000900
//  0x4000 0900  T11_CNT   Bits-------------------------------------
	.EQU	T11_CNT_TXCNT31,		31
	.EQU	T11_CNT_TXCNT30,		30
	.EQU	T11_CNT_TXCNT29,		29
	.EQU	T11_CNT_TXCNT28,		28
	.EQU	T11_CNT_TXCNT27,		27
	.EQU	T11_CNT_TXCNT26,		26
	.EQU	T11_CNT_TXCNT25,		25
	.EQU	T11_CNT_TXCNT24,		24
	.EQU	T11_CNT_TXCNT23,		23
	.EQU	T11_CNT_TXCNT22,		22
	.EQU	T11_CNT_TXCNT21,		21
	.EQU	T11_CNT_TXCNT20,		20
	.EQU	T11_CNT_TXCNT19,		19
	.EQU	T11_CNT_TXCNT18,		18
	.EQU	T11_CNT_TXCNT17,		17
	.EQU	T11_CNT_TXCNT16,		16
	.EQU	T11_CNT_TXCNT15,		15
	.EQU	T11_CNT_TXCNT14,		14
	.EQU	T11_CNT_TXCNT13,		13
	.EQU	T11_CNT_TXCNT12,		12
	.EQU	T11_CNT_TXCNT11,		11
	.EQU	T11_CNT_TXCNT10,		10
	.EQU	T11_CNT_TXCNT9,		9
	.EQU	T11_CNT_TXCNT8,		8
	.EQU	T11_CNT_TXCNT7,		7
	.EQU	T11_CNT_TXCNT6,		6
	.EQU	T11_CNT_TXCNT5,		5
	.EQU	T11_CNT_TXCNT4,		4
	.EQU	T11_CNT_TXCNT3,		3
	.EQU	T11_CNT_TXCNT2,		2
	.EQU	T11_CNT_TXCNT1,		1
	.EQU	T11_CNT_TXCNT0,		0
//  register-------------------------------------
	.EQU	T11_PHS,		0x40000904
//  0x4000 0904  T11_PHS   Bits-------------------------------------
	.EQU	T11_PHS_TXPHS31,		31
	.EQU	T11_PHS_TXPHS30,		30
	.EQU	T11_PHS_TXPHS29,		29
	.EQU	T11_PHS_TXPHS28,		28
	.EQU	T11_PHS_TXPHS27,		27
	.EQU	T11_PHS_TXPHS26,		26
	.EQU	T11_PHS_TXPHS25,		25
	.EQU	T11_PHS_TXPHS24,		24
	.EQU	T11_PHS_TXPHS23,		23
	.EQU	T11_PHS_TXPHS22,		22
	.EQU	T11_PHS_TXPHS21,		21
	.EQU	T11_PHS_TXPHS20,		20
	.EQU	T11_PHS_TXPHS19,		19
	.EQU	T11_PHS_TXPHS18,		18
	.EQU	T11_PHS_TXPHS17,		17
	.EQU	T11_PHS_TXPHS16,		16
	.EQU	T11_PHS_TXPHS15,		15
	.EQU	T11_PHS_TXPHS14,		14
	.EQU	T11_PHS_TXPHS13,		13
	.EQU	T11_PHS_TXPHS12,		12
	.EQU	T11_PHS_TXPHS11,		11
	.EQU	T11_PHS_TXPHS10,		10
	.EQU	T11_PHS_TXPHS9,		9
	.EQU	T11_PHS_TXPHS8,		8
	.EQU	T11_PHS_TXPHS7,		7
	.EQU	T11_PHS_TXPHS6,		6
	.EQU	T11_PHS_TXPHS5,		5
	.EQU	T11_PHS_TXPHS4,		4
	.EQU	T11_PHS_TXPHS3,		3
	.EQU	T11_PHS_TXPHS2,		2
	.EQU	T11_PHS_TXPHS1,		1
	.EQU	T11_PHS_TXPHS0,		0
//  register-------------------------------------
	.EQU	T11_PPX,		0x40000908
//  0x4000 0908  T11_PPX   Bits-------------------------------------
	.EQU	T11_PPX_PPX31,		31
	.EQU	T11_PPX_PPX30,		30
	.EQU	T11_PPX_PPX29,		29
	.EQU	T11_PPX_PPX28,		28
	.EQU	T11_PPX_PPX27,		27
	.EQU	T11_PPX_PPX26,		26
	.EQU	T11_PPX_PPX25,		25
	.EQU	T11_PPX_PPX24,		24
	.EQU	T11_PPX_PPX23,		23
	.EQU	T11_PPX_PPX22,		22
	.EQU	T11_PPX_PPX21,		21
	.EQU	T11_PPX_PPX20,		20
	.EQU	T11_PPX_PPX19,		19
	.EQU	T11_PPX_PPX18,		18
	.EQU	T11_PPX_PPX17,		17
	.EQU	T11_PPX_PPX16,		16
	.EQU	T11_PPX_PPX15,		15
	.EQU	T11_PPX_PPX14,		14
	.EQU	T11_PPX_PPX13,		13
	.EQU	T11_PPX_PPX12,		12
	.EQU	T11_PPX_PPX11,		11
	.EQU	T11_PPX_PPX10,		10
	.EQU	T11_PPX_PPX9,		9
	.EQU	T11_PPX_PPX8,		8
	.EQU	T11_PPX_PPX7,		7
	.EQU	T11_PPX_PPX6,		6
	.EQU	T11_PPX_PPX5,		5
	.EQU	T11_PPX_PPX4,		4
	.EQU	T11_PPX_PPX3,		3
	.EQU	T11_PPX_PPX2,		2
	.EQU	T11_PPX_PPX1,		1
	.EQU	T11_PPX_PPX0,		0
//  register-------------------------------------
	.EQU	T11_PRSC,		0x4000090C
//  0x4000 090C  T11_PRSC   Bits-------------------------------------
	.EQU	T11_PRSC_TXPRSC31,		31
	.EQU	T11_PRSC_TXPRSC30,		30
	.EQU	T11_PRSC_TXPRSC29,		29
	.EQU	T11_PRSC_TXPRSC28,		28
	.EQU	T11_PRSC_TXPRSC27,		27
	.EQU	T11_PRSC_TXPRSC26,		26
	.EQU	T11_PRSC_TXPRSC25,		25
	.EQU	T11_PRSC_TXPRSC24,		24
	.EQU	T11_PRSC_TXPRSC23,		23
	.EQU	T11_PRSC_TXPRSC22,		22
	.EQU	T11_PRSC_TXPRSC21,		21
	.EQU	T11_PRSC_TXPRSC20,		20
	.EQU	T11_PRSC_TXPRSC19,		19
	.EQU	T11_PRSC_TXPRSC18,		18
	.EQU	T11_PRSC_TXPRSC17,		17
	.EQU	T11_PRSC_TXPRSC16,		16
	.EQU	T11_PRSC_TXPRSC15,		15
	.EQU	T11_PRSC_TXPRSC14,		14
	.EQU	T11_PRSC_TXPRSC13,		13
	.EQU	T11_PRSC_TXPRSC12,		12
	.EQU	T11_PRSC_TXPRSC11,		11
	.EQU	T11_PRSC_TXPRSC10,		10
	.EQU	T11_PRSC_TXPRSC9,		9
	.EQU	T11_PRSC_TXPRSC8,		8
	.EQU	T11_PRSC_TXPRSC7,		7
	.EQU	T11_PRSC_TXPRSC6,		6
	.EQU	T11_PRSC_TXPRSC5,		5
	.EQU	T11_PRSC_TXPRSC4,		4
	.EQU	T11_PRSC_TXPRSC3,		3
	.EQU	T11_PRSC_TXPRSC2,		2
	.EQU	T11_PRSC_TXPRSC1,		1
	.EQU	T11_PRSC_TXPRSC0,		0
//  register-------------------------------------
	.EQU	T11_CTL,		0x40000910
//  0x4000 0910  T11_CTL   Bits-------------------------------------
	.EQU	T11_CTL_BLINKEN,		31
	.EQU	T11_CTL_UDSYNEN,		29
	.EQU	T11_CTL_ETLOCK,		27
	.EQU	T11_CTL_DBLOCK,		25
	.EQU	T11_CTL_AQLOCKB,		24
	.EQU	T11_CTL_AQLOCKA,		23
	.EQU	T11_CTL_CAPEN,		22
	.EQU	T11_CTL_CAPSEL,		21
	.EQU	T11_CTL_TXMAX,		19
	.EQU	T11_CTL_PHSDIR,		18
	.EQU	T11_CTL_SWFSYNC,		17
	.EQU	T11_CTL_SYNCOSEL1,		16
	.EQU	T11_CTL_SYNCOSEL0,		15
	.EQU	T11_CTL_PHSEN,		14
	.EQU	T11_CTL_SYNCI,		13
	.EQU	T11_CTL_TXUR,		12
	.EQU	T11_CTL_TXUDEVT,		11
	.EQU	T11_CTL_TXUDEN,		10
	.EQU	T11_CTL_TXCMS2,		9
	.EQU	T11_CTL_TXCMS1,		8
	.EQU	T11_CTL_TXCMS0,		7
	.EQU	T11_CTL_TXDIR,		6
	.EQU	T11_CTL_TXCLK1,		5
	.EQU	T11_CTL_TXCLK0,		4
	.EQU	T11_CTL_TXSY,		3
	.EQU	T11_CTL_TXGATE,		2
	.EQU	T11_CTL_TXCS,		1
	.EQU	T11_CTL_TXEN,		0
//  register-------------------------------------
	.EQU	EPWM11_RA,		0x40000914
//  0x4000 0914  EPWM11_RA   Bits-------------------------------------
	.EQU	EPWM11_RA_EPWMRA31,		31
	.EQU	EPWM11_RA_EPWMRA30,		30
	.EQU	EPWM11_RA_EPWMRA29,		29
	.EQU	EPWM11_RA_EPWMRA28,		28
	.EQU	EPWM11_RA_EPWMRA27,		27
	.EQU	EPWM11_RA_EPWMRA26,		26
	.EQU	EPWM11_RA_EPWMRA25,		25
	.EQU	EPWM11_RA_EPWMRA24,		24
	.EQU	EPWM11_RA_EPWMRA23,		23
	.EQU	EPWM11_RA_EPWMRA22,		22
	.EQU	EPWM11_RA_EPWMRA21,		21
	.EQU	EPWM11_RA_EPWMRA20,		20
	.EQU	EPWM11_RA_EPWMRA19,		19
	.EQU	EPWM11_RA_EPWMRA18,		18
	.EQU	EPWM11_RA_EPWMRA17,		17
	.EQU	EPWM11_RA_EPWMRA16,		16
	.EQU	EPWM11_RA_EPWMRA15,		15
	.EQU	EPWM11_RA_EPWMRA14,		14
	.EQU	EPWM11_RA_EPWMRA13,		13
	.EQU	EPWM11_RA_EPWMRA12,		12
	.EQU	EPWM11_RA_EPWMRA11,		11
	.EQU	EPWM11_RA_EPWMRA10,		10
	.EQU	EPWM11_RA_EPWMRA9,		9
	.EQU	EPWM11_RA_EPWMRA8,		8
	.EQU	EPWM11_RA_EPWMRA7,		7
	.EQU	EPWM11_RA_EPWMRA6,		6
	.EQU	EPWM11_RA_EPWMRA5,		5
	.EQU	EPWM11_RA_EPWMRA4,		4
	.EQU	EPWM11_RA_EPWMRA3,		3
	.EQU	EPWM11_RA_EPWMRA2,		2
	.EQU	EPWM11_RA_EPWMRA1,		1
	.EQU	EPWM11_RA_EPWMRA0,		0
//  register-------------------------------------
	.EQU	EPWM11_RB,		0x40000918
//  0x4000 0918  EPWM11_RB   Bits-------------------------------------
	.EQU	EPWM11_RB_EPWMRB31,		31
	.EQU	EPWM11_RB_EPWMRB30,		30
	.EQU	EPWM11_RB_EPWMRB29,		29
	.EQU	EPWM11_RB_EPWMRB28,		28
	.EQU	EPWM11_RB_EPWMRB27,		27
	.EQU	EPWM11_RB_EPWMRB26,		26
	.EQU	EPWM11_RB_EPWMRB25,		25
	.EQU	EPWM11_RB_EPWMRB24,		24
	.EQU	EPWM11_RB_EPWMRB23,		23
	.EQU	EPWM11_RB_EPWMRB22,		22
	.EQU	EPWM11_RB_EPWMRB21,		21
	.EQU	EPWM11_RB_EPWMRB20,		20
	.EQU	EPWM11_RB_EPWMRB19,		19
	.EQU	EPWM11_RB_EPWMRB18,		18
	.EQU	EPWM11_RB_EPWMRB17,		17
	.EQU	EPWM11_RB_EPWMRB16,		16
	.EQU	EPWM11_RB_EPWMRB15,		15
	.EQU	EPWM11_RB_EPWMRB14,		14
	.EQU	EPWM11_RB_EPWMRB13,		13
	.EQU	EPWM11_RB_EPWMRB12,		12
	.EQU	EPWM11_RB_EPWMRB11,		11
	.EQU	EPWM11_RB_EPWMRB10,		10
	.EQU	EPWM11_RB_EPWMRB9,		9
	.EQU	EPWM11_RB_EPWMRB8,		8
	.EQU	EPWM11_RB_EPWMRB7,		7
	.EQU	EPWM11_RB_EPWMRB6,		6
	.EQU	EPWM11_RB_EPWMRB5,		5
	.EQU	EPWM11_RB_EPWMRB4,		4
	.EQU	EPWM11_RB_EPWMRB3,		3
	.EQU	EPWM11_RB_EPWMRB2,		2
	.EQU	EPWM11_RB_EPWMRB1,		1
	.EQU	EPWM11_RB_EPWMRB0,		0
//  register-------------------------------------
	.EQU	EPWM11_CTLA,	0x4000091C
//  0x4000 091C  EPWM11_CTLA   Bits-------------------------------------
	.EQU	EPWM11_CTLA_OTSFA,		16
	.EQU	EPWM11_CTLA_ACTSFA1,		15
	.EQU	EPWM11_CTLA_ACTSFA0,		14
	.EQU	EPWM11_CTLA_CSFA1,		13
	.EQU	EPWM11_CTLA_CSFA0,		12
	.EQU	EPWM11_CTLA_ACBD1,		11
	.EQU	EPWM11_CTLA_ACBD0,		10
	.EQU	EPWM11_CTLA_ACBU1,		9
	.EQU	EPWM11_CTLA_ACBU0,		8
	.EQU	EPWM11_CTLA_ACAD1,		7
	.EQU	EPWM11_CTLA_ACAD0,		6
	.EQU	EPWM11_CTLA_ACAU1,		5
	.EQU	EPWM11_CTLA_ACAU0,		4
	.EQU	EPWM11_CTLA_APRD1,		3
	.EQU	EPWM11_CTLA_APRD0,		2
	.EQU	EPWM11_CTLA_AZRO1,		1
	.EQU	EPWM11_CTLA_AZRO0,		0
//  register-------------------------------------
	.EQU	EPWM11_CTLB,	0x40000920
//  0x4000 0920  EPWM11_CTLB   Bits-------------------------------------
	.EQU	EPWM11_CTLB_OTSFB,		16
	.EQU	EPWM11_CTLB_ACTSFB1,		15
	.EQU	EPWM11_CTLB_ACTSFB0,		14
	.EQU	EPWM11_CTLB_CSFB1,		13
	.EQU	EPWM11_CTLB_CSFB0,		12
	.EQU	EPWM11_CTLB_BCBD1,		11
	.EQU	EPWM11_CTLB_BCBD0,		10
	.EQU	EPWM11_CTLB_BCBU1,		9
	.EQU	EPWM11_CTLB_BCBU0,		8
	.EQU	EPWM11_CTLB_BCAD1,		7
	.EQU	EPWM11_CTLB_BCAD0,		6
	.EQU	EPWM11_CTLB_BCAU1,		5
	.EQU	EPWM11_CTLB_BCAU0,		4
	.EQU	EPWM11_CTLB_BPRD1,		3
	.EQU	EPWM11_CTLB_BPRD0,		2
	.EQU	EPWM11_CTLB_BZRO1,		1
	.EQU	EPWM11_CTLB_BZRO0,		0
//  register-------------------------------------
	.EQU	EPWM11_DBCTL,	0x40000924
//  0x4000 0924  EPWM11_DBCTL   Bits-------------------------------------
	.EQU	EPWM11_DBCTL_INMODE1,		5
	.EQU	EPWM11_DBCTL_INMODE0,		4
	.EQU	EPWM11_DBCTL_POLSEL1,		3
	.EQU	EPWM11_DBCTL_POLSEL0,		2
	.EQU	EPWM11_DBCTL_OUTMODE1,		1
	.EQU	EPWM11_DBCTL_OUTMODE0,		0
//  register-------------------------------------
	.EQU	EPWM11_DBT,	0x40000928
//  0x4000 0928  EPWM11_DBT   Bits-------------------------------------
	.EQU	EPWM11_DBT_RDBT15,		31
	.EQU	EPWM11_DBT_RDBT14,		30
	.EQU	EPWM11_DBT_RDBT13,		29
	.EQU	EPWM11_DBT_RDBT12,		28
	.EQU	EPWM11_DBT_RDBT11,		27
	.EQU	EPWM11_DBT_RDBT10,		26
	.EQU	EPWM11_DBT_RDBT9,		25
	.EQU	EPWM11_DBT_RDBT8,		24
	.EQU	EPWM11_DBT_RDBT7,		23
	.EQU	EPWM11_DBT_RDBT6,		22
	.EQU	EPWM11_DBT_RDBT5,		21
	.EQU	EPWM11_DBT_RDBT4,		20
	.EQU	EPWM11_DBT_RDBT3,		19
	.EQU	EPWM11_DBT_RDBT2,		18
	.EQU	EPWM11_DBT_RDBT1,		17
	.EQU	EPWM11_DBT_RDBT0,		16
	.EQU	EPWM11_DBT_FDBT15,		15
	.EQU	EPWM11_DBT_FDBT14,		14
	.EQU	EPWM11_DBT_FDBT13,		13
	.EQU	EPWM11_DBT_FDBT12,		12
	.EQU	EPWM11_DBT_FDBT11,		11
	.EQU	EPWM11_DBT_FDBT10,		10
	.EQU	EPWM11_DBT_FDBT9,		9
	.EQU	EPWM11_DBT_FDBT8,		8
	.EQU	EPWM11_DBT_FDBT7,		7
	.EQU	EPWM11_DBT_FDBT6,		6
	.EQU	EPWM11_DBT_FDBT5,		5
	.EQU	EPWM11_DBT_FDBT4,		4
	.EQU	EPWM11_DBT_FDBT3,		3
	.EQU	EPWM11_DBT_FDBT2,		2
	.EQU	EPWM11_DBT_FDBT1,		1
	.EQU	EPWM11_DBT_FDBT0,		0
//  register-------------------------------------
	.EQU	EPWM11_PCCTL,	0x4000092C
//  0x4000 092C  EPWM11_PCCTL   Bits-------------------------------------
	.EQU	EPWM11_PCCTL_CHPFREQ2,		10
	.EQU	EPWM11_PCCTL_CHPFREQ1,		9
	.EQU	EPWM11_PCCTL_CHPFREQ0,		8
	.EQU	EPWM11_PCCTL_CHPDUTY2,		7
	.EQU	EPWM11_PCCTL_CHPDUTY1,		6
	.EQU	EPWM11_PCCTL_CHPDUTY0,		5
	.EQU	EPWM11_PCCTL_OSHTWTH3,		4
	.EQU	EPWM11_PCCTL_OSHTWTH2,		3
	.EQU	EPWM11_PCCTL_OSHTWTH1,		2
	.EQU	EPWM11_PCCTL_OSHTWTH0,		1
	.EQU	EPWM11_PCCTL_CHPEN,		0
//  register-------------------------------------
	.EQU	EPWM11_PXASCTL,	0x40000930
//  0x4000 0930  EPWM11_PXASCTL   Bits-------------------------------------
	.EQU	EPWM11_PXASCTL_PXAVNEG,		10
	.EQU	EPWM11_PXASCTL_PXASE,		9
	.EQU	EPWM11_PXASCTL_PXRSEN,		8
	.EQU	EPWM11_PXASCTL_PXSSA1,		7
	.EQU	EPWM11_PXASCTL_PXSSA0,		6
	.EQU	EPWM11_PXASCTL_PXSSB1,		5
	.EQU	EPWM11_PXASCTL_PXSSB0,		4
	.EQU	EPWM11_PXASCTL_PXASS3,		3
	.EQU	EPWM11_PXASCTL_PXASS2,		2
	.EQU	EPWM11_PXASCTL_PXASS1,		1
	.EQU	EPWM11_PXASCTL_PXASS0,		0
//  register-------------------------------------
	.EQU	EPWM11_ETCTL,	0x40000934
//  0x4000 0934  EPWM11_ETCTL   Bits-------------------------------------
	.EQU	EPWM11_ETCTL_BTSEL1,		25
	.EQU	EPWM11_ETCTL_BTSEL0,		24
	.EQU	EPWM11_ETCTL_FRCB,		19
	.EQU	EPWM11_ETCTL_TOADENB,		16
	.EQU	EPWM11_ETCTL_ATSEL1,		9
	.EQU	EPWM11_ETCTL_ATSEL0,		8
	.EQU	EPWM11_ETCTL_FRCA,		3
	.EQU	EPWM11_ETCTL_TOADENA,		0
//  register-------------------------------------
	.EQU	EPWM11_IE,		0x40000938
//  0x4000 0938  EPWM11_IE   Bits-------------------------------------
	.EQU	EPWM11_IE_CAPIE,		9
	.EQU	EPWM11_IE_TXDIE,		8
	.EQU	EPWM11_IE_TXCIE,		7
	.EQU	EPWM11_IE_TXAIE,		6
	.EQU	EPWM11_IE_TXBIE,		5
	.EQU	EPWM11_IE_TXIE,		4
	.EQU	EPWM11_IE_TXUIE,		3
	.EQU	EPWM11_IE_TXGIE,		2
	.EQU	EPWM11_IE_TXTIE1,		1
	.EQU	EPWM11_IE_TXTIE0,		0
//  register-------------------------------------
	.EQU	EPWM11_IF,		0x4000093C
//  0x4000 093C  EPWM11_IF   Bits-------------------------------------
	.EQU	EPWM11_IF_CAPIF,		9
	.EQU	EPWM11_IF_TXDIF,		8
	.EQU	EPWM11_IF_TXCIF,		7
	.EQU	EPWM11_IF_TXAIF,		6
	.EQU	EPWM11_IF_TXBIF,		5
	.EQU	EPWM11_IF_TXIF,		4
	.EQU	EPWM11_IF_TXUIF,		3
	.EQU	EPWM11_IF_TXGIF,		2
	.EQU	EPWM11_IF_TXTIF1,		1
	.EQU	EPWM11_IF_TXTIF0,		0
//  register-------------------------------------
	.EQU	EPWM11_IC,		0x40000940
//  0x4000 0940  EPWM11_IC   Bits-------------------------------------
	.EQU	EPWM11_IC_CAPIC1,		10
	.EQU	EPWM11_IC_CAPIC0,		9
	.EQU	EPWM11_IC_TXDIC,		8
	.EQU	EPWM11_IC_TXCIC,		7
	.EQU	EPWM11_IC_TXAIC,		6
	.EQU	EPWM11_IC_TXBIC,		5
	.EQU	EPWM11_IC_TXIC,		4
	.EQU	EPWM11_IC_TXUIC,		3
	.EQU	EPWM11_IC_TXGIC,		2
	.EQU	EPWM11_IC_TXTIC1,		1
	.EQU	EPWM11_IC_TXTIC0,		0
//  register-------------------------------------
	.EQU	EPWM11_DE,		0x40000944
//  0x4000 0944  EPWM11_DE   Bits-------------------------------------
	.EQU	EPWM11_DE_TXDDE,		8
	.EQU	EPWM11_DE_TXCDE,		7
	.EQU	EPWM11_DE_TXADE,		6
	.EQU	EPWM11_DE_TXBDE,		5
	.EQU	EPWM11_DE_TXDE,		4
	.EQU	EPWM11_DE_TXUDE,		3
	.EQU	EPWM11_DE_TXGDE,		2
	.EQU	EPWM11_DE_TXTDE1,		1
	.EQU	EPWM11_DE_TXTDE0,		0
//  register-------------------------------------
	.EQU	EPWM11_DF,		0x40000948
//  0x4000 0948  EPWM11_DF   Bits-------------------------------------
	.EQU	EPWM11_DF_TXDDF,		8
	.EQU	EPWM11_DF_TXCDF,		7
	.EQU	EPWM11_DF_TXADF,		6
	.EQU	EPWM11_DF_TXBDF,		5
	.EQU	EPWM11_DF_TXDF,		4
	.EQU	EPWM11_DF_TXUDF,		3
	.EQU	EPWM11_DF_TXGDF,		2
	.EQU	EPWM11_DF_TXTDF1,		1
	.EQU	EPWM11_DF_TXTDF0,		0
//  register-------------------------------------
	.EQU	EPWM11_CAP,	0x40000958
//  0x4000 0958  EPWM11_CAP   Bits-------------------------------------
	.EQU	EPWM11_CAP_CAP31,		31
	.EQU	EPWM11_CAP_CAP30,		30
	.EQU	EPWM11_CAP_CAP29,		29
	.EQU	EPWM11_CAP_CAP28,		28
	.EQU	EPWM11_CAP_CAP27,		27
	.EQU	EPWM11_CAP_CAP26,		26
	.EQU	EPWM11_CAP_CAP25,		25
	.EQU	EPWM11_CAP_CAP24,		24
	.EQU	EPWM11_CAP_CAP23,		23
	.EQU	EPWM11_CAP_CAP22,		22
	.EQU	EPWM11_CAP_CAP21,		21
	.EQU	EPWM11_CAP_CAP20,		20
	.EQU	EPWM11_CAP_CAP19,		19
	.EQU	EPWM11_CAP_CAP18,		18
	.EQU	EPWM11_CAP_CAP17,		17
	.EQU	EPWM11_CAP_CAP16,		16
	.EQU	EPWM11_CAP_CAP15,		15
	.EQU	EPWM11_CAP_CAP14,		14
	.EQU	EPWM11_CAP_CAP13,		13
	.EQU	EPWM11_CAP_CAP12,		12
	.EQU	EPWM11_CAP_CAP11,		11
	.EQU	EPWM11_CAP_CAP10,		10
	.EQU	EPWM11_CAP_CAP9,		9
	.EQU	EPWM11_CAP_CAP8,		8
	.EQU	EPWM11_CAP_CAP7,		7
	.EQU	EPWM11_CAP_CAP6,		6
	.EQU	EPWM11_CAP_CAP5,		5
	.EQU	EPWM11_CAP_CAP4,		4
	.EQU	EPWM11_CAP_CAP3,		3
	.EQU	EPWM11_CAP_CAP2,		2
	.EQU	EPWM11_CAP_CAP1,		1
	.EQU	EPWM11_CAP_CAP0,		0
//  register-------------------------------------
	.EQU	EPWM11_RC,		0x4000095C
//  0x4000 095C  EPWM11_RC   Bits-------------------------------------
	.EQU	EPWM11_RC_EPWMRC31,		31
	.EQU	EPWM11_RC_EPWMRC30,		30
	.EQU	EPWM11_RC_EPWMRC29,		29
	.EQU	EPWM11_RC_EPWMRC28,		28
	.EQU	EPWM11_RC_EPWMRC27,		27
	.EQU	EPWM11_RC_EPWMRC26,		26
	.EQU	EPWM11_RC_EPWMRC25,		25
	.EQU	EPWM11_RC_EPWMRC24,		24
	.EQU	EPWM11_RC_EPWMRC23,		23
	.EQU	EPWM11_RC_EPWMRC22,		22
	.EQU	EPWM11_RC_EPWMRC21,		21
	.EQU	EPWM11_RC_EPWMRC20,		20
	.EQU	EPWM11_RC_EPWMRC19,		19
	.EQU	EPWM11_RC_EPWMRC18,		18
	.EQU	EPWM11_RC_EPWMRC17,		17
	.EQU	EPWM11_RC_EPWMRC16,		16
	.EQU	EPWM11_RC_EPWMRC15,		15
	.EQU	EPWM11_RC_EPWMRC14,		14
	.EQU	EPWM11_RC_EPWMRC13,		13
	.EQU	EPWM11_RC_EPWMRC12,		12
	.EQU	EPWM11_RC_EPWMRC11,		11
	.EQU	EPWM11_RC_EPWMRC10,		10
	.EQU	EPWM11_RC_EPWMRC9,		9
	.EQU	EPWM11_RC_EPWMRC8,		8
	.EQU	EPWM11_RC_EPWMRC7,		7
	.EQU	EPWM11_RC_EPWMRC6,		6
	.EQU	EPWM11_RC_EPWMRC5,		5
	.EQU	EPWM11_RC_EPWMRC4,		4
	.EQU	EPWM11_RC_EPWMRC3,		3
	.EQU	EPWM11_RC_EPWMRC2,		2
	.EQU	EPWM11_RC_EPWMRC1,		1
	.EQU	EPWM11_RC_EPWMRC0,		0
//  register-------------------------------------
	.EQU	EPWM11_RD,		0x40000960
//  0x4000 0960  EPWM11_RD   Bits-------------------------------------
	.EQU	EPWM11_RD_EPWMRD31,		31
	.EQU	EPWM11_RD_EPWMRD30,		30
	.EQU	EPWM11_RD_EPWMRD29,		29
	.EQU	EPWM11_RD_EPWMRD28,		28
	.EQU	EPWM11_RD_EPWMRD27,		27
	.EQU	EPWM11_RD_EPWMRD26,		26
	.EQU	EPWM11_RD_EPWMRD25,		25
	.EQU	EPWM11_RD_EPWMRD24,		24
	.EQU	EPWM11_RD_EPWMRD23,		23
	.EQU	EPWM11_RD_EPWMRD22,		22
	.EQU	EPWM11_RD_EPWMRD21,		21
	.EQU	EPWM11_RD_EPWMRD20,		20
	.EQU	EPWM11_RD_EPWMRD19,		19
	.EQU	EPWM11_RD_EPWMRD18,		18
	.EQU	EPWM11_RD_EPWMRD17,		17
	.EQU	EPWM11_RD_EPWMRD16,		16
	.EQU	EPWM11_RD_EPWMRD15,		15
	.EQU	EPWM11_RD_EPWMRD14,		14
	.EQU	EPWM11_RD_EPWMRD13,		13
	.EQU	EPWM11_RD_EPWMRD12,		12
	.EQU	EPWM11_RD_EPWMRD11,		11
	.EQU	EPWM11_RD_EPWMRD10,		10
	.EQU	EPWM11_RD_EPWMRD9,		9
	.EQU	EPWM11_RD_EPWMRD8,		8
	.EQU	EPWM11_RD_EPWMRD7,		7
	.EQU	EPWM11_RD_EPWMRD6,		6
	.EQU	EPWM11_RD_EPWMRD5,		5
	.EQU	EPWM11_RD_EPWMRD4,		4
	.EQU	EPWM11_RD_EPWMRD3,		3
	.EQU	EPWM11_RD_EPWMRD2,		2
	.EQU	EPWM11_RD_EPWMRD1,		1
	.EQU	EPWM11_RD_EPWMRD0,		0
//  register-------------------------------------
	.EQU	EPWM11_UDCTL,	0x40000964
//  0x4000 0964  EPWM11_UDCTL   Bits-------------------------------------
	.EQU	EPWM11_UDCTL_GBUDEN,		27
//  register-------------------------------------
	.EQU	T12_CNT,		0x40000A00
//  0x4000 0A00  T12_CNT   Bits-------------------------------------
	.EQU	T12_CNT_TXCNT31,		31
	.EQU	T12_CNT_TXCNT30,		30
	.EQU	T12_CNT_TXCNT29,		29
	.EQU	T12_CNT_TXCNT28,		28
	.EQU	T12_CNT_TXCNT27,		27
	.EQU	T12_CNT_TXCNT26,		26
	.EQU	T12_CNT_TXCNT25,		25
	.EQU	T12_CNT_TXCNT24,		24
	.EQU	T12_CNT_TXCNT23,		23
	.EQU	T12_CNT_TXCNT22,		22
	.EQU	T12_CNT_TXCNT21,		21
	.EQU	T12_CNT_TXCNT20,		20
	.EQU	T12_CNT_TXCNT19,		19
	.EQU	T12_CNT_TXCNT18,		18
	.EQU	T12_CNT_TXCNT17,		17
	.EQU	T12_CNT_TXCNT16,		16
	.EQU	T12_CNT_TXCNT15,		15
	.EQU	T12_CNT_TXCNT14,		14
	.EQU	T12_CNT_TXCNT13,		13
	.EQU	T12_CNT_TXCNT12,		12
	.EQU	T12_CNT_TXCNT11,		11
	.EQU	T12_CNT_TXCNT10,		10
	.EQU	T12_CNT_TXCNT9,		9
	.EQU	T12_CNT_TXCNT8,		8
	.EQU	T12_CNT_TXCNT7,		7
	.EQU	T12_CNT_TXCNT6,		6
	.EQU	T12_CNT_TXCNT5,		5
	.EQU	T12_CNT_TXCNT4,		4
	.EQU	T12_CNT_TXCNT3,		3
	.EQU	T12_CNT_TXCNT2,		2
	.EQU	T12_CNT_TXCNT1,		1
	.EQU	T12_CNT_TXCNT0,		0
//  register-------------------------------------
	.EQU	T12_PHS,		0x40000A04
//  0x4000 0A04  T12_PHS   Bits-------------------------------------
	.EQU	T12_PHS_TXPHS31,		31
	.EQU	T12_PHS_TXPHS30,		30
	.EQU	T12_PHS_TXPHS29,		29
	.EQU	T12_PHS_TXPHS28,		28
	.EQU	T12_PHS_TXPHS27,		27
	.EQU	T12_PHS_TXPHS26,		26
	.EQU	T12_PHS_TXPHS25,		25
	.EQU	T12_PHS_TXPHS24,		24
	.EQU	T12_PHS_TXPHS23,		23
	.EQU	T12_PHS_TXPHS22,		22
	.EQU	T12_PHS_TXPHS21,		21
	.EQU	T12_PHS_TXPHS20,		20
	.EQU	T12_PHS_TXPHS19,		19
	.EQU	T12_PHS_TXPHS18,		18
	.EQU	T12_PHS_TXPHS17,		17
	.EQU	T12_PHS_TXPHS16,		16
	.EQU	T12_PHS_TXPHS15,		15
	.EQU	T12_PHS_TXPHS14,		14
	.EQU	T12_PHS_TXPHS13,		13
	.EQU	T12_PHS_TXPHS12,		12
	.EQU	T12_PHS_TXPHS11,		11
	.EQU	T12_PHS_TXPHS10,		10
	.EQU	T12_PHS_TXPHS9,		9
	.EQU	T12_PHS_TXPHS8,		8
	.EQU	T12_PHS_TXPHS7,		7
	.EQU	T12_PHS_TXPHS6,		6
	.EQU	T12_PHS_TXPHS5,		5
	.EQU	T12_PHS_TXPHS4,		4
	.EQU	T12_PHS_TXPHS3,		3
	.EQU	T12_PHS_TXPHS2,		2
	.EQU	T12_PHS_TXPHS1,		1
	.EQU	T12_PHS_TXPHS0,		0
//  register-------------------------------------
	.EQU	T12_PPX,		0x40000A08
//  0x4000 0A08  T12_PPX   Bits-------------------------------------
	.EQU	T12_PPX_PPX31,		31
	.EQU	T12_PPX_PPX30,		30
	.EQU	T12_PPX_PPX29,		29
	.EQU	T12_PPX_PPX28,		28
	.EQU	T12_PPX_PPX27,		27
	.EQU	T12_PPX_PPX26,		26
	.EQU	T12_PPX_PPX25,		25
	.EQU	T12_PPX_PPX24,		24
	.EQU	T12_PPX_PPX23,		23
	.EQU	T12_PPX_PPX22,		22
	.EQU	T12_PPX_PPX21,		21
	.EQU	T12_PPX_PPX20,		20
	.EQU	T12_PPX_PPX19,		19
	.EQU	T12_PPX_PPX18,		18
	.EQU	T12_PPX_PPX17,		17
	.EQU	T12_PPX_PPX16,		16
	.EQU	T12_PPX_PPX15,		15
	.EQU	T12_PPX_PPX14,		14
	.EQU	T12_PPX_PPX13,		13
	.EQU	T12_PPX_PPX12,		12
	.EQU	T12_PPX_PPX11,		11
	.EQU	T12_PPX_PPX10,		10
	.EQU	T12_PPX_PPX9,		9
	.EQU	T12_PPX_PPX8,		8
	.EQU	T12_PPX_PPX7,		7
	.EQU	T12_PPX_PPX6,		6
	.EQU	T12_PPX_PPX5,		5
	.EQU	T12_PPX_PPX4,		4
	.EQU	T12_PPX_PPX3,		3
	.EQU	T12_PPX_PPX2,		2
	.EQU	T12_PPX_PPX1,		1
	.EQU	T12_PPX_PPX0,		0
//  register-------------------------------------
	.EQU	T12_PRSC,		0x40000A0C
//  0x4000 0A0C  T12_PRSC   Bits-------------------------------------
	.EQU	T12_PRSC_TXPRSC31,		31
	.EQU	T12_PRSC_TXPRSC30,		30
	.EQU	T12_PRSC_TXPRSC29,		29
	.EQU	T12_PRSC_TXPRSC28,		28
	.EQU	T12_PRSC_TXPRSC27,		27
	.EQU	T12_PRSC_TXPRSC26,		26
	.EQU	T12_PRSC_TXPRSC25,		25
	.EQU	T12_PRSC_TXPRSC24,		24
	.EQU	T12_PRSC_TXPRSC23,		23
	.EQU	T12_PRSC_TXPRSC22,		22
	.EQU	T12_PRSC_TXPRSC21,		21
	.EQU	T12_PRSC_TXPRSC20,		20
	.EQU	T12_PRSC_TXPRSC19,		19
	.EQU	T12_PRSC_TXPRSC18,		18
	.EQU	T12_PRSC_TXPRSC17,		17
	.EQU	T12_PRSC_TXPRSC16,		16
	.EQU	T12_PRSC_TXPRSC15,		15
	.EQU	T12_PRSC_TXPRSC14,		14
	.EQU	T12_PRSC_TXPRSC13,		13
	.EQU	T12_PRSC_TXPRSC12,		12
	.EQU	T12_PRSC_TXPRSC11,		11
	.EQU	T12_PRSC_TXPRSC10,		10
	.EQU	T12_PRSC_TXPRSC9,		9
	.EQU	T12_PRSC_TXPRSC8,		8
	.EQU	T12_PRSC_TXPRSC7,		7
	.EQU	T12_PRSC_TXPRSC6,		6
	.EQU	T12_PRSC_TXPRSC5,		5
	.EQU	T12_PRSC_TXPRSC4,		4
	.EQU	T12_PRSC_TXPRSC3,		3
	.EQU	T12_PRSC_TXPRSC2,		2
	.EQU	T12_PRSC_TXPRSC1,		1
	.EQU	T12_PRSC_TXPRSC0,		0
//  register-------------------------------------
	.EQU	T12_CTL,		0x40000A10
//  0x4000 0A10  T12_CTL   Bits-------------------------------------
	.EQU	T12_CTL_BLINKEN,		31
	.EQU	T12_CTL_UDSYNEN,		29
	.EQU	T12_CTL_ETLOCK,		27
	.EQU	T12_CTL_DBLOCK,		25
	.EQU	T12_CTL_AQLOCKB,		24
	.EQU	T12_CTL_AQLOCKA,		23
	.EQU	T12_CTL_CAPEN,		22
	.EQU	T12_CTL_CAPSEL,		21
	.EQU	T12_CTL_TXMAX,		19
	.EQU	T12_CTL_PHSDIR,		18
	.EQU	T12_CTL_SWFSYNC,		17
	.EQU	T12_CTL_SYNCOSEL1,		16
	.EQU	T12_CTL_SYNCOSEL0,		15
	.EQU	T12_CTL_PHSEN,		14
	.EQU	T12_CTL_SYNCI,		13
	.EQU	T12_CTL_TXUR,		12
	.EQU	T12_CTL_TXUDEVT,		11
	.EQU	T12_CTL_TXUDEN,		10
	.EQU	T12_CTL_TXCMS2,		9
	.EQU	T12_CTL_TXCMS1,		8
	.EQU	T12_CTL_TXCMS0,		7
	.EQU	T12_CTL_TXDIR,		6
	.EQU	T12_CTL_TXCLK1,		5
	.EQU	T12_CTL_TXCLK0,		4
	.EQU	T12_CTL_TXSY,		3
	.EQU	T12_CTL_TXGATE,		2
	.EQU	T12_CTL_TXCS,		1
	.EQU	T12_CTL_TXEN,		0
//  register-------------------------------------
	.EQU	EPWM12_RA,		0x40000A14
//  0x4000 0A14  EPWM12_RA   Bits-------------------------------------
	.EQU	EPWM12_RA_EPWMRA31,		31
	.EQU	EPWM12_RA_EPWMRA30,		30
	.EQU	EPWM12_RA_EPWMRA29,		29
	.EQU	EPWM12_RA_EPWMRA28,		28
	.EQU	EPWM12_RA_EPWMRA27,		27
	.EQU	EPWM12_RA_EPWMRA26,		26
	.EQU	EPWM12_RA_EPWMRA25,		25
	.EQU	EPWM12_RA_EPWMRA24,		24
	.EQU	EPWM12_RA_EPWMRA23,		23
	.EQU	EPWM12_RA_EPWMRA22,		22
	.EQU	EPWM12_RA_EPWMRA21,		21
	.EQU	EPWM12_RA_EPWMRA20,		20
	.EQU	EPWM12_RA_EPWMRA19,		19
	.EQU	EPWM12_RA_EPWMRA18,		18
	.EQU	EPWM12_RA_EPWMRA17,		17
	.EQU	EPWM12_RA_EPWMRA16,		16
	.EQU	EPWM12_RA_EPWMRA15,		15
	.EQU	EPWM12_RA_EPWMRA14,		14
	.EQU	EPWM12_RA_EPWMRA13,		13
	.EQU	EPWM12_RA_EPWMRA12,		12
	.EQU	EPWM12_RA_EPWMRA11,		11
	.EQU	EPWM12_RA_EPWMRA10,		10
	.EQU	EPWM12_RA_EPWMRA9,		9
	.EQU	EPWM12_RA_EPWMRA8,		8
	.EQU	EPWM12_RA_EPWMRA7,		7
	.EQU	EPWM12_RA_EPWMRA6,		6
	.EQU	EPWM12_RA_EPWMRA5,		5
	.EQU	EPWM12_RA_EPWMRA4,		4
	.EQU	EPWM12_RA_EPWMRA3,		3
	.EQU	EPWM12_RA_EPWMRA2,		2
	.EQU	EPWM12_RA_EPWMRA1,		1
	.EQU	EPWM12_RA_EPWMRA0,		0
//  register-------------------------------------
	.EQU	EPWM12_RB,		0x40000A18
//  0x4000 0A18  EPWM12_RB   Bits-------------------------------------
	.EQU	EPWM12_RB_EPWMRB31,		31
	.EQU	EPWM12_RB_EPWMRB30,		30
	.EQU	EPWM12_RB_EPWMRB29,		29
	.EQU	EPWM12_RB_EPWMRB28,		28
	.EQU	EPWM12_RB_EPWMRB27,		27
	.EQU	EPWM12_RB_EPWMRB26,		26
	.EQU	EPWM12_RB_EPWMRB25,		25
	.EQU	EPWM12_RB_EPWMRB24,		24
	.EQU	EPWM12_RB_EPWMRB23,		23
	.EQU	EPWM12_RB_EPWMRB22,		22
	.EQU	EPWM12_RB_EPWMRB21,		21
	.EQU	EPWM12_RB_EPWMRB20,		20
	.EQU	EPWM12_RB_EPWMRB19,		19
	.EQU	EPWM12_RB_EPWMRB18,		18
	.EQU	EPWM12_RB_EPWMRB17,		17
	.EQU	EPWM12_RB_EPWMRB16,		16
	.EQU	EPWM12_RB_EPWMRB15,		15
	.EQU	EPWM12_RB_EPWMRB14,		14
	.EQU	EPWM12_RB_EPWMRB13,		13
	.EQU	EPWM12_RB_EPWMRB12,		12
	.EQU	EPWM12_RB_EPWMRB11,		11
	.EQU	EPWM12_RB_EPWMRB10,		10
	.EQU	EPWM12_RB_EPWMRB9,		9
	.EQU	EPWM12_RB_EPWMRB8,		8
	.EQU	EPWM12_RB_EPWMRB7,		7
	.EQU	EPWM12_RB_EPWMRB6,		6
	.EQU	EPWM12_RB_EPWMRB5,		5
	.EQU	EPWM12_RB_EPWMRB4,		4
	.EQU	EPWM12_RB_EPWMRB3,		3
	.EQU	EPWM12_RB_EPWMRB2,		2
	.EQU	EPWM12_RB_EPWMRB1,		1
	.EQU	EPWM12_RB_EPWMRB0,		0
//  register-------------------------------------
	.EQU	EPWM12_CTLA,	0x40000A1C
//  0x4000 0A1C  EPWM12_CTLA   Bits-------------------------------------
	.EQU	EPWM12_CTLA_STSFA,		16
	.EQU	EPWM12_CTLA_ACTSFA1,		15
	.EQU	EPWM12_CTLA_ACTSFA0,		14
	.EQU	EPWM12_CTLA_CSFA1,		13
	.EQU	EPWM12_CTLA_CSFA0,		12
	.EQU	EPWM12_CTLA_ACBD1,		11
	.EQU	EPWM12_CTLA_ACBD0,		10
	.EQU	EPWM12_CTLA_ACBU1,		9
	.EQU	EPWM12_CTLA_ACBU0,		8
	.EQU	EPWM12_CTLA_ACAD1,		7
	.EQU	EPWM12_CTLA_ACAD0,		6
	.EQU	EPWM12_CTLA_ACAU1,		5
	.EQU	EPWM12_CTLA_ACAU0,		4
	.EQU	EPWM12_CTLA_APRD1,		3
	.EQU	EPWM12_CTLA_APRD0,		2
	.EQU	EPWM12_CTLA_AZRO1,		1
	.EQU	EPWM12_CTLA_AZRO0,		0
//  register-------------------------------------
	.EQU	EPWM12_CTLB,	0x40000A20
//  0x4000 0A20  EPWM12_CTLB   Bits-------------------------------------
	.EQU	EPWM12_CTLB_OTSFB,		16
	.EQU	EPWM12_CTLB_ACTSFB1,		15
	.EQU	EPWM12_CTLB_ACTSFB0,		14
	.EQU	EPWM12_CTLB_CSFB1,		13
	.EQU	EPWM12_CTLB_CSFB0,		12
	.EQU	EPWM12_CTLB_BCBD1,		11
	.EQU	EPWM12_CTLB_BCBD0,		10
	.EQU	EPWM12_CTLB_BCBU1,		9
	.EQU	EPWM12_CTLB_BCBU0,		8
	.EQU	EPWM12_CTLB_BCAD1,		7
	.EQU	EPWM12_CTLB_BCAD0,		6
	.EQU	EPWM12_CTLB_BCAU1,		5
	.EQU	EPWM12_CTLB_BCAU0,		4
	.EQU	EPWM12_CTLB_BPRD1,		3
	.EQU	EPWM12_CTLB_BPRD0,		2
	.EQU	EPWM12_CTLB_BZRO1,		1
	.EQU	EPWM12_CTLB_BZRO0,		0
//  register-------------------------------------
	.EQU	EPWM12_DBCTL,	0x40000A24
//  0x4000 0A24  EPWM12_DBCTL   Bits-------------------------------------
	.EQU	EPWM12_DBCTL_INMODE1,		5
	.EQU	EPWM12_DBCTL_INMODE0,		4
	.EQU	EPWM12_DBCTL_POLSEL1,		3
	.EQU	EPWM12_DBCTL_POLSEL0,		2
	.EQU	EPWM12_DBCTL_OUTMODE1,		1
	.EQU	EPWM12_DBCTL_OUTMODE0,		0
//  register-------------------------------------
	.EQU	EPWM12_DBT,	0x40000A28
//  0x4000 0A28  EPWM12_DBT   Bits-------------------------------------
	.EQU	EPWM12_DBT_RDBT15,		31
	.EQU	EPWM12_DBT_RDBT14,		30
	.EQU	EPWM12_DBT_RDBT13,		29
	.EQU	EPWM12_DBT_RDBT12,		28
	.EQU	EPWM12_DBT_RDBT11,		27
	.EQU	EPWM12_DBT_RDBT10,		26
	.EQU	EPWM12_DBT_RDBT9,		25
	.EQU	EPWM12_DBT_RDBT8,		24
	.EQU	EPWM12_DBT_RDBT7,		23
	.EQU	EPWM12_DBT_RDBT6,		22
	.EQU	EPWM12_DBT_RDBT5,		21
	.EQU	EPWM12_DBT_RDBT4,		20
	.EQU	EPWM12_DBT_RDBT3,		19
	.EQU	EPWM12_DBT_RDBT2,		18
	.EQU	EPWM12_DBT_RDBT1,		17
	.EQU	EPWM12_DBT_RDBT0,		16
	.EQU	EPWM12_DBT_FDBT15,		15
	.EQU	EPWM12_DBT_FDBT14,		14
	.EQU	EPWM12_DBT_FDBT13,		13
	.EQU	EPWM12_DBT_FDBT12,		12
	.EQU	EPWM12_DBT_FDBT11,		11
	.EQU	EPWM12_DBT_FDBT10,		10
	.EQU	EPWM12_DBT_FDBT9,		9
	.EQU	EPWM12_DBT_FDBT8,		8
	.EQU	EPWM12_DBT_FDBT7,		7
	.EQU	EPWM12_DBT_FDBT6,		6
	.EQU	EPWM12_DBT_FDBT5,		5
	.EQU	EPWM12_DBT_FDBT4,		4
	.EQU	EPWM12_DBT_FDBT3,		3
	.EQU	EPWM12_DBT_FDBT2,		2
	.EQU	EPWM12_DBT_FDBT1,		1
	.EQU	EPWM12_DBT_FDBT0,		0
//  register-------------------------------------
	.EQU	EPWM12_PCCTL,	0x40000A2C
//  0x4000 0A2C  EPWM12_PCCTL   Bits-------------------------------------
	.EQU	EPWM12_PCCTL_CHPFREQ2,		10
	.EQU	EPWM12_PCCTL_CHPFREQ1,		9
	.EQU	EPWM12_PCCTL_CHPFREQ0,		8
	.EQU	EPWM12_PCCTL_CHPDUTY2,		7
	.EQU	EPWM12_PCCTL_CHPDUTY1,		6
	.EQU	EPWM12_PCCTL_CHPDUTY0,		5
	.EQU	EPWM12_PCCTL_OSHTWTH3,		4
	.EQU	EPWM12_PCCTL_OSHTWTH2,		3
	.EQU	EPWM12_PCCTL_OSHTWTH1,		2
	.EQU	EPWM12_PCCTL_OSHTWTH0,		1
	.EQU	EPWM12_PCCTL_CHPEN,		0
//  register-------------------------------------
	.EQU	EPWM12_PXASCTL,	0x40000A30
//  0x4000 0A30  EPWM12_PXASCTL   Bits-------------------------------------
	.EQU	EPWM12_PXASCTL_PXAVNEG,		10
	.EQU	EPWM12_PXASCTL_PXASE,		9
	.EQU	EPWM12_PXASCTL_PXRSEN,		8
	.EQU	EPWM12_PXASCTL_PXSSA1,		7
	.EQU	EPWM12_PXASCTL_PXSSA0,		6
	.EQU	EPWM12_PXASCTL_PXSSB1,		5
	.EQU	EPWM12_PXASCTL_PXSSB0,		4
	.EQU	EPWM12_PXASCTL_PXASS3,		3
	.EQU	EPWM12_PXASCTL_PXASS2,		2
	.EQU	EPWM12_PXASCTL_PXASS1,		1
	.EQU	EPWM12_PXASCTL_PXASS0,		0
//  register-------------------------------------
	.EQU	EPWM12_ETCTL,	0x40000A34
//  0x4000 0A34  EPWM12_ETCTL   Bits-------------------------------------
	.EQU	EPWM12_ETCTL_BTSEL1,		25
	.EQU	EPWM12_ETCTL_BTSEL0,		24
	.EQU	EPWM12_ETCTL_FRCB,		19
	.EQU	EPWM12_ETCTL_TOADENB,		16
	.EQU	EPWM12_ETCTL_ATSEL1,		9
	.EQU	EPWM12_ETCTL_ATSEL0,		8
	.EQU	EPWM12_ETCTL_FRCA,		3
	.EQU	EPWM12_ETCTL_TOADENA,		0
//  register-------------------------------------
	.EQU	EPWM12_IE,		0x40000A38
//  0x4000 0A38  EPWM12_IE   Bits-------------------------------------
	.EQU	EPWM12_IE_CAPIE,		9
	.EQU	EPWM12_IE_TXDIE,		8
	.EQU	EPWM12_IE_TXCIE,		7
	.EQU	EPWM12_IE_TXAIE,		6
	.EQU	EPWM12_IE_TXBIE,		5
	.EQU	EPWM12_IE_TXIE,		4
	.EQU	EPWM12_IE_TXUIE,		3
	.EQU	EPWM12_IE_TXGIE,		2
	.EQU	EPWM12_IE_TXTIE1,		1
	.EQU	EPWM12_IE_TXTIE0,		0
//  register-------------------------------------
	.EQU	EPWM12_IF,		0x40000A3C
//  0x4000 0A3C  EPWM12_IF   Bits-------------------------------------
	.EQU	EPWM12_IF_CAPIF,		9
	.EQU	EPWM12_IF_TXDIF,		8
	.EQU	EPWM12_IF_TXCIF,		7
	.EQU	EPWM12_IF_TXAIF,		6
	.EQU	EPWM12_IF_TXBIF,		5
	.EQU	EPWM12_IF_TXIF,		4
	.EQU	EPWM12_IF_TXUIF,		3
	.EQU	EPWM12_IF_TXGIF,		2
	.EQU	EPWM12_IF_TXTIF1,		1
	.EQU	EPWM12_IF_TXTIF0,		0
//  register-------------------------------------
	.EQU	EPWM12_IC,		0x40000A40
//  0x4000 0A40  EPWM12_IC   Bits-------------------------------------
	.EQU	EPWM12_IC_CAPIC1,		10
	.EQU	EPWM12_IC_CAPIC0,		9
	.EQU	EPWM12_IC_TXDIC,		8
	.EQU	EPWM12_IC_TXCIC,		7
	.EQU	EPWM12_IC_TXAIC,		6
	.EQU	EPWM12_IC_TXBIC,		5
	.EQU	EPWM12_IC_TXIC,		4
	.EQU	EPWM12_IC_TXUIC,		3
	.EQU	EPWM12_IC_TXGIC,		2
	.EQU	EPWM12_IC_TXTIC1,		1
	.EQU	EPWM12_IC_TXTIC0,		0
//  register-------------------------------------
	.EQU	EPWM12_DE,		0x40000A44
//  0x4000 0A44  EPWM12_DE   Bits-------------------------------------
	.EQU	EPWM12_DE_TXDDE,		8
	.EQU	EPWM12_DE_TXCDE,		7
	.EQU	EPWM12_DE_TXADE,		6
	.EQU	EPWM12_DE_TXBDE,		5
	.EQU	EPWM12_DE_TXDE,		4
	.EQU	EPWM12_DE_TXUDE,		3
	.EQU	EPWM12_DE_TXGDE,		2
	.EQU	EPWM12_DE_TXTDE1,		1
	.EQU	EPWM12_DE_TXTDE0,		0
//  register-------------------------------------
	.EQU	EPWM12_DF,		0x40000A48
//  0x4000 0A48  EPWM12_DF   Bits-------------------------------------
	.EQU	EPWM12_DF_TXDDF,		8
	.EQU	EPWM12_DF_TXCDF,		7
	.EQU	EPWM12_DF_TXADF,		6
	.EQU	EPWM12_DF_TXBDF,		5
	.EQU	EPWM12_DF_TXDF,		4
	.EQU	EPWM12_DF_TXUDF,		3
	.EQU	EPWM12_DF_TXGDF,		2
	.EQU	EPWM12_DF_TXTDF1,		1
	.EQU	EPWM12_DF_TXTDF0,		0
//  register-------------------------------------
	.EQU	EPWM12_HRPWMCTLA,	0x40000A50
//  0x4000 0A50  EPWM12_HRPWMCTLA   Bits-------------------------------------
	.EQU	EPWM12_HRPWMCTLA_HRPHSENA,		6
	.EQU	EPWM12_HRPWMCTLA_HRFENA,		5
	.EQU	EPWM12_HRPWMCTLA_HRRENA,		4
	.EQU	EPWM12_HRPWMCTLA_HRPENA,		3
	.EQU	EPWM12_HRPWMCTLA_HRDENA,		2
	.EQU	EPWM12_HRPWMCTLA_HRSELA,		1
	.EQU	EPWM12_HRPWMCTLA_HRENA,		0
//  register-------------------------------------
	.EQU	EPWM12_HRCMPA,	0x40000A54
//  0x4000 0A54  EPWM12_HRCMPA   Bits-------------------------------------
	.EQU	EPWM12_HRCMPA_HRCMPA7,		7
	.EQU	EPWM12_HRCMPA_HRCMPA6,		6
	.EQU	EPWM12_HRCMPA_HRCMPA5,		5
	.EQU	EPWM12_HRCMPA_HRCMPA4,		4
	.EQU	EPWM12_HRCMPA_HRCMPA3,		3
	.EQU	EPWM12_HRCMPA_HRCMPA2,		2
	.EQU	EPWM12_HRCMPA_HRCMPA1,		1
	.EQU	EPWM12_HRCMPA_HRCMPA0,		0
//  register-------------------------------------
	.EQU	EPWM12_CAP,	0x40000A58
//  0x4000 0A58  EPWM12_CAP   Bits-------------------------------------
	.EQU	EPWM12_CAP_CAP31,		31
	.EQU	EPWM12_CAP_CAP30,		30
	.EQU	EPWM12_CAP_CAP29,		29
	.EQU	EPWM12_CAP_CAP28,		28
	.EQU	EPWM12_CAP_CAP27,		27
	.EQU	EPWM12_CAP_CAP26,		26
	.EQU	EPWM12_CAP_CAP25,		25
	.EQU	EPWM12_CAP_CAP24,		24
	.EQU	EPWM12_CAP_CAP23,		23
	.EQU	EPWM12_CAP_CAP22,		22
	.EQU	EPWM12_CAP_CAP21,		21
	.EQU	EPWM12_CAP_CAP20,		20
	.EQU	EPWM12_CAP_CAP19,		19
	.EQU	EPWM12_CAP_CAP18,		18
	.EQU	EPWM12_CAP_CAP17,		17
	.EQU	EPWM12_CAP_CAP16,		16
	.EQU	EPWM12_CAP_CAP15,		15
	.EQU	EPWM12_CAP_CAP14,		14
	.EQU	EPWM12_CAP_CAP13,		13
	.EQU	EPWM12_CAP_CAP12,		12
	.EQU	EPWM12_CAP_CAP11,		11
	.EQU	EPWM12_CAP_CAP10,		10
	.EQU	EPWM12_CAP_CAP9,		9
	.EQU	EPWM12_CAP_CAP8,		8
	.EQU	EPWM12_CAP_CAP7,		7
	.EQU	EPWM12_CAP_CAP6,		6
	.EQU	EPWM12_CAP_CAP5,		5
	.EQU	EPWM12_CAP_CAP4,		4
	.EQU	EPWM12_CAP_CAP3,		3
	.EQU	EPWM12_CAP_CAP2,		2
	.EQU	EPWM12_CAP_CAP1,		1
	.EQU	EPWM12_CAP_CAP0,		0
//  register-------------------------------------
	.EQU	EPWM12_RC,		0x40000A5C
//  0x4000 0A5C  EPWM12_RC   Bits-------------------------------------
	.EQU	EPWM12_RC_EPWMRC31,		31
	.EQU	EPWM12_RC_EPWMRC30,		30
	.EQU	EPWM12_RC_EPWMRC29,		29
	.EQU	EPWM12_RC_EPWMRC28,		28
	.EQU	EPWM12_RC_EPWMRC27,		27
	.EQU	EPWM12_RC_EPWMRC26,		26
	.EQU	EPWM12_RC_EPWMRC25,		25
	.EQU	EPWM12_RC_EPWMRC24,		24
	.EQU	EPWM12_RC_EPWMRC23,		23
	.EQU	EPWM12_RC_EPWMRC22,		22
	.EQU	EPWM12_RC_EPWMRC21,		21
	.EQU	EPWM12_RC_EPWMRC20,		20
	.EQU	EPWM12_RC_EPWMRC19,		19
	.EQU	EPWM12_RC_EPWMRC18,		18
	.EQU	EPWM12_RC_EPWMRC17,		17
	.EQU	EPWM12_RC_EPWMRC16,		16
	.EQU	EPWM12_RC_EPWMRC15,		15
	.EQU	EPWM12_RC_EPWMRC14,		14
	.EQU	EPWM12_RC_EPWMRC13,		13
	.EQU	EPWM12_RC_EPWMRC12,		12
	.EQU	EPWM12_RC_EPWMRC11,		11
	.EQU	EPWM12_RC_EPWMRC10,		10
	.EQU	EPWM12_RC_EPWMRC9,		9
	.EQU	EPWM12_RC_EPWMRC8,		8
	.EQU	EPWM12_RC_EPWMRC7,		7
	.EQU	EPWM12_RC_EPWMRC6,		6
	.EQU	EPWM12_RC_EPWMRC5,		5
	.EQU	EPWM12_RC_EPWMRC4,		4
	.EQU	EPWM12_RC_EPWMRC3,		3
	.EQU	EPWM12_RC_EPWMRC2,		2
	.EQU	EPWM12_RC_EPWMRC1,		1
	.EQU	EPWM12_RC_EPWMRC0,		0
//  register-------------------------------------
	.EQU	EPWM12_RD,		0x40000A60
//  0x4000 0A60  EPWM12_RD   Bits-------------------------------------
	.EQU	EPWM12_RD_EPWMRD31,		31
	.EQU	EPWM12_RD_EPWMRD30,		30
	.EQU	EPWM12_RD_EPWMRD29,		29
	.EQU	EPWM12_RD_EPWMRD28,		28
	.EQU	EPWM12_RD_EPWMRD27,		27
	.EQU	EPWM12_RD_EPWMRD26,		26
	.EQU	EPWM12_RD_EPWMRD25,		25
	.EQU	EPWM12_RD_EPWMRD24,		24
	.EQU	EPWM12_RD_EPWMRD23,		23
	.EQU	EPWM12_RD_EPWMRD22,		22
	.EQU	EPWM12_RD_EPWMRD21,		21
	.EQU	EPWM12_RD_EPWMRD20,		20
	.EQU	EPWM12_RD_EPWMRD19,		19
	.EQU	EPWM12_RD_EPWMRD18,		18
	.EQU	EPWM12_RD_EPWMRD17,		17
	.EQU	EPWM12_RD_EPWMRD16,		16
	.EQU	EPWM12_RD_EPWMRD15,		15
	.EQU	EPWM12_RD_EPWMRD14,		14
	.EQU	EPWM12_RD_EPWMRD13,		13
	.EQU	EPWM12_RD_EPWMRD12,		12
	.EQU	EPWM12_RD_EPWMRD11,		11
	.EQU	EPWM12_RD_EPWMRD10,		10
	.EQU	EPWM12_RD_EPWMRD9,		9
	.EQU	EPWM12_RD_EPWMRD8,		8
	.EQU	EPWM12_RD_EPWMRD7,		7
	.EQU	EPWM12_RD_EPWMRD6,		6
	.EQU	EPWM12_RD_EPWMRD5,		5
	.EQU	EPWM12_RD_EPWMRD4,		4
	.EQU	EPWM12_RD_EPWMRD3,		3
	.EQU	EPWM12_RD_EPWMRD2,		2
	.EQU	EPWM12_RD_EPWMRD1,		1
	.EQU	EPWM12_RD_EPWMRD0,		0
//  register-------------------------------------
	.EQU	EPWM12_UDCTL,	0x40000A64
//  0x4000 0A64  EPWM12_UDCTL   Bits-------------------------------------
	.EQU	EPWM12_UDCTL_GBUDEN,		27
//  register-------------------------------------
	.EQU	T13_CNT,		0x40000B00
//  0x4000 0B00  T13_CNT   Bits-------------------------------------
	.EQU	T13_CNT_TXCNT31,		31
	.EQU	T13_CNT_TXCNT30,		30
	.EQU	T13_CNT_TXCNT29,		29
	.EQU	T13_CNT_TXCNT28,		28
	.EQU	T13_CNT_TXCNT27,		27
	.EQU	T13_CNT_TXCNT26,		26
	.EQU	T13_CNT_TXCNT25,		25
	.EQU	T13_CNT_TXCNT24,		24
	.EQU	T13_CNT_TXCNT23,		23
	.EQU	T13_CNT_TXCNT22,		22
	.EQU	T13_CNT_TXCNT21,		21
	.EQU	T13_CNT_TXCNT20,		20
	.EQU	T13_CNT_TXCNT19,		19
	.EQU	T13_CNT_TXCNT18,		18
	.EQU	T13_CNT_TXCNT17,		17
	.EQU	T13_CNT_TXCNT16,		16
	.EQU	T13_CNT_TXCNT15,		15
	.EQU	T13_CNT_TXCNT14,		14
	.EQU	T13_CNT_TXCNT13,		13
	.EQU	T13_CNT_TXCNT12,		12
	.EQU	T13_CNT_TXCNT11,		11
	.EQU	T13_CNT_TXCNT10,		10
	.EQU	T13_CNT_TXCNT9,		9
	.EQU	T13_CNT_TXCNT8,		8
	.EQU	T13_CNT_TXCNT7,		7
	.EQU	T13_CNT_TXCNT6,		6
	.EQU	T13_CNT_TXCNT5,		5
	.EQU	T13_CNT_TXCNT4,		4
	.EQU	T13_CNT_TXCNT3,		3
	.EQU	T13_CNT_TXCNT2,		2
	.EQU	T13_CNT_TXCNT1,		1
	.EQU	T13_CNT_TXCNT0,		0
//  register-------------------------------------
	.EQU	T13_PHS,		0x40000B04
//  0x4000 0B04  T13_PHS   Bits-------------------------------------
	.EQU	T13_PHS_TXPHS31,		31
	.EQU	T13_PHS_TXPHS30,		30
	.EQU	T13_PHS_TXPHS29,		29
	.EQU	T13_PHS_TXPHS28,		28
	.EQU	T13_PHS_TXPHS27,		27
	.EQU	T13_PHS_TXPHS26,		26
	.EQU	T13_PHS_TXPHS25,		25
	.EQU	T13_PHS_TXPHS24,		24
	.EQU	T13_PHS_TXPHS23,		23
	.EQU	T13_PHS_TXPHS22,		22
	.EQU	T13_PHS_TXPHS21,		21
	.EQU	T13_PHS_TXPHS20,		20
	.EQU	T13_PHS_TXPHS19,		19
	.EQU	T13_PHS_TXPHS18,		18
	.EQU	T13_PHS_TXPHS17,		17
	.EQU	T13_PHS_TXPHS16,		16
	.EQU	T13_PHS_TXPHS15,		15
	.EQU	T13_PHS_TXPHS14,		14
	.EQU	T13_PHS_TXPHS13,		13
	.EQU	T13_PHS_TXPHS12,		12
	.EQU	T13_PHS_TXPHS11,		11
	.EQU	T13_PHS_TXPHS10,		10
	.EQU	T13_PHS_TXPHS9,		9
	.EQU	T13_PHS_TXPHS8,		8
	.EQU	T13_PHS_TXPHS7,		7
	.EQU	T13_PHS_TXPHS6,		6
	.EQU	T13_PHS_TXPHS5,		5
	.EQU	T13_PHS_TXPHS4,		4
	.EQU	T13_PHS_TXPHS3,		3
	.EQU	T13_PHS_TXPHS2,		2
	.EQU	T13_PHS_TXPHS1,		1
	.EQU	T13_PHS_TXPHS0,		0
//  register-------------------------------------
	.EQU	T13_PPX,		0x40000B08
//  0x4000 0B08  T13_PPX   Bits-------------------------------------
	.EQU	T13_PPX_PPX31,		31
	.EQU	T13_PPX_PPX30,		30
	.EQU	T13_PPX_PPX29,		29
	.EQU	T13_PPX_PPX28,		28
	.EQU	T13_PPX_PPX27,		27
	.EQU	T13_PPX_PPX26,		26
	.EQU	T13_PPX_PPX25,		25
	.EQU	T13_PPX_PPX24,		24
	.EQU	T13_PPX_PPX23,		23
	.EQU	T13_PPX_PPX22,		22
	.EQU	T13_PPX_PPX21,		21
	.EQU	T13_PPX_PPX20,		20
	.EQU	T13_PPX_PPX19,		19
	.EQU	T13_PPX_PPX18,		18
	.EQU	T13_PPX_PPX17,		17
	.EQU	T13_PPX_PPX16,		16
	.EQU	T13_PPX_PPX15,		15
	.EQU	T13_PPX_PPX14,		14
	.EQU	T13_PPX_PPX13,		13
	.EQU	T13_PPX_PPX12,		12
	.EQU	T13_PPX_PPX11,		11
	.EQU	T13_PPX_PPX10,		10
	.EQU	T13_PPX_PPX9,		9
	.EQU	T13_PPX_PPX8,		8
	.EQU	T13_PPX_PPX7,		7
	.EQU	T13_PPX_PPX6,		6
	.EQU	T13_PPX_PPX5,		5
	.EQU	T13_PPX_PPX4,		4
	.EQU	T13_PPX_PPX3,		3
	.EQU	T13_PPX_PPX2,		2
	.EQU	T13_PPX_PPX1,		1
	.EQU	T13_PPX_PPX0,		0
//  register-------------------------------------
	.EQU	T13_PRSC,		0x40000B0C
//  0x4000 0B0C  T13_PRSC   Bits-------------------------------------
	.EQU	T13_PRSC_TXPRSC31,		31
	.EQU	T13_PRSC_TXPRSC30,		30
	.EQU	T13_PRSC_TXPRSC29,		29
	.EQU	T13_PRSC_TXPRSC28,		28
	.EQU	T13_PRSC_TXPRSC27,		27
	.EQU	T13_PRSC_TXPRSC26,		26
	.EQU	T13_PRSC_TXPRSC25,		25
	.EQU	T13_PRSC_TXPRSC24,		24
	.EQU	T13_PRSC_TXPRSC23,		23
	.EQU	T13_PRSC_TXPRSC22,		22
	.EQU	T13_PRSC_TXPRSC21,		21
	.EQU	T13_PRSC_TXPRSC20,		20
	.EQU	T13_PRSC_TXPRSC19,		19
	.EQU	T13_PRSC_TXPRSC18,		18
	.EQU	T13_PRSC_TXPRSC17,		17
	.EQU	T13_PRSC_TXPRSC16,		16
	.EQU	T13_PRSC_TXPRSC15,		15
	.EQU	T13_PRSC_TXPRSC14,		14
	.EQU	T13_PRSC_TXPRSC13,		13
	.EQU	T13_PRSC_TXPRSC12,		12
	.EQU	T13_PRSC_TXPRSC11,		11
	.EQU	T13_PRSC_TXPRSC10,		10
	.EQU	T13_PRSC_TXPRSC9,		9
	.EQU	T13_PRSC_TXPRSC8,		8
	.EQU	T13_PRSC_TXPRSC7,		7
	.EQU	T13_PRSC_TXPRSC6,		6
	.EQU	T13_PRSC_TXPRSC5,		5
	.EQU	T13_PRSC_TXPRSC4,		4
	.EQU	T13_PRSC_TXPRSC3,		3
	.EQU	T13_PRSC_TXPRSC2,		2
	.EQU	T13_PRSC_TXPRSC1,		1
	.EQU	T13_PRSC_TXPRSC0,		0
//  register-------------------------------------
	.EQU	T13_CTL,		0x40000B10
//  0x4000 0B10  T13_CTL   Bits-------------------------------------
	.EQU	T13_CTL_BLINKEN,		31
	.EQU	T13_CTL_UDSYNEN,		29
	.EQU	T13_CTL_ETLOCK,		27
	.EQU	T13_CTL_DBLOCK,		25
	.EQU	T13_CTL_AQLOCKB,		24
	.EQU	T13_CTL_AQLOCKA,		23
	.EQU	T13_CTL_CAPEN,		22
	.EQU	T13_CTL_CAPSEL,		21
	.EQU	T13_CTL_TXMAX,		19
	.EQU	T13_CTL_PHSDIR,		18
	.EQU	T13_CTL_SWFSYNC,		17
	.EQU	T13_CTL_SYNCOSEL1,		16
	.EQU	T13_CTL_SYNCOSEL0,		15
	.EQU	T13_CTL_PHSEN,		14
	.EQU	T13_CTL_SYNCI,		13
	.EQU	T13_CTL_TXUR,		12
	.EQU	T13_CTL_TXUDEVT,		11
	.EQU	T13_CTL_TXUDEN,		10
	.EQU	T13_CTL_TXCMS2,		9
	.EQU	T13_CTL_TXCMS1,		8
	.EQU	T13_CTL_TXCMS0,		7
	.EQU	T13_CTL_TXDIR,		6
	.EQU	T13_CTL_TXCLK1,		5
	.EQU	T13_CTL_TXCLK0,		4
	.EQU	T13_CTL_TXSY,		3
	.EQU	T13_CTL_TXGATE,		2
	.EQU	T13_CTL_TXCS,		1
	.EQU	T13_CTL_TXEN,		0
//  register-------------------------------------
	.EQU	EPWM13_RA,		0x40000B14
//  0x4000 0B14  EPWM13_RA   Bits-------------------------------------
	.EQU	EPWM13_RA_EPWMRA31,		31
	.EQU	EPWM13_RA_EPWMRA30,		30
	.EQU	EPWM13_RA_EPWMRA29,		29
	.EQU	EPWM13_RA_EPWMRA28,		28
	.EQU	EPWM13_RA_EPWMRA27,		27
	.EQU	EPWM13_RA_EPWMRA26,		26
	.EQU	EPWM13_RA_EPWMRA25,		25
	.EQU	EPWM13_RA_EPWMRA24,		24
	.EQU	EPWM13_RA_EPWMRA23,		23
	.EQU	EPWM13_RA_EPWMRA22,		22
	.EQU	EPWM13_RA_EPWMRA21,		21
	.EQU	EPWM13_RA_EPWMRA20,		20
	.EQU	EPWM13_RA_EPWMRA19,		19
	.EQU	EPWM13_RA_EPWMRA18,		18
	.EQU	EPWM13_RA_EPWMRA17,		17
	.EQU	EPWM13_RA_EPWMRA16,		16
	.EQU	EPWM13_RA_EPWMRA15,		15
	.EQU	EPWM13_RA_EPWMRA14,		14
	.EQU	EPWM13_RA_EPWMRA13,		13
	.EQU	EPWM13_RA_EPWMRA12,		12
	.EQU	EPWM13_RA_EPWMRA11,		11
	.EQU	EPWM13_RA_EPWMRA10,		10
	.EQU	EPWM13_RA_EPWMRA9,		9
	.EQU	EPWM13_RA_EPWMRA8,		8
	.EQU	EPWM13_RA_EPWMRA7,		7
	.EQU	EPWM13_RA_EPWMRA6,		6
	.EQU	EPWM13_RA_EPWMRA5,		5
	.EQU	EPWM13_RA_EPWMRA4,		4
	.EQU	EPWM13_RA_EPWMRA3,		3
	.EQU	EPWM13_RA_EPWMRA2,		2
	.EQU	EPWM13_RA_EPWMRA1,		1
	.EQU	EPWM13_RA_EPWMRA0,		0
//  register-------------------------------------
	.EQU	EPWM13_RB,		0x40000B18
//  0x4000 0B18  EPWM13_RB   Bits-------------------------------------
	.EQU	EPWM13_RB_EPWMRB31,		31
	.EQU	EPWM13_RB_EPWMRB30,		30
	.EQU	EPWM13_RB_EPWMRB29,		29
	.EQU	EPWM13_RB_EPWMRB28,		28
	.EQU	EPWM13_RB_EPWMRB27,		27
	.EQU	EPWM13_RB_EPWMRB26,		26
	.EQU	EPWM13_RB_EPWMRB25,		25
	.EQU	EPWM13_RB_EPWMRB24,		24
	.EQU	EPWM13_RB_EPWMRB23,		23
	.EQU	EPWM13_RB_EPWMRB22,		22
	.EQU	EPWM13_RB_EPWMRB21,		21
	.EQU	EPWM13_RB_EPWMRB20,		20
	.EQU	EPWM13_RB_EPWMRB19,		19
	.EQU	EPWM13_RB_EPWMRB18,		18
	.EQU	EPWM13_RB_EPWMRB17,		17
	.EQU	EPWM13_RB_EPWMRB16,		16
	.EQU	EPWM13_RB_EPWMRB15,		15
	.EQU	EPWM13_RB_EPWMRB14,		14
	.EQU	EPWM13_RB_EPWMRB13,		13
	.EQU	EPWM13_RB_EPWMRB12,		12
	.EQU	EPWM13_RB_EPWMRB11,		11
	.EQU	EPWM13_RB_EPWMRB10,		10
	.EQU	EPWM13_RB_EPWMRB9,		9
	.EQU	EPWM13_RB_EPWMRB8,		8
	.EQU	EPWM13_RB_EPWMRB7,		7
	.EQU	EPWM13_RB_EPWMRB6,		6
	.EQU	EPWM13_RB_EPWMRB5,		5
	.EQU	EPWM13_RB_EPWMRB4,		4
	.EQU	EPWM13_RB_EPWMRB3,		3
	.EQU	EPWM13_RB_EPWMRB2,		2
	.EQU	EPWM13_RB_EPWMRB1,		1
	.EQU	EPWM13_RB_EPWMRB0,		0
//  register-------------------------------------
	.EQU	EPWM13_CTLA,	0x40000B1C
//  0x4000 0B1C  EPWM13_CTLA   Bits-------------------------------------
	.EQU	EPWM13_CTLA_STSFA,		16
	.EQU	EPWM13_CTLA_ACTSFA1,		15
	.EQU	EPWM13_CTLA_ACTSFA0,		14
	.EQU	EPWM13_CTLA_CSFA1,		13
	.EQU	EPWM13_CTLA_CSFA0,		12
	.EQU	EPWM13_CTLA_ACBD1,		11
	.EQU	EPWM13_CTLA_ACBD0,		10
	.EQU	EPWM13_CTLA_ACBU1,		9
	.EQU	EPWM13_CTLA_ACBU0,		8
	.EQU	EPWM13_CTLA_ACAD1,		7
	.EQU	EPWM13_CTLA_ACAD0,		6
	.EQU	EPWM13_CTLA_ACAU1,		5
	.EQU	EPWM13_CTLA_ACAU0,		4
	.EQU	EPWM13_CTLA_APRD1,		3
	.EQU	EPWM13_CTLA_APRD0,		2
	.EQU	EPWM13_CTLA_AZRO1,		1
	.EQU	EPWM13_CTLA_AZRO0,		0
//  register-------------------------------------
	.EQU	EPWM13_CTLB,	0x40000B20
//  0x4000 0B20  EPWM13_CTLB   Bits-------------------------------------
	.EQU	EPWM13_CTLB_OTSFB,		16
	.EQU	EPWM13_CTLB_ACTSFB1,		15
	.EQU	EPWM13_CTLB_ACTSFB0,		14
	.EQU	EPWM13_CTLB_CSFB1,		13
	.EQU	EPWM13_CTLB_CSFB0,		12
	.EQU	EPWM13_CTLB_BCBD1,		11
	.EQU	EPWM13_CTLB_BCBD0,		10
	.EQU	EPWM13_CTLB_BCBU1,		9
	.EQU	EPWM13_CTLB_BCBU0,		8
	.EQU	EPWM13_CTLB_BCAD1,		7
	.EQU	EPWM13_CTLB_BCAD0,		6
	.EQU	EPWM13_CTLB_BCAU1,		5
	.EQU	EPWM13_CTLB_BCAU0,		4
	.EQU	EPWM13_CTLB_BPRD1,		3
	.EQU	EPWM13_CTLB_BPRD0,		2
	.EQU	EPWM13_CTLB_BZRO1,		1
	.EQU	EPWM13_CTLB_BZRO0,		0
//  register-------------------------------------
	.EQU	EPWM13_DBCTL,	0x40000B24
//  0x4000 0B24  EPWM13_DBCTL   Bits-------------------------------------
	.EQU	EPWM13_DBCTL_INMODE1,		5
	.EQU	EPWM13_DBCTL_INMODE0,		4
	.EQU	EPWM13_DBCTL_POLSEL1,		3
	.EQU	EPWM13_DBCTL_POLSEL0,		2
	.EQU	EPWM13_DBCTL_OUTMODE1,		1
	.EQU	EPWM13_DBCTL_OUTMODE0,		0
//  register-------------------------------------
	.EQU	EPWM13_DBT,	0x40000B28
//  0x4000 0B28  EPWM13_DBT   Bits-------------------------------------
	.EQU	EPWM13_DBT_RDBT15,		31
	.EQU	EPWM13_DBT_RDBT14,		30
	.EQU	EPWM13_DBT_RDBT13,		29
	.EQU	EPWM13_DBT_RDBT12,		28
	.EQU	EPWM13_DBT_RDBT11,		27
	.EQU	EPWM13_DBT_RDBT10,		26
	.EQU	EPWM13_DBT_RDBT9,		25
	.EQU	EPWM13_DBT_RDBT8,		24
	.EQU	EPWM13_DBT_RDBT7,		23
	.EQU	EPWM13_DBT_RDBT6,		22
	.EQU	EPWM13_DBT_RDBT5,		21
	.EQU	EPWM13_DBT_RDBT4,		20
	.EQU	EPWM13_DBT_RDBT3,		19
	.EQU	EPWM13_DBT_RDBT2,		18
	.EQU	EPWM13_DBT_RDBT1,		17
	.EQU	EPWM13_DBT_RDBT0,		16
	.EQU	EPWM13_DBT_FDBT15,		15
	.EQU	EPWM13_DBT_FDBT14,		14
	.EQU	EPWM13_DBT_FDBT13,		13
	.EQU	EPWM13_DBT_FDBT12,		12
	.EQU	EPWM13_DBT_FDBT11,		11
	.EQU	EPWM13_DBT_FDBT10,		10
	.EQU	EPWM13_DBT_FDBT9,		9
	.EQU	EPWM13_DBT_FDBT8,		8
	.EQU	EPWM13_DBT_FDBT7,		7
	.EQU	EPWM13_DBT_FDBT6,		6
	.EQU	EPWM13_DBT_FDBT5,		5
	.EQU	EPWM13_DBT_FDBT4,		4
	.EQU	EPWM13_DBT_FDBT3,		3
	.EQU	EPWM13_DBT_FDBT2,		2
	.EQU	EPWM13_DBT_FDBT1,		1
	.EQU	EPWM13_DBT_FDBT0,		0
//  register-------------------------------------
	.EQU	EPWM13_PCCTL,	0x40000B2C
//  0x4000 0B2C  EPWM13_PCCTL   Bits-------------------------------------
	.EQU	EPWM13_PCCTL_CHPFREQ2,		10
	.EQU	EPWM13_PCCTL_CHPFREQ1,		9
	.EQU	EPWM13_PCCTL_CHPFREQ0,		8
	.EQU	EPWM13_PCCTL_CHPDUTY2,		7
	.EQU	EPWM13_PCCTL_CHPDUTY1,		6
	.EQU	EPWM13_PCCTL_CHPDUTY0,		5
	.EQU	EPWM13_PCCTL_OSHTWTH3,		4
	.EQU	EPWM13_PCCTL_OSHTWTH2,		3
	.EQU	EPWM13_PCCTL_OSHTWTH1,		2
	.EQU	EPWM13_PCCTL_OSHTWTH0,		1
	.EQU	EPWM13_PCCTL_CHPEN,		0
//  register-------------------------------------
	.EQU	EPWM13_PXASCTL,	0x40000B30
//  0x4000 0B30  EPWM13_PXASCTL   Bits-------------------------------------
	.EQU	EPWM13_PXASCTL_PXAVNEG,		10
	.EQU	EPWM13_PXASCTL_PXASE,		9
	.EQU	EPWM13_PXASCTL_PXRSEN,		8
	.EQU	EPWM13_PXASCTL_PXSSA1,		7
	.EQU	EPWM13_PXASCTL_PXSSA0,		6
	.EQU	EPWM13_PXASCTL_PXSSB1,		5
	.EQU	EPWM13_PXASCTL_PXSSB0,		4
	.EQU	EPWM13_PXASCTL_PXASS3,		3
	.EQU	EPWM13_PXASCTL_PXASS2,		2
	.EQU	EPWM13_PXASCTL_PXASS1,		1
	.EQU	EPWM13_PXASCTL_PXASS0,		0
//  register-------------------------------------
	.EQU	EPWM13_ETCTL,	0x40000B34
//  0x4000 0B34  EPWM13_ETCTL   Bits-------------------------------------
	.EQU	EPWM13_ETCTL_BTSEL1,		25
	.EQU	EPWM13_ETCTL_BTSEL0,		24
	.EQU	EPWM13_ETCTL_FRCB,		19
	.EQU	EPWM13_ETCTL_TOADENB,		16
	.EQU	EPWM13_ETCTL_ATSEL1,		9
	.EQU	EPWM13_ETCTL_ATSEL0,		8
	.EQU	EPWM13_ETCTL_FRCA,		3
	.EQU	EPWM13_ETCTL_TOADENA,		0
//  register-------------------------------------
	.EQU	EPWM13_IE,		0x40000B38
//  0x4000 0B38  EPWM13_IE   Bits-------------------------------------
	.EQU	EPWM13_IE_CAPIE,		9
	.EQU	EPWM13_IE_TXDIE,		8
	.EQU	EPWM13_IE_TXCIE,		7
	.EQU	EPWM13_IE_TXAIE,		6
	.EQU	EPWM13_IE_TXBIE,		5
	.EQU	EPWM13_IE_TXIE,		4
	.EQU	EPWM13_IE_TXUIE,		3
	.EQU	EPWM13_IE_TXGIE,		2
	.EQU	EPWM13_IE_TXTIE1,		1
	.EQU	EPWM13_IE_TXTIE0,		0
//  register-------------------------------------
	.EQU	EPWM13_IF,		0x40000B3C
//  0x4000 0B3C  EPWM13_IF   Bits-------------------------------------
	.EQU	EPWM13_IF_CAPIF,		9
	.EQU	EPWM13_IF_TXDIF,		8
	.EQU	EPWM13_IF_TXCIF,		7
	.EQU	EPWM13_IF_TXAIF,		6
	.EQU	EPWM13_IF_TXBIF,		5
	.EQU	EPWM13_IF_TXIF,		4
	.EQU	EPWM13_IF_TXUIF,		3
	.EQU	EPWM13_IF_TXGIF,		2
	.EQU	EPWM13_IF_TXTIF1,		1
	.EQU	EPWM13_IF_TXTIF0,		0
//  register-------------------------------------
	.EQU	EPWM13_IC,		0x40000B40
//  0x4000 0B40  EPWM13_IC   Bits-------------------------------------
	.EQU	EPWM13_IC_CAPIC1,		10
	.EQU	EPWM13_IC_CAPIC0,		9
	.EQU	EPWM13_IC_TXDIC,		8
	.EQU	EPWM13_IC_TXCIC,		7
	.EQU	EPWM13_IC_TXAIC,		6
	.EQU	EPWM13_IC_TXBIC,		5
	.EQU	EPWM13_IC_TXIC,		4
	.EQU	EPWM13_IC_TXUIC,		3
	.EQU	EPWM13_IC_TXGIC,		2
	.EQU	EPWM13_IC_TXTIC1,		1
	.EQU	EPWM13_IC_TXTIC0,		0
//  register-------------------------------------
	.EQU	EPWM13_DE,		0x40000B44
//  0x4000 0B44  EPWM13_DE   Bits-------------------------------------
	.EQU	EPWM13_DE_TXDDE,		8
	.EQU	EPWM13_DE_TXCDE,		7
	.EQU	EPWM13_DE_TXADE,		6
	.EQU	EPWM13_DE_TXBDE,		5
	.EQU	EPWM13_DE_TXDE,		4
	.EQU	EPWM13_DE_TXUDE,		3
	.EQU	EPWM13_DE_TXGDE,		2
	.EQU	EPWM13_DE_TXTDE1,		1
	.EQU	EPWM13_DE_TXTDE0,		0
//  register-------------------------------------
	.EQU	EPWM13_DF,		0x40000B48
//  0x4000 0B48  EPWM13_DF   Bits-------------------------------------
	.EQU	EPWM13_DF_TXDDF,		8
	.EQU	EPWM13_DF_TXCDF,		7
	.EQU	EPWM13_DF_TXADF,		6
	.EQU	EPWM13_DF_TXBDF,		5
	.EQU	EPWM13_DF_TXDF,		4
	.EQU	EPWM13_DF_TXUDF,		3
	.EQU	EPWM13_DF_TXGDF,		2
	.EQU	EPWM13_DF_TXTDF1,		1
	.EQU	EPWM13_DF_TXTDF0,		0
//  register-------------------------------------
	.EQU	EPWM13_HRPWMCTLA,	0x40000B50
//  0x4000 0B50  EPWM13_HRPWMCTLA   Bits-------------------------------------
	.EQU	EPWM13_HRPWMCTLA_HRPHSENA,		6
	.EQU	EPWM13_HRPWMCTLA_HRFENA,		5
	.EQU	EPWM13_HRPWMCTLA_HRRENA,		4
	.EQU	EPWM13_HRPWMCTLA_HRPENA,		3
	.EQU	EPWM13_HRPWMCTLA_HRDENA,		2
	.EQU	EPWM13_HRPWMCTLA_HRSELA,		1
	.EQU	EPWM13_HRPWMCTLA_HRENA,		0
//  register-------------------------------------
	.EQU	EPWM13_HRCMPA,	0x40000B54
//  0x4000 0B54  EPWM13_HRCMPA   Bits-------------------------------------
	.EQU	EPWM13_HRCMPA_HRCMPA7,		7
	.EQU	EPWM13_HRCMPA_HRCMPA6,		6
	.EQU	EPWM13_HRCMPA_HRCMPA5,		5
	.EQU	EPWM13_HRCMPA_HRCMPA4,		4
	.EQU	EPWM13_HRCMPA_HRCMPA3,		3
	.EQU	EPWM13_HRCMPA_HRCMPA2,		2
	.EQU	EPWM13_HRCMPA_HRCMPA1,		1
	.EQU	EPWM13_HRCMPA_HRCMPA0,		0
//  register-------------------------------------
	.EQU	EPWM13_CAP,	0x40000B58
//  0x4000 0B58  EPWM13_CAP   Bits-------------------------------------
	.EQU	EPWM13_CAP_CAP31,		31
	.EQU	EPWM13_CAP_CAP30,		30
	.EQU	EPWM13_CAP_CAP29,		29
	.EQU	EPWM13_CAP_CAP28,		28
	.EQU	EPWM13_CAP_CAP27,		27
	.EQU	EPWM13_CAP_CAP26,		26
	.EQU	EPWM13_CAP_CAP25,		25
	.EQU	EPWM13_CAP_CAP24,		24
	.EQU	EPWM13_CAP_CAP23,		23
	.EQU	EPWM13_CAP_CAP22,		22
	.EQU	EPWM13_CAP_CAP21,		21
	.EQU	EPWM13_CAP_CAP20,		20
	.EQU	EPWM13_CAP_CAP19,		19
	.EQU	EPWM13_CAP_CAP18,		18
	.EQU	EPWM13_CAP_CAP17,		17
	.EQU	EPWM13_CAP_CAP16,		16
	.EQU	EPWM13_CAP_CAP15,		15
	.EQU	EPWM13_CAP_CAP14,		14
	.EQU	EPWM13_CAP_CAP13,		13
	.EQU	EPWM13_CAP_CAP12,		12
	.EQU	EPWM13_CAP_CAP11,		11
	.EQU	EPWM13_CAP_CAP10,		10
	.EQU	EPWM13_CAP_CAP9,		9
	.EQU	EPWM13_CAP_CAP8,		8
	.EQU	EPWM13_CAP_CAP7,		7
	.EQU	EPWM13_CAP_CAP6,		6
	.EQU	EPWM13_CAP_CAP5,		5
	.EQU	EPWM13_CAP_CAP4,		4
	.EQU	EPWM13_CAP_CAP3,		3
	.EQU	EPWM13_CAP_CAP2,		2
	.EQU	EPWM13_CAP_CAP1,		1
	.EQU	EPWM13_CAP_CAP0,		0
//  register-------------------------------------
	.EQU	EPWM13_RC,		0x40000B5C
//  0x4000 0B5C  EPWM13_RC   Bits-------------------------------------
	.EQU	EPWM13_RC_EPWMRC31,		31
	.EQU	EPWM13_RC_EPWMRC30,		30
	.EQU	EPWM13_RC_EPWMRC29,		29
	.EQU	EPWM13_RC_EPWMRC28,		28
	.EQU	EPWM13_RC_EPWMRC27,		27
	.EQU	EPWM13_RC_EPWMRC26,		26
	.EQU	EPWM13_RC_EPWMRC25,		25
	.EQU	EPWM13_RC_EPWMRC24,		24
	.EQU	EPWM13_RC_EPWMRC23,		23
	.EQU	EPWM13_RC_EPWMRC22,		22
	.EQU	EPWM13_RC_EPWMRC21,		21
	.EQU	EPWM13_RC_EPWMRC20,		20
	.EQU	EPWM13_RC_EPWMRC19,		19
	.EQU	EPWM13_RC_EPWMRC18,		18
	.EQU	EPWM13_RC_EPWMRC17,		17
	.EQU	EPWM13_RC_EPWMRC16,		16
	.EQU	EPWM13_RC_EPWMRC15,		15
	.EQU	EPWM13_RC_EPWMRC14,		14
	.EQU	EPWM13_RC_EPWMRC13,		13
	.EQU	EPWM13_RC_EPWMRC12,		12
	.EQU	EPWM13_RC_EPWMRC11,		11
	.EQU	EPWM13_RC_EPWMRC10,		10
	.EQU	EPWM13_RC_EPWMRC9,		9
	.EQU	EPWM13_RC_EPWMRC8,		8
	.EQU	EPWM13_RC_EPWMRC7,		7
	.EQU	EPWM13_RC_EPWMRC6,		6
	.EQU	EPWM13_RC_EPWMRC5,		5
	.EQU	EPWM13_RC_EPWMRC4,		4
	.EQU	EPWM13_RC_EPWMRC3,		3
	.EQU	EPWM13_RC_EPWMRC2,		2
	.EQU	EPWM13_RC_EPWMRC1,		1
	.EQU	EPWM13_RC_EPWMRC0,		0
//  register-------------------------------------
	.EQU	EPWM13_RD,		0x40000B60
//  0x4000 0B60  EPWM13_RD   Bits-------------------------------------
	.EQU	EPWM13_RD_EPWMRD31,		31
	.EQU	EPWM13_RD_EPWMRD30,		30
	.EQU	EPWM13_RD_EPWMRD29,		29
	.EQU	EPWM13_RD_EPWMRD28,		28
	.EQU	EPWM13_RD_EPWMRD27,		27
	.EQU	EPWM13_RD_EPWMRD26,		26
	.EQU	EPWM13_RD_EPWMRD25,		25
	.EQU	EPWM13_RD_EPWMRD24,		24
	.EQU	EPWM13_RD_EPWMRD23,		23
	.EQU	EPWM13_RD_EPWMRD22,		22
	.EQU	EPWM13_RD_EPWMRD21,		21
	.EQU	EPWM13_RD_EPWMRD20,		20
	.EQU	EPWM13_RD_EPWMRD19,		19
	.EQU	EPWM13_RD_EPWMRD18,		18
	.EQU	EPWM13_RD_EPWMRD17,		17
	.EQU	EPWM13_RD_EPWMRD16,		16
	.EQU	EPWM13_RD_EPWMRD15,		15
	.EQU	EPWM13_RD_EPWMRD14,		14
	.EQU	EPWM13_RD_EPWMRD13,		13
	.EQU	EPWM13_RD_EPWMRD12,		12
	.EQU	EPWM13_RD_EPWMRD11,		11
	.EQU	EPWM13_RD_EPWMRD10,		10
	.EQU	EPWM13_RD_EPWMRD9,		9
	.EQU	EPWM13_RD_EPWMRD8,		8
	.EQU	EPWM13_RD_EPWMRD7,		7
	.EQU	EPWM13_RD_EPWMRD6,		6
	.EQU	EPWM13_RD_EPWMRD5,		5
	.EQU	EPWM13_RD_EPWMRD4,		4
	.EQU	EPWM13_RD_EPWMRD3,		3
	.EQU	EPWM13_RD_EPWMRD2,		2
	.EQU	EPWM13_RD_EPWMRD1,		1
	.EQU	EPWM13_RD_EPWMRD0,		0
//  register-------------------------------------
	.EQU	EPWM13_UDCTL,	0x40000B64
//  0x4000 0B64  EPWM13_UDCTL   Bits-------------------------------------
	.EQU	EPWM13_UDCTL_GBUDEN,		27
//  register-------------------------------------
	.EQU	T14_CNT,		0x40000C00
//  0x4000 0C00  T14_CNT   Bits-------------------------------------
	.EQU	T14_CNT_TXCNT31,		31
	.EQU	T14_CNT_TXCNT30,		30
	.EQU	T14_CNT_TXCNT29,		29
	.EQU	T14_CNT_TXCNT28,		28
	.EQU	T14_CNT_TXCNT27,		27
	.EQU	T14_CNT_TXCNT26,		26
	.EQU	T14_CNT_TXCNT25,		25
	.EQU	T14_CNT_TXCNT24,		24
	.EQU	T14_CNT_TXCNT23,		23
	.EQU	T14_CNT_TXCNT22,		22
	.EQU	T14_CNT_TXCNT21,		21
	.EQU	T14_CNT_TXCNT20,		20
	.EQU	T14_CNT_TXCNT19,		19
	.EQU	T14_CNT_TXCNT18,		18
	.EQU	T14_CNT_TXCNT17,		17
	.EQU	T14_CNT_TXCNT16,		16
	.EQU	T14_CNT_TXCNT15,		15
	.EQU	T14_CNT_TXCNT14,		14
	.EQU	T14_CNT_TXCNT13,		13
	.EQU	T14_CNT_TXCNT12,		12
	.EQU	T14_CNT_TXCNT11,		11
	.EQU	T14_CNT_TXCNT10,		10
	.EQU	T14_CNT_TXCNT9,		9
	.EQU	T14_CNT_TXCNT8,		8
	.EQU	T14_CNT_TXCNT7,		7
	.EQU	T14_CNT_TXCNT6,		6
	.EQU	T14_CNT_TXCNT5,		5
	.EQU	T14_CNT_TXCNT4,		4
	.EQU	T14_CNT_TXCNT3,		3
	.EQU	T14_CNT_TXCNT2,		2
	.EQU	T14_CNT_TXCNT1,		1
	.EQU	T14_CNT_TXCNT0,		0
//  register-------------------------------------
	.EQU	T14_PHS,		0x40000C04
//  0x4000 0C04  T14_PHS   Bits-------------------------------------
	.EQU	T14_PHS_TXPHS31,		31
	.EQU	T14_PHS_TXPHS30,		30
	.EQU	T14_PHS_TXPHS29,		29
	.EQU	T14_PHS_TXPHS28,		28
	.EQU	T14_PHS_TXPHS27,		27
	.EQU	T14_PHS_TXPHS26,		26
	.EQU	T14_PHS_TXPHS25,		25
	.EQU	T14_PHS_TXPHS24,		24
	.EQU	T14_PHS_TXPHS23,		23
	.EQU	T14_PHS_TXPHS22,		22
	.EQU	T14_PHS_TXPHS21,		21
	.EQU	T14_PHS_TXPHS20,		20
	.EQU	T14_PHS_TXPHS19,		19
	.EQU	T14_PHS_TXPHS18,		18
	.EQU	T14_PHS_TXPHS17,		17
	.EQU	T14_PHS_TXPHS16,		16
	.EQU	T14_PHS_TXPHS15,		15
	.EQU	T14_PHS_TXPHS14,		14
	.EQU	T14_PHS_TXPHS13,		13
	.EQU	T14_PHS_TXPHS12,		12
	.EQU	T14_PHS_TXPHS11,		11
	.EQU	T14_PHS_TXPHS10,		10
	.EQU	T14_PHS_TXPHS9,		9
	.EQU	T14_PHS_TXPHS8,		8
	.EQU	T14_PHS_TXPHS7,		7
	.EQU	T14_PHS_TXPHS6,		6
	.EQU	T14_PHS_TXPHS5,		5
	.EQU	T14_PHS_TXPHS4,		4
	.EQU	T14_PHS_TXPHS3,		3
	.EQU	T14_PHS_TXPHS2,		2
	.EQU	T14_PHS_TXPHS1,		1
	.EQU	T14_PHS_TXPHS0,		0
//  register-------------------------------------
	.EQU	T14_PPX,		0x40000C08
//  0x4000 0C08  T14_PPX   Bits-------------------------------------
	.EQU	T14_PPX_PPX31,		31
	.EQU	T14_PPX_PPX30,		30
	.EQU	T14_PPX_PPX29,		29
	.EQU	T14_PPX_PPX28,		28
	.EQU	T14_PPX_PPX27,		27
	.EQU	T14_PPX_PPX26,		26
	.EQU	T14_PPX_PPX25,		25
	.EQU	T14_PPX_PPX24,		24
	.EQU	T14_PPX_PPX23,		23
	.EQU	T14_PPX_PPX22,		22
	.EQU	T14_PPX_PPX21,		21
	.EQU	T14_PPX_PPX20,		20
	.EQU	T14_PPX_PPX19,		19
	.EQU	T14_PPX_PPX18,		18
	.EQU	T14_PPX_PPX17,		17
	.EQU	T14_PPX_PPX16,		16
	.EQU	T14_PPX_PPX15,		15
	.EQU	T14_PPX_PPX14,		14
	.EQU	T14_PPX_PPX13,		13
	.EQU	T14_PPX_PPX12,		12
	.EQU	T14_PPX_PPX11,		11
	.EQU	T14_PPX_PPX10,		10
	.EQU	T14_PPX_PPX9,		9
	.EQU	T14_PPX_PPX8,		8
	.EQU	T14_PPX_PPX7,		7
	.EQU	T14_PPX_PPX6,		6
	.EQU	T14_PPX_PPX5,		5
	.EQU	T14_PPX_PPX4,		4
	.EQU	T14_PPX_PPX3,		3
	.EQU	T14_PPX_PPX2,		2
	.EQU	T14_PPX_PPX1,		1
	.EQU	T14_PPX_PPX0,		0
//  register-------------------------------------
	.EQU	T14_PRSC,		0x40000C0C
//  0x4000 0C0C  T14_PRSC   Bits-------------------------------------
	.EQU	T14_PRSC_TXPRSC31,		31
	.EQU	T14_PRSC_TXPRSC30,		30
	.EQU	T14_PRSC_TXPRSC29,		29
	.EQU	T14_PRSC_TXPRSC28,		28
	.EQU	T14_PRSC_TXPRSC27,		27
	.EQU	T14_PRSC_TXPRSC26,		26
	.EQU	T14_PRSC_TXPRSC25,		25
	.EQU	T14_PRSC_TXPRSC24,		24
	.EQU	T14_PRSC_TXPRSC23,		23
	.EQU	T14_PRSC_TXPRSC22,		22
	.EQU	T14_PRSC_TXPRSC21,		21
	.EQU	T14_PRSC_TXPRSC20,		20
	.EQU	T14_PRSC_TXPRSC19,		19
	.EQU	T14_PRSC_TXPRSC18,		18
	.EQU	T14_PRSC_TXPRSC17,		17
	.EQU	T14_PRSC_TXPRSC16,		16
	.EQU	T14_PRSC_TXPRSC15,		15
	.EQU	T14_PRSC_TXPRSC14,		14
	.EQU	T14_PRSC_TXPRSC13,		13
	.EQU	T14_PRSC_TXPRSC12,		12
	.EQU	T14_PRSC_TXPRSC11,		11
	.EQU	T14_PRSC_TXPRSC10,		10
	.EQU	T14_PRSC_TXPRSC9,		9
	.EQU	T14_PRSC_TXPRSC8,		8
	.EQU	T14_PRSC_TXPRSC7,		7
	.EQU	T14_PRSC_TXPRSC6,		6
	.EQU	T14_PRSC_TXPRSC5,		5
	.EQU	T14_PRSC_TXPRSC4,		4
	.EQU	T14_PRSC_TXPRSC3,		3
	.EQU	T14_PRSC_TXPRSC2,		2
	.EQU	T14_PRSC_TXPRSC1,		1
	.EQU	T14_PRSC_TXPRSC0,		0
//  register-------------------------------------
	.EQU	T14_CTL,		0x40000C10
//  0x4000 0C10  T14_CTL   Bits-------------------------------------
	.EQU	T14_CTL_BLINKEN,		31
	.EQU	T14_CTL_UDSYNEN,		29
	.EQU	T14_CTL_ETLOCK,		27
	.EQU	T14_CTL_DBLOCK,		25
	.EQU	T14_CTL_AQLOCKB,		24
	.EQU	T14_CTL_AQLOCKA,		23
	.EQU	T14_CTL_CAPEN,		22
	.EQU	T14_CTL_CAPSEL,		21
	.EQU	T14_CTL_TXMAX,		19
	.EQU	T14_CTL_PHSDIR,		18
	.EQU	T14_CTL_SWFSYNC,		17
	.EQU	T14_CTL_SYNCOSEL1,		16
	.EQU	T14_CTL_SYNCOSEL0,		15
	.EQU	T14_CTL_PHSEN,		14
	.EQU	T14_CTL_SYNCI,		13
	.EQU	T14_CTL_TXUR,		12
	.EQU	T14_CTL_TXUDEVT,		11
	.EQU	T14_CTL_TXUDEN,		10
	.EQU	T14_CTL_TXCMS2,		9
	.EQU	T14_CTL_TXCMS1,		8
	.EQU	T14_CTL_TXCMS0,		7
	.EQU	T14_CTL_TXDIR,		6
	.EQU	T14_CTL_TXCLK1,		5
	.EQU	T14_CTL_TXCLK0,		4
	.EQU	T14_CTL_TXSY,		3
	.EQU	T14_CTL_TXGATE,		2
	.EQU	T14_CTL_TXCS,		1
	.EQU	T14_CTL_TXEN,		0
//  register-------------------------------------
	.EQU	EPWM14_RA,		0x40000C14
//  0x4000 0C14  EPWM14_RA   Bits-------------------------------------
	.EQU	EPWM14_RA_EPWMRA31,		31
	.EQU	EPWM14_RA_EPWMRA30,		30
	.EQU	EPWM14_RA_EPWMRA29,		29
	.EQU	EPWM14_RA_EPWMRA28,		28
	.EQU	EPWM14_RA_EPWMRA27,		27
	.EQU	EPWM14_RA_EPWMRA26,		26
	.EQU	EPWM14_RA_EPWMRA25,		25
	.EQU	EPWM14_RA_EPWMRA24,		24
	.EQU	EPWM14_RA_EPWMRA23,		23
	.EQU	EPWM14_RA_EPWMRA22,		22
	.EQU	EPWM14_RA_EPWMRA21,		21
	.EQU	EPWM14_RA_EPWMRA20,		20
	.EQU	EPWM14_RA_EPWMRA19,		19
	.EQU	EPWM14_RA_EPWMRA18,		18
	.EQU	EPWM14_RA_EPWMRA17,		17
	.EQU	EPWM14_RA_EPWMRA16,		16
	.EQU	EPWM14_RA_EPWMRA15,		15
	.EQU	EPWM14_RA_EPWMRA14,		14
	.EQU	EPWM14_RA_EPWMRA13,		13
	.EQU	EPWM14_RA_EPWMRA12,		12
	.EQU	EPWM14_RA_EPWMRA11,		11
	.EQU	EPWM14_RA_EPWMRA10,		10
	.EQU	EPWM14_RA_EPWMRA9,		9
	.EQU	EPWM14_RA_EPWMRA8,		8
	.EQU	EPWM14_RA_EPWMRA7,		7
	.EQU	EPWM14_RA_EPWMRA6,		6
	.EQU	EPWM14_RA_EPWMRA5,		5
	.EQU	EPWM14_RA_EPWMRA4,		4
	.EQU	EPWM14_RA_EPWMRA3,		3
	.EQU	EPWM14_RA_EPWMRA2,		2
	.EQU	EPWM14_RA_EPWMRA1,		1
	.EQU	EPWM14_RA_EPWMRA0,		0
//  register-------------------------------------
	.EQU	EPWM14_RB,		0x40000C18
//  0x4000 0C18  EPWM14_RB   Bits-------------------------------------
	.EQU	EPWM14_RB_EPWMRB31,		31
	.EQU	EPWM14_RB_EPWMRB30,		30
	.EQU	EPWM14_RB_EPWMRB29,		29
	.EQU	EPWM14_RB_EPWMRB28,		28
	.EQU	EPWM14_RB_EPWMRB27,		27
	.EQU	EPWM14_RB_EPWMRB26,		26
	.EQU	EPWM14_RB_EPWMRB25,		25
	.EQU	EPWM14_RB_EPWMRB24,		24
	.EQU	EPWM14_RB_EPWMRB23,		23
	.EQU	EPWM14_RB_EPWMRB22,		22
	.EQU	EPWM14_RB_EPWMRB21,		21
	.EQU	EPWM14_RB_EPWMRB20,		20
	.EQU	EPWM14_RB_EPWMRB19,		19
	.EQU	EPWM14_RB_EPWMRB18,		18
	.EQU	EPWM14_RB_EPWMRB17,		17
	.EQU	EPWM14_RB_EPWMRB16,		16
	.EQU	EPWM14_RB_EPWMRB15,		15
	.EQU	EPWM14_RB_EPWMRB14,		14
	.EQU	EPWM14_RB_EPWMRB13,		13
	.EQU	EPWM14_RB_EPWMRB12,		12
	.EQU	EPWM14_RB_EPWMRB11,		11
	.EQU	EPWM14_RB_EPWMRB10,		10
	.EQU	EPWM14_RB_EPWMRB9,		9
	.EQU	EPWM14_RB_EPWMRB8,		8
	.EQU	EPWM14_RB_EPWMRB7,		7
	.EQU	EPWM14_RB_EPWMRB6,		6
	.EQU	EPWM14_RB_EPWMRB5,		5
	.EQU	EPWM14_RB_EPWMRB4,		4
	.EQU	EPWM14_RB_EPWMRB3,		3
	.EQU	EPWM14_RB_EPWMRB2,		2
	.EQU	EPWM14_RB_EPWMRB1,		1
	.EQU	EPWM14_RB_EPWMRB0,		0
//  register-------------------------------------
	.EQU	EPWM14_CTLA,	0x40000C1C
//  0x4000 0C1C  EPWM14_CTLA   Bits-------------------------------------
	.EQU	EPWM14_CTLA_STSFA,		16
	.EQU	EPWM14_CTLA_ACTSFA1,		15
	.EQU	EPWM14_CTLA_ACTSFA0,		14
	.EQU	EPWM14_CTLA_CSFA1,		13
	.EQU	EPWM14_CTLA_CSFA0,		12
	.EQU	EPWM14_CTLA_ACBD1,		11
	.EQU	EPWM14_CTLA_ACBD0,		10
	.EQU	EPWM14_CTLA_ACBU1,		9
	.EQU	EPWM14_CTLA_ACBU0,		8
	.EQU	EPWM14_CTLA_ACAD1,		7
	.EQU	EPWM14_CTLA_ACAD0,		6
	.EQU	EPWM14_CTLA_ACAU1,		5
	.EQU	EPWM14_CTLA_ACAU0,		4
	.EQU	EPWM14_CTLA_APRD1,		3
	.EQU	EPWM14_CTLA_APRD0,		2
	.EQU	EPWM14_CTLA_AZRO1,		1
	.EQU	EPWM14_CTLA_AZRO0,		0
//  register-------------------------------------
	.EQU	EPWM14_CTLB,	0x40000C20
//  0x4000 0C20  EPWM14_CTLB   Bits-------------------------------------
	.EQU	EPWM14_CTLB_OTSFB,		16
	.EQU	EPWM14_CTLB_ACTSFB1,		15
	.EQU	EPWM14_CTLB_ACTSFB0,		14
	.EQU	EPWM14_CTLB_CSFB1,		13
	.EQU	EPWM14_CTLB_CSFB0,		12
	.EQU	EPWM14_CTLB_BCBD1,		11
	.EQU	EPWM14_CTLB_BCBD0,		10
	.EQU	EPWM14_CTLB_BCBU1,		9
	.EQU	EPWM14_CTLB_BCBU0,		8
	.EQU	EPWM14_CTLB_BCAD1,		7
	.EQU	EPWM14_CTLB_BCAD0,		6
	.EQU	EPWM14_CTLB_BCAU1,		5
	.EQU	EPWM14_CTLB_BCAU0,		4
	.EQU	EPWM14_CTLB_BPRD1,		3
	.EQU	EPWM14_CTLB_BPRD0,		2
	.EQU	EPWM14_CTLB_BZRO1,		1
	.EQU	EPWM14_CTLB_BZRO0,		0
//  register-------------------------------------
	.EQU	EPWM14_DBCTL,	0x40000C24
//  0x4000 0C24  EPWM14_DBCTL   Bits-------------------------------------
	.EQU	EPWM14_DBCTL_INMODE1,		5
	.EQU	EPWM14_DBCTL_INMODE0,		4
	.EQU	EPWM14_DBCTL_POLSEL1,		3
	.EQU	EPWM14_DBCTL_POLSEL0,		2
	.EQU	EPWM14_DBCTL_OUTMODE1,		1
	.EQU	EPWM14_DBCTL_OUTMODE0,		0
//  register-------------------------------------
	.EQU	EPWM14_DBT,	0x40000C28
//  0x4000 0C28  EPWM14_DBT   Bits-------------------------------------
	.EQU	EPWM14_DBT_RDBT15,		31
	.EQU	EPWM14_DBT_RDBT14,		30
	.EQU	EPWM14_DBT_RDBT13,		29
	.EQU	EPWM14_DBT_RDBT12,		28
	.EQU	EPWM14_DBT_RDBT11,		27
	.EQU	EPWM14_DBT_RDBT10,		26
	.EQU	EPWM14_DBT_RDBT9,		25
	.EQU	EPWM14_DBT_RDBT8,		24
	.EQU	EPWM14_DBT_RDBT7,		23
	.EQU	EPWM14_DBT_RDBT6,		22
	.EQU	EPWM14_DBT_RDBT5,		21
	.EQU	EPWM14_DBT_RDBT4,		20
	.EQU	EPWM14_DBT_RDBT3,		19
	.EQU	EPWM14_DBT_RDBT2,		18
	.EQU	EPWM14_DBT_RDBT1,		17
	.EQU	EPWM14_DBT_RDBT0,		16
	.EQU	EPWM14_DBT_FDBT15,		15
	.EQU	EPWM14_DBT_FDBT14,		14
	.EQU	EPWM14_DBT_FDBT13,		13
	.EQU	EPWM14_DBT_FDBT12,		12
	.EQU	EPWM14_DBT_FDBT11,		11
	.EQU	EPWM14_DBT_FDBT10,		10
	.EQU	EPWM14_DBT_FDBT9,		9
	.EQU	EPWM14_DBT_FDBT8,		8
	.EQU	EPWM14_DBT_FDBT7,		7
	.EQU	EPWM14_DBT_FDBT6,		6
	.EQU	EPWM14_DBT_FDBT5,		5
	.EQU	EPWM14_DBT_FDBT4,		4
	.EQU	EPWM14_DBT_FDBT3,		3
	.EQU	EPWM14_DBT_FDBT2,		2
	.EQU	EPWM14_DBT_FDBT1,		1
	.EQU	EPWM14_DBT_FDBT0,		0
//  register-------------------------------------
	.EQU	EPWM14_PCCTL,	0x40000C2C
//  0x4000 0C2C  EPWM14_PCCTL   Bits-------------------------------------
	.EQU	EPWM14_PCCTL_CHPFREQ2,		10
	.EQU	EPWM14_PCCTL_CHPFREQ1,		9
	.EQU	EPWM14_PCCTL_CHPFREQ0,		8
	.EQU	EPWM14_PCCTL_CHPDUTY2,		7
	.EQU	EPWM14_PCCTL_CHPDUTY1,		6
	.EQU	EPWM14_PCCTL_CHPDUTY0,		5
	.EQU	EPWM14_PCCTL_OSHTWTH3,		4
	.EQU	EPWM14_PCCTL_OSHTWTH2,		3
	.EQU	EPWM14_PCCTL_OSHTWTH1,		2
	.EQU	EPWM14_PCCTL_OSHTWTH0,		1
	.EQU	EPWM14_PCCTL_CHPEN,		0
//  register-------------------------------------
	.EQU	EPWM14_PXASCTL,	0x40000C30
//  0x4000 0C30  EPWM14_PXASCTL   Bits-------------------------------------
	.EQU	EPWM14_PXASCTL_PXAVNEG,		10
	.EQU	EPWM14_PXASCTL_PXASE,		9
	.EQU	EPWM14_PXASCTL_PXRSEN,		8
	.EQU	EPWM14_PXASCTL_PXSSA1,		7
	.EQU	EPWM14_PXASCTL_PXSSA0,		6
	.EQU	EPWM14_PXASCTL_PXSSB1,		5
	.EQU	EPWM14_PXASCTL_PXSSB0,		4
	.EQU	EPWM14_PXASCTL_PXASS3,		3
	.EQU	EPWM14_PXASCTL_PXASS2,		2
	.EQU	EPWM14_PXASCTL_PXASS1,		1
	.EQU	EPWM14_PXASCTL_PXASS0,		0
//  register-------------------------------------
	.EQU	EPWM14_ETCTL,	0x40000C34
//  0x4000 0C34  EPWM14_ETCTL   Bits-------------------------------------
	.EQU	EPWM14_ETCTL_BTSEL1,		25
	.EQU	EPWM14_ETCTL_BTSEL0,		24
	.EQU	EPWM14_ETCTL_FRCB,		19
	.EQU	EPWM14_ETCTL_TOADENB,		16
	.EQU	EPWM14_ETCTL_ATSEL1,		9
	.EQU	EPWM14_ETCTL_ATSEL0,		8
	.EQU	EPWM14_ETCTL_FRCA,		3
	.EQU	EPWM14_ETCTL_TOADENA,		0
//  register-------------------------------------
	.EQU	EPWM14_IE,		0x40000C38
//  0x4000 0C38  EPWM14_IE   Bits-------------------------------------
	.EQU	EPWM14_IE_CAPIE,		9
	.EQU	EPWM14_IE_TXDIE,		8
	.EQU	EPWM14_IE_TXCIE,		7
	.EQU	EPWM14_IE_TXAIE,		6
	.EQU	EPWM14_IE_TXBIE,		5
	.EQU	EPWM14_IE_TXIE,		4
	.EQU	EPWM14_IE_TXUIE,		3
	.EQU	EPWM14_IE_TXGIE,		2
	.EQU	EPWM14_IE_TXTIE1,		1
	.EQU	EPWM14_IE_TXTIE0,		0
//  register-------------------------------------
	.EQU	EPWM14_IF,		0x40000C3C
//  0x4000 0C3C  EPWM14_IF   Bits-------------------------------------
	.EQU	EPWM14_IF_CAPIF,		9
	.EQU	EPWM14_IF_TXDIF,		8
	.EQU	EPWM14_IF_TXCIF,		7
	.EQU	EPWM14_IF_TXAIF,		6
	.EQU	EPWM14_IF_TXBIF,		5
	.EQU	EPWM14_IF_TXIF,		4
	.EQU	EPWM14_IF_TXUIF,		3
	.EQU	EPWM14_IF_TXGIF,		2
	.EQU	EPWM14_IF_TXTIF1,		1
	.EQU	EPWM14_IF_TXTIF0,		0
//  register-------------------------------------
	.EQU	EPWM14_IC,		0x40000C40
//  0x4000 0C40  EPWM14_IC   Bits-------------------------------------
	.EQU	EPWM14_IC_CAPIC1,		10
	.EQU	EPWM14_IC_CAPIC0,		9
	.EQU	EPWM14_IC_TXDIC,		8
	.EQU	EPWM14_IC_TXCIC,		7
	.EQU	EPWM14_IC_TXAIC,		6
	.EQU	EPWM14_IC_TXBIC,		5
	.EQU	EPWM14_IC_TXIC,		4
	.EQU	EPWM14_IC_TXUIC,		3
	.EQU	EPWM14_IC_TXGIC,		2
	.EQU	EPWM14_IC_TXTIC1,		1
	.EQU	EPWM14_IC_TXTIC0,		0
//  register-------------------------------------
	.EQU	EPWM14_DE,		0x40000C44
//  0x4000 0C44  EPWM14_DE   Bits-------------------------------------
	.EQU	EPWM14_DE_TXDDE,		8
	.EQU	EPWM14_DE_TXCDE,		7
	.EQU	EPWM14_DE_TXADE,		6
	.EQU	EPWM14_DE_TXBDE,		5
	.EQU	EPWM14_DE_TXDE,		4
	.EQU	EPWM14_DE_TXUDE,		3
	.EQU	EPWM14_DE_TXGDE,		2
	.EQU	EPWM14_DE_TXTDE1,		1
	.EQU	EPWM14_DE_TXTDE0,		0
//  register-------------------------------------
	.EQU	EPWM14_DF,		0x40000C48
//  0x4000 0C48  EPWM14_DF   Bits-------------------------------------
	.EQU	EPWM14_DF_TXDDF,		8
	.EQU	EPWM14_DF_TXCDF,		7
	.EQU	EPWM14_DF_TXADF,		6
	.EQU	EPWM14_DF_TXBDF,		5
	.EQU	EPWM14_DF_TXDF,		4
	.EQU	EPWM14_DF_TXUDF,		3
	.EQU	EPWM14_DF_TXGDF,		2
	.EQU	EPWM14_DF_TXTDF1,		1
	.EQU	EPWM14_DF_TXTDF0,		0
//  register-------------------------------------
	.EQU	EPWM14_HRPWMCTLA,	0x40000C50
//  0x4000 0C50  EPWM14_HRPWMCTLA   Bits-------------------------------------
	.EQU	EPWM14_HRPWMCTLA_HRPHSENA,		6
	.EQU	EPWM14_HRPWMCTLA_HRFENA,		5
	.EQU	EPWM14_HRPWMCTLA_HRRENA,		4
	.EQU	EPWM14_HRPWMCTLA_HRPENA,		3
	.EQU	EPWM14_HRPWMCTLA_HRDENA,		2
	.EQU	EPWM14_HRPWMCTLA_HRSELA,		1
	.EQU	EPWM14_HRPWMCTLA_HRENA,		0
//  register-------------------------------------
	.EQU	EPWM14_HRCMPA,	0x40000C54
//  0x4000 0C54  EPWM14_HRCMPA   Bits-------------------------------------
	.EQU	EPWM14_HRCMPA_HRCMPA7,		7
	.EQU	EPWM14_HRCMPA_HRCMPA6,		6
	.EQU	EPWM14_HRCMPA_HRCMPA5,		5
	.EQU	EPWM14_HRCMPA_HRCMPA4,		4
	.EQU	EPWM14_HRCMPA_HRCMPA3,		3
	.EQU	EPWM14_HRCMPA_HRCMPA2,		2
	.EQU	EPWM14_HRCMPA_HRCMPA1,		1
	.EQU	EPWM14_HRCMPA_HRCMPA0,		0
//  register-------------------------------------
	.EQU	EPWM14_CAP,	0x40000C58
//  0x4000 0C58  EPWM14_CAP   Bits-------------------------------------
	.EQU	EPWM14_CAP_CAP31,		31
	.EQU	EPWM14_CAP_CAP30,		30
	.EQU	EPWM14_CAP_CAP29,		29
	.EQU	EPWM14_CAP_CAP28,		28
	.EQU	EPWM14_CAP_CAP27,		27
	.EQU	EPWM14_CAP_CAP26,		26
	.EQU	EPWM14_CAP_CAP25,		25
	.EQU	EPWM14_CAP_CAP24,		24
	.EQU	EPWM14_CAP_CAP23,		23
	.EQU	EPWM14_CAP_CAP22,		22
	.EQU	EPWM14_CAP_CAP21,		21
	.EQU	EPWM14_CAP_CAP20,		20
	.EQU	EPWM14_CAP_CAP19,		19
	.EQU	EPWM14_CAP_CAP18,		18
	.EQU	EPWM14_CAP_CAP17,		17
	.EQU	EPWM14_CAP_CAP16,		16
	.EQU	EPWM14_CAP_CAP15,		15
	.EQU	EPWM14_CAP_CAP14,		14
	.EQU	EPWM14_CAP_CAP13,		13
	.EQU	EPWM14_CAP_CAP12,		12
	.EQU	EPWM14_CAP_CAP11,		11
	.EQU	EPWM14_CAP_CAP10,		10
	.EQU	EPWM14_CAP_CAP9,		9
	.EQU	EPWM14_CAP_CAP8,		8
	.EQU	EPWM14_CAP_CAP7,		7
	.EQU	EPWM14_CAP_CAP6,		6
	.EQU	EPWM14_CAP_CAP5,		5
	.EQU	EPWM14_CAP_CAP4,		4
	.EQU	EPWM14_CAP_CAP3,		3
	.EQU	EPWM14_CAP_CAP2,		2
	.EQU	EPWM14_CAP_CAP1,		1
	.EQU	EPWM14_CAP_CAP0,		0
//  register-------------------------------------
	.EQU	EPWM14_RC,		0x40000C5C
//  0x4000 0C5C  EPWM14_RC   Bits-------------------------------------
	.EQU	EPWM14_RC_EPWMRC31,		31
	.EQU	EPWM14_RC_EPWMRC30,		30
	.EQU	EPWM14_RC_EPWMRC29,		29
	.EQU	EPWM14_RC_EPWMRC28,		28
	.EQU	EPWM14_RC_EPWMRC27,		27
	.EQU	EPWM14_RC_EPWMRC26,		26
	.EQU	EPWM14_RC_EPWMRC25,		25
	.EQU	EPWM14_RC_EPWMRC24,		24
	.EQU	EPWM14_RC_EPWMRC23,		23
	.EQU	EPWM14_RC_EPWMRC22,		22
	.EQU	EPWM14_RC_EPWMRC21,		21
	.EQU	EPWM14_RC_EPWMRC20,		20
	.EQU	EPWM14_RC_EPWMRC19,		19
	.EQU	EPWM14_RC_EPWMRC18,		18
	.EQU	EPWM14_RC_EPWMRC17,		17
	.EQU	EPWM14_RC_EPWMRC16,		16
	.EQU	EPWM14_RC_EPWMRC15,		15
	.EQU	EPWM14_RC_EPWMRC14,		14
	.EQU	EPWM14_RC_EPWMRC13,		13
	.EQU	EPWM14_RC_EPWMRC12,		12
	.EQU	EPWM14_RC_EPWMRC11,		11
	.EQU	EPWM14_RC_EPWMRC10,		10
	.EQU	EPWM14_RC_EPWMRC9,		9
	.EQU	EPWM14_RC_EPWMRC8,		8
	.EQU	EPWM14_RC_EPWMRC7,		7
	.EQU	EPWM14_RC_EPWMRC6,		6
	.EQU	EPWM14_RC_EPWMRC5,		5
	.EQU	EPWM14_RC_EPWMRC4,		4
	.EQU	EPWM14_RC_EPWMRC3,		3
	.EQU	EPWM14_RC_EPWMRC2,		2
	.EQU	EPWM14_RC_EPWMRC1,		1
	.EQU	EPWM14_RC_EPWMRC0,		0
//  register-------------------------------------
	.EQU	EPWM14_RD,		0x40000C60
//  0x4000 0C60  EPWM14_RD   Bits-------------------------------------
	.EQU	EPWM14_RD_EPWMRD31,		31
	.EQU	EPWM14_RD_EPWMRD30,		30
	.EQU	EPWM14_RD_EPWMRD29,		29
	.EQU	EPWM14_RD_EPWMRD28,		28
	.EQU	EPWM14_RD_EPWMRD27,		27
	.EQU	EPWM14_RD_EPWMRD26,		26
	.EQU	EPWM14_RD_EPWMRD25,		25
	.EQU	EPWM14_RD_EPWMRD24,		24
	.EQU	EPWM14_RD_EPWMRD23,		23
	.EQU	EPWM14_RD_EPWMRD22,		22
	.EQU	EPWM14_RD_EPWMRD21,		21
	.EQU	EPWM14_RD_EPWMRD20,		20
	.EQU	EPWM14_RD_EPWMRD19,		19
	.EQU	EPWM14_RD_EPWMRD18,		18
	.EQU	EPWM14_RD_EPWMRD17,		17
	.EQU	EPWM14_RD_EPWMRD16,		16
	.EQU	EPWM14_RD_EPWMRD15,		15
	.EQU	EPWM14_RD_EPWMRD14,		14
	.EQU	EPWM14_RD_EPWMRD13,		13
	.EQU	EPWM14_RD_EPWMRD12,		12
	.EQU	EPWM14_RD_EPWMRD11,		11
	.EQU	EPWM14_RD_EPWMRD10,		10
	.EQU	EPWM14_RD_EPWMRD9,		9
	.EQU	EPWM14_RD_EPWMRD8,		8
	.EQU	EPWM14_RD_EPWMRD7,		7
	.EQU	EPWM14_RD_EPWMRD6,		6
	.EQU	EPWM14_RD_EPWMRD5,		5
	.EQU	EPWM14_RD_EPWMRD4,		4
	.EQU	EPWM14_RD_EPWMRD3,		3
	.EQU	EPWM14_RD_EPWMRD2,		2
	.EQU	EPWM14_RD_EPWMRD1,		1
	.EQU	EPWM14_RD_EPWMRD0,		0
//  register-------------------------------------
	.EQU	EPWM14_UDCTL,	0x40000C64
//  0x4000 0C64  EPWM14_UDCTL   Bits-------------------------------------
	.EQU	EPWM14_UDCTL_GBUDEN,		27
//  register-------------------------------------
	.EQU	ADC_CTL0,		0x40000400
//  0x4000 0400  ADC_CTL0   Bits-------------------------------------
	.EQU	ADC_CTL0_WDSCH,		31
	.EQU	ADC_CTL0_HPWDEN,		30
	.EQU	ADC_CTL0_WDEN,		29
	.EQU	ADC_CTL0_DSNUM2,		28
	.EQU	ADC_CTL0_DSNUM1,		27
	.EQU	ADC_CTL0_DSNUM0,		26
	.EQU	ADC_CTL0_HP3DMAEN,		25
	.EQU	ADC_CTL0_HP2DMAEN,		24
	.EQU	ADC_CTL0_HP1DMAEN,		23
	.EQU	ADC_CTL0_HP0DMAEN,		22
	.EQU	ADC_CTL0_HPDSEN,		21
	.EQU	ADC_CTL0_DSEN,		20
	.EQU	ADC_CTL0_HPAUTO,		19
	.EQU	ADC_CTL0_CONT,		18
	.EQU	ADC_CTL0_SCANEN,		17
	.EQU	ADC_CTL0_BOSSSELCOMP,		16
	.EQU	ADC_CTL0_BOSSSEL,		15
	.EQU	ADC_CTL0_TRIMIBIAS,		14
	.EQU	ADC_CTL0_NDMAEN,		13
	.EQU	ADC_CTL0_ADCCLKS3,		11
	.EQU	ADC_CTL0_ADCCLKS2,		10
	.EQU	ADC_CTL0_ADCCLKS1,		9
	.EQU	ADC_CTL0_ADCCLKS0,		8
	.EQU	ADC_CTL0_DIV_SEL,		7
	.EQU	ADC_CTL0_LR,		3
	.EQU	ADC_CTL0_CLKS1,		2
	.EQU	ADC_CTL0_CLKS0,		1
	.EQU	ADC_CTL0_EN,		0
//  register-------------------------------------
	.EQU	ADC_CTL1,		0x40000404
//  0x4000 0404  ADC_CTL1   Bits-------------------------------------
	.EQU	ADC_CTL1_HPEXTEN,		27
	.EQU	ADC_CTL1_HCH6,		26
	.EQU	ADC_CTL1_HCH5,		25
	.EQU	ADC_CTL1_HCH4,		24
	.EQU	ADC_CTL1_HCH3,		23
	.EQU	ADC_CTL1_HCH2,		22
	.EQU	ADC_CTL1_HCH1,		21
	.EQU	ADC_CTL1_HCH0,		20
	.EQU	ADC_CTL1_REFSEL1,		18
	.EQU	ADC_CTL1_REFSEL0,		17
	.EQU	ADC_CTL1_NOVIE,		15
	.EQU	ADC_CTL1_NOVIC,		14
	.EQU	ADC_CTL1_NOVIF,		13
	.EQU	ADC_CTL1_EXTEN,		11
	.EQU	ADC_CTL1_NCH6,		10
	.EQU	ADC_CTL1_NCH5,		9
	.EQU	ADC_CTL1_NCH4,		8
	.EQU	ADC_CTL1_NCH3,		7
	.EQU	ADC_CTL1_NCH2,		6
	.EQU	ADC_CTL1_NCH1,		5
	.EQU	ADC_CTL1_NCH0,		4
	.EQU	ADC_CTL1_HPSTART,		3
	.EQU	ADC_CTL1_START,		2
	.EQU	ADC_CTL1_NOVMODEN,		0
//  register-------------------------------------
	.EQU	ADC_SCANSQ0,	0x40000408
//  0x4000 0408  ADC_SCANSQ0   Bits-------------------------------------
	.EQU	ADC_SCANSQ0_SSQ3_7,		31
	.EQU	ADC_SCANSQ0_SSQ3_6,		30
	.EQU	ADC_SCANSQ0_SSQ3_5,		29
	.EQU	ADC_SCANSQ0_SSQ3_4,		28
	.EQU	ADC_SCANSQ0_SSQ3_3,		27
	.EQU	ADC_SCANSQ0_SSQ3_2,		26
	.EQU	ADC_SCANSQ0_SSQ3_1,		25
	.EQU	ADC_SCANSQ0_SSQ3_0,		24
	.EQU	ADC_SCANSQ0_SSQ2_7,		23
	.EQU	ADC_SCANSQ0_SSQ2_6,		22
	.EQU	ADC_SCANSQ0_SSQ2_5,		21
	.EQU	ADC_SCANSQ0_SSQ2_4,		20
	.EQU	ADC_SCANSQ0_SSQ2_3,		19
	.EQU	ADC_SCANSQ0_SSQ2_2,		18
	.EQU	ADC_SCANSQ0_SSQ2_1,		17
	.EQU	ADC_SCANSQ0_SSQ2_0,		16
	.EQU	ADC_SCANSQ0_SSQ1_7,		15
	.EQU	ADC_SCANSQ0_SSQ1_6,		14
	.EQU	ADC_SCANSQ0_SSQ1_5,		13
	.EQU	ADC_SCANSQ0_SSQ1_4,		12
	.EQU	ADC_SCANSQ0_SSQ1_3,		11
	.EQU	ADC_SCANSQ0_SSQ1_2,		10
	.EQU	ADC_SCANSQ0_SSQ1_1,		9
	.EQU	ADC_SCANSQ0_SSQ1_0,		8
	.EQU	ADC_SCANSQ0_SSQ0_7,		7
	.EQU	ADC_SCANSQ0_SSQ0_6,		6
	.EQU	ADC_SCANSQ0_SSQ0_5,		5
	.EQU	ADC_SCANSQ0_SSQ0_4,		4
	.EQU	ADC_SCANSQ0_SSQ0_3,		3
	.EQU	ADC_SCANSQ0_SSQ0_2,		2
	.EQU	ADC_SCANSQ0_SSQ0_1,		1
	.EQU	ADC_SCANSQ0_SSQ0_0,		0
//  register-------------------------------------
	.EQU	ADC_SCANSQ1,	0x4000040C
//  0x4000 040C  ADC_SCANSQ1   Bits-------------------------------------
	.EQU	ADC_SCANSQ1_SSQ7_7,		31
	.EQU	ADC_SCANSQ1_SSQ7_6,		30
	.EQU	ADC_SCANSQ1_SSQ7_5,		29
	.EQU	ADC_SCANSQ1_SSQ7_4,		28
	.EQU	ADC_SCANSQ1_SSQ7_3,		27
	.EQU	ADC_SCANSQ1_SSQ7_2,		26
	.EQU	ADC_SCANSQ1_SSQ7_1,		25
	.EQU	ADC_SCANSQ1_SSQ7_0,		24
	.EQU	ADC_SCANSQ1_SSQ6_7,		23
	.EQU	ADC_SCANSQ1_SSQ6_6,		22
	.EQU	ADC_SCANSQ1_SSQ6_5,		21
	.EQU	ADC_SCANSQ1_SSQ6_4,		20
	.EQU	ADC_SCANSQ1_SSQ6_3,		19
	.EQU	ADC_SCANSQ1_SSQ6_2,		18
	.EQU	ADC_SCANSQ1_SSQ6_1,		17
	.EQU	ADC_SCANSQ1_SSQ6_0,		16
	.EQU	ADC_SCANSQ1_SSQ5_7,		15
	.EQU	ADC_SCANSQ1_SSQ5_6,		14
	.EQU	ADC_SCANSQ1_SSQ5_5,		13
	.EQU	ADC_SCANSQ1_SSQ5_4,		12
	.EQU	ADC_SCANSQ1_SSQ5_3,		11
	.EQU	ADC_SCANSQ1_SSQ5_2,		10
	.EQU	ADC_SCANSQ1_SSQ5_1,		9
	.EQU	ADC_SCANSQ1_SSQ5_0,		8
	.EQU	ADC_SCANSQ1_SSQ4_7,		7
	.EQU	ADC_SCANSQ1_SSQ4_6,		6
	.EQU	ADC_SCANSQ1_SSQ4_5,		5
	.EQU	ADC_SCANSQ1_SSQ4_4,		4
	.EQU	ADC_SCANSQ1_SSQ4_3,		3
	.EQU	ADC_SCANSQ1_SSQ4_2,		2
	.EQU	ADC_SCANSQ1_SSQ4_1,		1
	.EQU	ADC_SCANSQ1_SSQ4_0,		0
//  register-------------------------------------
	.EQU	ADC_SCANSQ2,	0x40000410
//  0x4000 0410  ADC_SCANSQ2   Bits-------------------------------------
	.EQU	ADC_SCANSQ2_SSQ11_7,		31
	.EQU	ADC_SCANSQ2_SSQ11_6,		30
	.EQU	ADC_SCANSQ2_SSQ11_5,		29
	.EQU	ADC_SCANSQ2_SSQ11_4,		28
	.EQU	ADC_SCANSQ2_SSQ11_3,		27
	.EQU	ADC_SCANSQ2_SSQ11_2,		26
	.EQU	ADC_SCANSQ2_SSQ11_1,		25
	.EQU	ADC_SCANSQ2_SSQ11_0,		24
	.EQU	ADC_SCANSQ2_SSQ10_7,		23
	.EQU	ADC_SCANSQ2_SSQ10_6,		22
	.EQU	ADC_SCANSQ2_SSQ10_5,		21
	.EQU	ADC_SCANSQ2_SSQ10_4,		20
	.EQU	ADC_SCANSQ2_SSQ10_3,		19
	.EQU	ADC_SCANSQ2_SSQ10_2,		18
	.EQU	ADC_SCANSQ2_SSQ10_1,		17
	.EQU	ADC_SCANSQ2_SSQ10_0,		16
	.EQU	ADC_SCANSQ2_SSQ9_7,		15
	.EQU	ADC_SCANSQ2_SSQ9_6,		14
	.EQU	ADC_SCANSQ2_SSQ9_5,		13
	.EQU	ADC_SCANSQ2_SSQ9_4,		12
	.EQU	ADC_SCANSQ2_SSQ9_3,		11
	.EQU	ADC_SCANSQ2_SSQ9_2,		10
	.EQU	ADC_SCANSQ2_SSQ9_1,		9
	.EQU	ADC_SCANSQ2_SSQ9_0,		8
	.EQU	ADC_SCANSQ2_SSQ8_7,		7
	.EQU	ADC_SCANSQ2_SSQ8_6,		6
	.EQU	ADC_SCANSQ2_SSQ8_5,		5
	.EQU	ADC_SCANSQ2_SSQ8_4,		4
	.EQU	ADC_SCANSQ2_SSQ8_3,		3
	.EQU	ADC_SCANSQ2_SSQ8_2,		2
	.EQU	ADC_SCANSQ2_SSQ8_1,		1
	.EQU	ADC_SCANSQ2_SSQ8_0,		0
//  register-------------------------------------
	.EQU	ADC_SCANSQ3,	0x40000444
//  0x4000 0444  ADC_SCANSQ3   Bits-------------------------------------
	.EQU	ADC_SCANSQ3_SSQ15_7,		31
	.EQU	ADC_SCANSQ3_SSQ15_6,		30
	.EQU	ADC_SCANSQ3_SSQ15_5,		29
	.EQU	ADC_SCANSQ3_SSQ15_4,		28
	.EQU	ADC_SCANSQ3_SSQ15_3,		27
	.EQU	ADC_SCANSQ3_SSQ15_2,		26
	.EQU	ADC_SCANSQ3_SSQ15_1,		25
	.EQU	ADC_SCANSQ3_SSQ15_0,		24
	.EQU	ADC_SCANSQ3_SSQ14_7,		23
	.EQU	ADC_SCANSQ3_SSQ14_6,		22
	.EQU	ADC_SCANSQ3_SSQ14_5,		21
	.EQU	ADC_SCANSQ3_SSQ14_4,		20
	.EQU	ADC_SCANSQ3_SSQ14_3,		19
	.EQU	ADC_SCANSQ3_SSQ14_2,		18
	.EQU	ADC_SCANSQ3_SSQ14_1,		17
	.EQU	ADC_SCANSQ3_SSQ14_0,		16
	.EQU	ADC_SCANSQ3_SSQ13_7,		15
	.EQU	ADC_SCANSQ3_SSQ13_6,		14
	.EQU	ADC_SCANSQ3_SSQ13_5,		13
	.EQU	ADC_SCANSQ3_SSQ13_4,		12
	.EQU	ADC_SCANSQ3_SSQ13_3,		11
	.EQU	ADC_SCANSQ3_SSQ13_2,		10
	.EQU	ADC_SCANSQ3_SSQ13_1,		9
	.EQU	ADC_SCANSQ3_SSQ13_0,		8
	.EQU	ADC_SCANSQ3_SSQ12_7,		7
	.EQU	ADC_SCANSQ3_SSQ12_6,		6
	.EQU	ADC_SCANSQ3_SSQ12_5,		5
	.EQU	ADC_SCANSQ3_SSQ12_4,		4
	.EQU	ADC_SCANSQ3_SSQ12_3,		3
	.EQU	ADC_SCANSQ3_SSQ12_2,		2
	.EQU	ADC_SCANSQ3_SSQ12_1,		1
	.EQU	ADC_SCANSQ3_SSQ12_0,		0
//  register-------------------------------------
	.EQU	ADC_HSCANSQ,	0x40000414
//  0x4000 0414  ADC_HSCANSQ   Bits-------------------------------------
	.EQU	ADC_HSCANSQ_HSSQ3_7,		31
	.EQU	ADC_HSCANSQ_HSSQ3_6,		30
	.EQU	ADC_HSCANSQ_HSSQ3_5,		29
	.EQU	ADC_HSCANSQ_HSSQ3_4,		28
	.EQU	ADC_HSCANSQ_HSSQ3_3,		27
	.EQU	ADC_HSCANSQ_HSSQ3_2,		26
	.EQU	ADC_HSCANSQ_HSSQ3_1,		25
	.EQU	ADC_HSCANSQ_HSSQ3_0,		24
	.EQU	ADC_HSCANSQ_HSSQ2_7,		23
	.EQU	ADC_HSCANSQ_HSSQ2_6,		22
	.EQU	ADC_HSCANSQ_HSSQ2_5,		21
	.EQU	ADC_HSCANSQ_HSSQ2_4,		20
	.EQU	ADC_HSCANSQ_HSSQ2_3,		19
	.EQU	ADC_HSCANSQ_HSSQ2_2,		18
	.EQU	ADC_HSCANSQ_HSSQ2_1,		17
	.EQU	ADC_HSCANSQ_HSSQ2_0,		16
	.EQU	ADC_HSCANSQ_HSSQ1_7,		15
	.EQU	ADC_HSCANSQ_HSSQ1_6,		14
	.EQU	ADC_HSCANSQ_HSSQ1_5,		13
	.EQU	ADC_HSCANSQ_HSSQ1_4,		12
	.EQU	ADC_HSCANSQ_HSSQ1_3,		11
	.EQU	ADC_HSCANSQ_HSSQ1_2,		10
	.EQU	ADC_HSCANSQ_HSSQ1_1,		9
	.EQU	ADC_HSCANSQ_HSSQ1_0,		8
	.EQU	ADC_HSCANSQ_HSSQ0_7,		7
	.EQU	ADC_HSCANSQ_HSSQ0_6,		6
	.EQU	ADC_HSCANSQ_HSSQ0_5,		5
	.EQU	ADC_HSCANSQ_HSSQ0_4,		4
	.EQU	ADC_HSCANSQ_HSSQ0_3,		3
	.EQU	ADC_HSCANSQ_HSSQ0_2,		2
	.EQU	ADC_HSCANSQ_HSSQ0_1,		1
	.EQU	ADC_HSCANSQ_HSSQ0_0,		0
//  register-------------------------------------
	.EQU	ADC_WDH,		0x40000418
//  0x4000 0418  ADC_WDH   Bits-------------------------------------
	.EQU	ADC_WDH_WDH11,		11
	.EQU	ADC_WDH_WDH10,		10
	.EQU	ADC_WDH_WDH9,		9
	.EQU	ADC_WDH_WDH8,		8
	.EQU	ADC_WDH_WDH7,		7
	.EQU	ADC_WDH_WDH6,		6
	.EQU	ADC_WDH_WDH5,		5
	.EQU	ADC_WDH_WDH4,		4
	.EQU	ADC_WDH_WDH3,		3
	.EQU	ADC_WDH_WDH2,		2
	.EQU	ADC_WDH_WDH1,		1
	.EQU	ADC_WDH_WDH0,		0
//  register-------------------------------------
	.EQU	ADC_WDL,		0x4000041C
//  0x4000 041C  ADC_WDL   Bits-------------------------------------
	.EQU	ADC_WDL_WDL11,		11
	.EQU	ADC_WDL_WDL10,		10
	.EQU	ADC_WDL_WDL9,		9
	.EQU	ADC_WDL_WDL8,		8
	.EQU	ADC_WDL_WDL7,		7
	.EQU	ADC_WDL_WDL6,		6
	.EQU	ADC_WDL_WDL5,		5
	.EQU	ADC_WDL_WDL4,		4
	.EQU	ADC_WDL_WDL3,		3
	.EQU	ADC_WDL_WDL2,		2
	.EQU	ADC_WDL_WDL1,		1
	.EQU	ADC_WDL_WDL0,		0
//  register-------------------------------------
	.EQU	ADC_DATA,		0x40000420
//  0x4000 0420  ADC_DATA   Bits-------------------------------------
	.EQU	ADC_DATA_DATA15,		15
	.EQU	ADC_DATA_DATA14,		14
	.EQU	ADC_DATA_DATA13,		13
	.EQU	ADC_DATA_DATA12,		12
	.EQU	ADC_DATA_DATA11,		11
	.EQU	ADC_DATA_DATA10,		10
	.EQU	ADC_DATA_DATA9,		9
	.EQU	ADC_DATA_DATA8,		8
	.EQU	ADC_DATA_DATA7,		7
	.EQU	ADC_DATA_DATA6,		6
	.EQU	ADC_DATA_DATA5,		5
	.EQU	ADC_DATA_DATA4,		4
	.EQU	ADC_DATA_DATA3,		3
	.EQU	ADC_DATA_DATA2,		2
	.EQU	ADC_DATA_DATA1,		1
	.EQU	ADC_DATA_DATA0,		0
//  register-------------------------------------
	.EQU	ADC_HPDATA0,	0x40000424
//  0x4000 0424  ADC_HPDATA0   Bits-------------------------------------
	.EQU	ADC_HPDATA0_HPDATA15,		15
	.EQU	ADC_HPDATA0_HPDATA14,		14
	.EQU	ADC_HPDATA0_HPDATA13,		13
	.EQU	ADC_HPDATA0_HPDATA12,		12
	.EQU	ADC_HPDATA0_HPDATA11,		11
	.EQU	ADC_HPDATA0_HPDATA10,		10
	.EQU	ADC_HPDATA0_HPDATA9,		9
	.EQU	ADC_HPDATA0_HPDATA8,		8
	.EQU	ADC_HPDATA0_HPDATA7,		7
	.EQU	ADC_HPDATA0_HPDATA6,		6
	.EQU	ADC_HPDATA0_HPDATA5,		5
	.EQU	ADC_HPDATA0_HPDATA4,		4
	.EQU	ADC_HPDATA0_HPDATA3,		3
	.EQU	ADC_HPDATA0_HPDATA2,		2
	.EQU	ADC_HPDATA0_HPDATA1,		1
	.EQU	ADC_HPDATA0_HPDATA0,		0
//  register-------------------------------------
	.EQU	ADC_HPDATA1,	0x40000428
//  0x4000 0428  ADC_HPDATA1   Bits-------------------------------------
	.EQU	ADC_HPDATA1_HPDATA15,		15
	.EQU	ADC_HPDATA1_HPDATA14,		14
	.EQU	ADC_HPDATA1_HPDATA13,		13
	.EQU	ADC_HPDATA1_HPDATA12,		12
	.EQU	ADC_HPDATA1_HPDATA11,		11
	.EQU	ADC_HPDATA1_HPDATA10,		10
	.EQU	ADC_HPDATA1_HPDATA9,		9
	.EQU	ADC_HPDATA1_HPDATA8,		8
	.EQU	ADC_HPDATA1_HPDATA7,		7
	.EQU	ADC_HPDATA1_HPDATA6,		6
	.EQU	ADC_HPDATA1_HPDATA5,		5
	.EQU	ADC_HPDATA1_HPDATA4,		4
	.EQU	ADC_HPDATA1_HPDATA3,		3
	.EQU	ADC_HPDATA1_HPDATA2,		2
	.EQU	ADC_HPDATA1_HPDATA1,		1
	.EQU	ADC_HPDATA1_HPDATA0,		0
//  register-------------------------------------
	.EQU	ADC_HPDATA2,	0x4000042C
//  0x4000 042C  ADC_HPDATA2   Bits-------------------------------------
	.EQU	ADC_HPDATA2_HPDATA15,		15
	.EQU	ADC_HPDATA2_HPDATA14,		14
	.EQU	ADC_HPDATA2_HPDATA13,		13
	.EQU	ADC_HPDATA2_HPDATA12,		12
	.EQU	ADC_HPDATA2_HPDATA11,		11
	.EQU	ADC_HPDATA2_HPDATA10,		10
	.EQU	ADC_HPDATA2_HPDATA9,		9
	.EQU	ADC_HPDATA2_HPDATA8,		8
	.EQU	ADC_HPDATA2_HPDATA7,		7
	.EQU	ADC_HPDATA2_HPDATA6,		6
	.EQU	ADC_HPDATA2_HPDATA5,		5
	.EQU	ADC_HPDATA2_HPDATA4,		4
	.EQU	ADC_HPDATA2_HPDATA3,		3
	.EQU	ADC_HPDATA2_HPDATA2,		2
	.EQU	ADC_HPDATA2_HPDATA1,		1
	.EQU	ADC_HPDATA2_HPDATA0,		0
//  register-------------------------------------
	.EQU	ADC_HPDATA3,	0x40000430
//  0x4000 0430  ADC_HPDATA3   Bits-------------------------------------
	.EQU	ADC_HPDATA3_HPDATA15,		15
	.EQU	ADC_HPDATA3_HPDATA14,		14
	.EQU	ADC_HPDATA3_HPDATA13,		13
	.EQU	ADC_HPDATA3_HPDATA12,		12
	.EQU	ADC_HPDATA3_HPDATA11,		11
	.EQU	ADC_HPDATA3_HPDATA10,		10
	.EQU	ADC_HPDATA3_HPDATA9,		9
	.EQU	ADC_HPDATA3_HPDATA8,		8
	.EQU	ADC_HPDATA3_HPDATA7,		7
	.EQU	ADC_HPDATA3_HPDATA6,		6
	.EQU	ADC_HPDATA3_HPDATA5,		5
	.EQU	ADC_HPDATA3_HPDATA4,		4
	.EQU	ADC_HPDATA3_HPDATA3,		3
	.EQU	ADC_HPDATA3_HPDATA2,		2
	.EQU	ADC_HPDATA3_HPDATA1,		1
	.EQU	ADC_HPDATA3_HPDATA0,		0
//  register-------------------------------------
	.EQU	ADC_HPOFF0,	0x40000434
//  0x4000 0434  ADC_HPOFF0   Bits-------------------------------------
	.EQU	ADC_HPOFF0_HPDOFF11,		11
	.EQU	ADC_HPOFF0_HPDOFF10,		10
	.EQU	ADC_HPOFF0_HPDOFF9,		9
	.EQU	ADC_HPOFF0_HPDOFF8,		8
	.EQU	ADC_HPOFF0_HPDOFF7,		7
	.EQU	ADC_HPOFF0_HPDOFF6,		6
	.EQU	ADC_HPOFF0_HPDOFF5,		5
	.EQU	ADC_HPOFF0_HPDOFF4,		4
	.EQU	ADC_HPOFF0_HPDOFF3,		3
	.EQU	ADC_HPOFF0_HPDOFF2,		2
	.EQU	ADC_HPOFF0_HPDOFF1,		1
	.EQU	ADC_HPOFF0_HPDOFF0,		0
//  register-------------------------------------
	.EQU	ADC_HPOFF1,	0x40000438
//  0x4000 0438  ADC_HPOFF1   Bits-------------------------------------
	.EQU	ADC_HPOFF1_HPDOFF11,		11
	.EQU	ADC_HPOFF1_HPDOFF10,		10
	.EQU	ADC_HPOFF1_HPDOFF9,		9
	.EQU	ADC_HPOFF1_HPDOFF8,		8
	.EQU	ADC_HPOFF1_HPDOFF7,		7
	.EQU	ADC_HPOFF1_HPDOFF6,		6
	.EQU	ADC_HPOFF1_HPDOFF5,		5
	.EQU	ADC_HPOFF1_HPDOFF4,		4
	.EQU	ADC_HPOFF1_HPDOFF3,		3
	.EQU	ADC_HPOFF1_HPDOFF2,		2
	.EQU	ADC_HPOFF1_HPDOFF1,		1
	.EQU	ADC_HPOFF1_HPDOFF0,		0
//  register-------------------------------------
	.EQU	ADC_HPOFF2,	0x4000043C
//  0x4000 043C  ADC_HPOFF2   Bits-------------------------------------
	.EQU	ADC_HPOFF2_HPDOFF11,		11
	.EQU	ADC_HPOFF2_HPDOFF10,		10
	.EQU	ADC_HPOFF2_HPDOFF9,		9
	.EQU	ADC_HPOFF2_HPDOFF8,		8
	.EQU	ADC_HPOFF2_HPDOFF7,		7
	.EQU	ADC_HPOFF2_HPDOFF6,		6
	.EQU	ADC_HPOFF2_HPDOFF5,		5
	.EQU	ADC_HPOFF2_HPDOFF4,		4
	.EQU	ADC_HPOFF2_HPDOFF3,		3
	.EQU	ADC_HPOFF2_HPDOFF2,		2
	.EQU	ADC_HPOFF2_HPDOFF1,		1
	.EQU	ADC_HPOFF2_HPDOFF0,		0
//  register-------------------------------------
	.EQU	ADC_HPOFF3,	0x40000440
//  0x4000 0440  ADC_HPOFF3   Bits-------------------------------------
	.EQU	ADC_HPOFF3_HPDOFF11,		11
	.EQU	ADC_HPOFF3_HPDOFF10,		10
	.EQU	ADC_HPOFF3_HPDOFF9,		9
	.EQU	ADC_HPOFF3_HPDOFF8,		8
	.EQU	ADC_HPOFF3_HPDOFF7,		7
	.EQU	ADC_HPOFF3_HPDOFF6,		6
	.EQU	ADC_HPOFF3_HPDOFF5,		5
	.EQU	ADC_HPOFF3_HPDOFF4,		4
	.EQU	ADC_HPOFF3_HPDOFF3,		3
	.EQU	ADC_HPOFF3_HPDOFF2,		2
	.EQU	ADC_HPOFF3_HPDOFF1,		1
	.EQU	ADC_HPOFF3_HPDOFF0,		0
//  register-------------------------------------
	.EQU	ADC_STATE,		0x40000450
//  0x4000 0450  ADC_STATE   Bits-------------------------------------
	.EQU	ADC_STATE_TRIMERROR1,		31
	.EQU	ADC_STATE_TRIMERROR0,		30
	.EQU	ADC_STATE_TRIMIBIASOPA,		27
	.EQU	ADC_STATE_S1_IF,		18
	.EQU	ADC_STATE_S2_IF,		17
	.EQU	ADC_STATE_EOC2IF,		16
	.EQU	ADC_STATE_EOC2IC,		15
	.EQU	ADC_STATE_EOC2IE,		14
	.EQU	ADC_STATE_EOCIE,		13
	.EQU	ADC_STATE_EOCIC,		12
	.EQU	ADC_STATE_EOCIF,		11
	.EQU	ADC_STATE_WDIE,		10
	.EQU	ADC_STATE_HPENDIE,		9
	.EQU	ADC_STATE_ENDIE,		8
	.EQU	ADC_STATE_WDIC,		7
	.EQU	ADC_STATE_HPENDIC,		6
	.EQU	ADC_STATE_ENDIC,		5
	.EQU	ADC_STATE_WDIF,		4
	.EQU	ADC_STATE_HPENDIF,		3
	.EQU	ADC_STATE_ENDIF,		2
	.EQU	ADC_STATE_HPSTARTIF,		1
	.EQU	ADC_STATE_STARTIF,		0
//  register-------------------------------------
	.EQU	ADC_SCANCTL,	0x40000458
//  0x4000 0458  ADC_SCANCTL   Bits-------------------------------------
	.EQU	ADC_SCANCTL_SAMSEL3,		27
	.EQU	ADC_SCANCTL_SAMSEL2,		26
	.EQU	ADC_SCANCTL_SAMSEL1,		25
	.EQU	ADC_SCANCTL_SAMSEL0,		24
	.EQU	ADC_SCANCTL_WDCH6,		22
	.EQU	ADC_SCANCTL_WDCH5,		21
	.EQU	ADC_SCANCTL_WDCH4,		20
	.EQU	ADC_SCANCTL_WDCH3,		19
	.EQU	ADC_SCANCTL_WDCH2,		18
	.EQU	ADC_SCANCTL_WDCH1,		17
	.EQU	ADC_SCANCTL_WDCH0,		16
	.EQU	ADC_SCANCTL_NCHNUB4,		12
	.EQU	ADC_SCANCTL_NCHNUB3,		11
	.EQU	ADC_SCANCTL_NCHNUB2,		10
	.EQU	ADC_SCANCTL_NCHNUB1,		9
	.EQU	ADC_SCANCTL_NCHNUB0,		8
	.EQU	ADC_SCANCTL_HSLEN2,		6
	.EQU	ADC_SCANCTL_HSLEN1,		5
	.EQU	ADC_SCANCTL_HSLEN0,		4
	.EQU	ADC_SCANCTL_SLEN3,		3
	.EQU	ADC_SCANCTL_SLEN2,		2
	.EQU	ADC_SCANCTL_SLEN1,		1
	.EQU	ADC_SCANCTL_SLEN0,		0
//  register-------------------------------------
	.EQU	ADC_HPDATA4,	0x40000460
//  0x4000 0460  ADC_HPDATA4   Bits-------------------------------------
	.EQU	ADC_HPDATA4_HPDATA15,		15
	.EQU	ADC_HPDATA4_HPDATA14,		14
	.EQU	ADC_HPDATA4_HPDATA13,		13
	.EQU	ADC_HPDATA4_HPDATA12,		12
	.EQU	ADC_HPDATA4_HPDATA11,		11
	.EQU	ADC_HPDATA4_HPDATA10,		10
	.EQU	ADC_HPDATA4_HPDATA9,		9
	.EQU	ADC_HPDATA4_HPDATA8,		8
	.EQU	ADC_HPDATA4_HPDATA7,		7
	.EQU	ADC_HPDATA4_HPDATA6,		6
	.EQU	ADC_HPDATA4_HPDATA5,		5
	.EQU	ADC_HPDATA4_HPDATA4,		4
	.EQU	ADC_HPDATA4_HPDATA3,		3
	.EQU	ADC_HPDATA4_HPDATA2,		2
	.EQU	ADC_HPDATA4_HPDATA1,		1
	.EQU	ADC_HPDATA4_HPDATA0,		0
//  register-------------------------------------
	.EQU	ADC_HPDATA5,	0x40000464
//  0x4000 0464  ADC_HPDATA5   Bits-------------------------------------
	.EQU	ADC_HPDATA5_HPDATA15,		15
	.EQU	ADC_HPDATA5_HPDATA14,		14
	.EQU	ADC_HPDATA5_HPDATA13,		13
	.EQU	ADC_HPDATA5_HPDATA12,		12
	.EQU	ADC_HPDATA5_HPDATA11,		11
	.EQU	ADC_HPDATA5_HPDATA10,		10
	.EQU	ADC_HPDATA5_HPDATA9,		9
	.EQU	ADC_HPDATA5_HPDATA8,		8
	.EQU	ADC_HPDATA5_HPDATA7,		7
	.EQU	ADC_HPDATA5_HPDATA6,		6
	.EQU	ADC_HPDATA5_HPDATA5,		5
	.EQU	ADC_HPDATA5_HPDATA4,		4
	.EQU	ADC_HPDATA5_HPDATA3,		3
	.EQU	ADC_HPDATA5_HPDATA2,		2
	.EQU	ADC_HPDATA5_HPDATA1,		1
	.EQU	ADC_HPDATA5_HPDATA0,		0
//  register-------------------------------------
	.EQU	ADC_HPDATA6,	0x40000468
//  0x4000 0468  ADC_HPDATA6   Bits-------------------------------------
	.EQU	ADC_HPDATA6_HPDATA15,		15
	.EQU	ADC_HPDATA6_HPDATA14,		14
	.EQU	ADC_HPDATA6_HPDATA13,		13
	.EQU	ADC_HPDATA6_HPDATA12,		12
	.EQU	ADC_HPDATA6_HPDATA11,		11
	.EQU	ADC_HPDATA6_HPDATA10,		10
	.EQU	ADC_HPDATA6_HPDATA9,		9
	.EQU	ADC_HPDATA6_HPDATA8,		8
	.EQU	ADC_HPDATA6_HPDATA7,		7
	.EQU	ADC_HPDATA6_HPDATA6,		6
	.EQU	ADC_HPDATA6_HPDATA5,		5
	.EQU	ADC_HPDATA6_HPDATA4,		4
	.EQU	ADC_HPDATA6_HPDATA3,		3
	.EQU	ADC_HPDATA6_HPDATA2,		2
	.EQU	ADC_HPDATA6_HPDATA1,		1
	.EQU	ADC_HPDATA6_HPDATA0,		0
//  register-------------------------------------
	.EQU	ADC_HPDATA7,	0x4000046C
//  0x4000 046C  ADC_HPDATA7   Bits-------------------------------------
	.EQU	ADC_HPDATA7_HPDATA15,		15
	.EQU	ADC_HPDATA7_HPDATA14,		14
	.EQU	ADC_HPDATA7_HPDATA13,		13
	.EQU	ADC_HPDATA7_HPDATA12,		12
	.EQU	ADC_HPDATA7_HPDATA11,		11
	.EQU	ADC_HPDATA7_HPDATA10,		10
	.EQU	ADC_HPDATA7_HPDATA9,		9
	.EQU	ADC_HPDATA7_HPDATA8,		8
	.EQU	ADC_HPDATA7_HPDATA7,		7
	.EQU	ADC_HPDATA7_HPDATA6,		6
	.EQU	ADC_HPDATA7_HPDATA5,		5
	.EQU	ADC_HPDATA7_HPDATA4,		4
	.EQU	ADC_HPDATA7_HPDATA3,		3
	.EQU	ADC_HPDATA7_HPDATA2,		2
	.EQU	ADC_HPDATA7_HPDATA1,		1
	.EQU	ADC_HPDATA7_HPDATA0,		0
//  register-------------------------------------
	.EQU	ADC_HPOFF4,	0x40000470
//  0x4000 0470  ADC_HPOFF4   Bits-------------------------------------
	.EQU	ADC_HPOFF4_HPDOFF11,		11
	.EQU	ADC_HPOFF4_HPDOFF10,		10
	.EQU	ADC_HPOFF4_HPDOFF9,		9
	.EQU	ADC_HPOFF4_HPDOFF8,		8
	.EQU	ADC_HPOFF4_HPDOFF7,		7
	.EQU	ADC_HPOFF4_HPDOFF6,		6
	.EQU	ADC_HPOFF4_HPDOFF5,		5
	.EQU	ADC_HPOFF4_HPDOFF4,		4
	.EQU	ADC_HPOFF4_HPDOFF3,		3
	.EQU	ADC_HPOFF4_HPDOFF2,		2
	.EQU	ADC_HPOFF4_HPDOFF1,		1
	.EQU	ADC_HPOFF4_HPDOFF0,		0
//  register-------------------------------------
	.EQU	ADC_HPOFF5,	0x40000474
//  0x4000 0474  ADC_HPOFF5   Bits-------------------------------------
	.EQU	ADC_HPOFF5_HPDOFF11,		11
	.EQU	ADC_HPOFF5_HPDOFF10,		10
	.EQU	ADC_HPOFF5_HPDOFF9,		9
	.EQU	ADC_HPOFF5_HPDOFF8,		8
	.EQU	ADC_HPOFF5_HPDOFF7,		7
	.EQU	ADC_HPOFF5_HPDOFF6,		6
	.EQU	ADC_HPOFF5_HPDOFF5,		5
	.EQU	ADC_HPOFF5_HPDOFF4,		4
	.EQU	ADC_HPOFF5_HPDOFF3,		3
	.EQU	ADC_HPOFF5_HPDOFF2,		2
	.EQU	ADC_HPOFF5_HPDOFF1,		1
	.EQU	ADC_HPOFF5_HPDOFF0,		0
//  register-------------------------------------
	.EQU	ADC_HPOFF6,	0x40000478
//  0x4000 0478  ADC_HPOFF6   Bits-------------------------------------
	.EQU	ADC_HPOFF6_HPDOFF11,		11
	.EQU	ADC_HPOFF6_HPDOFF10,		10
	.EQU	ADC_HPOFF6_HPDOFF9,		9
	.EQU	ADC_HPOFF6_HPDOFF8,		8
	.EQU	ADC_HPOFF6_HPDOFF7,		7
	.EQU	ADC_HPOFF6_HPDOFF6,		6
	.EQU	ADC_HPOFF6_HPDOFF5,		5
	.EQU	ADC_HPOFF6_HPDOFF4,		4
	.EQU	ADC_HPOFF6_HPDOFF3,		3
	.EQU	ADC_HPOFF6_HPDOFF2,		2
	.EQU	ADC_HPOFF6_HPDOFF1,		1
	.EQU	ADC_HPOFF6_HPDOFF0,		0
//  register-------------------------------------
	.EQU	ADC_HPOFF7,	0x4000047C
//  0x4000 047C  ADC_HPOFF7   Bits-------------------------------------
	.EQU	ADC_HPOFF7_HPDOFF11,		11
	.EQU	ADC_HPOFF7_HPDOFF10,		10
	.EQU	ADC_HPOFF7_HPDOFF9,		9
	.EQU	ADC_HPOFF7_HPDOFF8,		8
	.EQU	ADC_HPOFF7_HPDOFF7,		7
	.EQU	ADC_HPOFF7_HPDOFF6,		6
	.EQU	ADC_HPOFF7_HPDOFF5,		5
	.EQU	ADC_HPOFF7_HPDOFF4,		4
	.EQU	ADC_HPOFF7_HPDOFF3,		3
	.EQU	ADC_HPOFF7_HPDOFF2,		2
	.EQU	ADC_HPOFF7_HPDOFF1,		1
	.EQU	ADC_HPOFF7_HPDOFF0,		0
//  register-------------------------------------
	.EQU	ADC_HSCANSQ1,	0x40000480
//  0x4000 0480  ADC_HSCANSQ1   Bits-------------------------------------
	.EQU	ADC_HSCANSQ1_HSSQ7_7,		31
	.EQU	ADC_HSCANSQ1_HSSQ7_6,		30
	.EQU	ADC_HSCANSQ1_HSSQ7_5,		29
	.EQU	ADC_HSCANSQ1_HSSQ7_4,		28
	.EQU	ADC_HSCANSQ1_HSSQ7_3,		27
	.EQU	ADC_HSCANSQ1_HSSQ7_2,		26
	.EQU	ADC_HSCANSQ1_HSSQ7_1,		25
	.EQU	ADC_HSCANSQ1_HSSQ7_0,		24
	.EQU	ADC_HSCANSQ1_HSSQ6_7,		23
	.EQU	ADC_HSCANSQ1_HSSQ6_6,		22
	.EQU	ADC_HSCANSQ1_HSSQ6_5,		21
	.EQU	ADC_HSCANSQ1_HSSQ6_4,		20
	.EQU	ADC_HSCANSQ1_HSSQ6_3,		19
	.EQU	ADC_HSCANSQ1_HSSQ6_2,		18
	.EQU	ADC_HSCANSQ1_HSSQ6_1,		17
	.EQU	ADC_HSCANSQ1_HSSQ6_0,		16
	.EQU	ADC_HSCANSQ1_HSSQ5_7,		15
	.EQU	ADC_HSCANSQ1_HSSQ5_6,		14
	.EQU	ADC_HSCANSQ1_HSSQ5_5,		13
	.EQU	ADC_HSCANSQ1_HSSQ5_4,		12
	.EQU	ADC_HSCANSQ1_HSSQ5_3,		11
	.EQU	ADC_HSCANSQ1_HSSQ5_2,		10
	.EQU	ADC_HSCANSQ1_HSSQ5_1,		9
	.EQU	ADC_HSCANSQ1_HSSQ5_0,		8
	.EQU	ADC_HSCANSQ1_HSSQ4_7,		7
	.EQU	ADC_HSCANSQ1_HSSQ4_6,		6
	.EQU	ADC_HSCANSQ1_HSSQ4_5,		5
	.EQU	ADC_HSCANSQ1_HSSQ4_4,		4
	.EQU	ADC_HSCANSQ1_HSSQ4_3,		3
	.EQU	ADC_HSCANSQ1_HSSQ4_2,		2
	.EQU	ADC_HSCANSQ1_HSSQ4_1,		1
	.EQU	ADC_HSCANSQ1_HSSQ4_0,		0
//  register-------------------------------------
	.EQU	ADC_CTL2,		0x40000484
//  0x4000 0484  ADC_CTL2   Bits-------------------------------------
	.EQU	ADC_CTL2_RMODE,		31
	.EQU	ADC_CTL2_MCMODE,		30
	.EQU	ADC_CTL2_CHASHTIME3,		26
	.EQU	ADC_CTL2_CHASHTIME2,		25
	.EQU	ADC_CTL2_CHASHTIME1,		24
	.EQU	ADC_CTL2_CHASHTIME0,		23
	.EQU	ADC_CTL2_CHBSHTIME3,		21
	.EQU	ADC_CTL2_CHBSHTIME2,		20
	.EQU	ADC_CTL2_CHBSHTIME1,		19
	.EQU	ADC_CTL2_CHBSHTIME0,		18
	.EQU	ADC_CTL2_SOCASEL0_1,		15
	.EQU	ADC_CTL2_SOCASEL0_0,		14
	.EQU	ADC_CTL2_SOCASEL1_1,		13
	.EQU	ADC_CTL2_SOCASEL1_0,		12
	.EQU	ADC_CTL2_HPSTART_1,		11
	.EQU	ADC_CTL2_EOC_CNT1,		10
	.EQU	ADC_CTL2_EOC_CNT0,		9
	.EQU	ADC_CTL2_EOC_CNT_IC,		8
	.EQU	ADC_CTL2_S1_IC,		7
	.EQU	ADC_CTL2_S1_IE,		6
	.EQU	ADC_CTL2_S2_IC,		5
	.EQU	ADC_CTL2_S2_IE,		4
	.EQU	ADC_CTL2_HP7DMAEN,		3
	.EQU	ADC_CTL2_HP6DMAEN,		2
	.EQU	ADC_CTL2_HP5DMAEN,		1
	.EQU	ADC_CTL2_HP4DMAEN,		0
//  register-------------------------------------
	.EQU	DAC0_CTL,		0x40001B00
//  0x4000 1B00  DAC0_CTL   Bits-------------------------------------
	.EQU	DAC0_CTL_DF,		15
	.EQU	DAC0_CTL_SWTRIG,		14
	.EQU	DAC0_CTL_MAS3,		13
	.EQU	DAC0_CTL_MAS2,		12
	.EQU	DAC0_CTL_MAS1,		11
	.EQU	DAC0_CTL_MAS0,		10
	.EQU	DAC0_CTL_WAVE1,		9
	.EQU	DAC0_CTL_WAVE0,		8
	.EQU	DAC0_CTL_TREVT3,		7
	.EQU	DAC0_CTL_TREVT2,		6
	.EQU	DAC0_CTL_TREVT1,		5
	.EQU	DAC0_CTL_TREVT0,		4
	.EQU	DAC0_CTL_TRIGEN,		3
	.EQU	DAC0_CTL_DE,		1
	.EQU	DAC0_CTL_EN,		0
//  register-------------------------------------
	.EQU	DAC0_DAHD,		0x40001B04
//  0x4000 1B04  DAC0_DAHD   Bits-------------------------------------
	.EQU	DAC0_DAHD_DAHD11,		11
	.EQU	DAC0_DAHD_DAHD10,		10
	.EQU	DAC0_DAHD_DAHD9,		9
	.EQU	DAC0_DAHD_DAHD8,		8
	.EQU	DAC0_DAHD_DAHD7,		7
	.EQU	DAC0_DAHD_DAHD6,		6
	.EQU	DAC0_DAHD_DAHD5,		5
	.EQU	DAC0_DAHD_DAHD4,		4
	.EQU	DAC0_DAHD_DAHD3,		3
	.EQU	DAC0_DAHD_DAHD2,		2
	.EQU	DAC0_DAHD_DAHD1,		1
	.EQU	DAC0_DAHD_DAHD0,		0
//  register-------------------------------------
	.EQU	DAC0_DATA,		0x40001B08
//  0x4000 1B08  DAC0_DATA   Bits-------------------------------------
	.EQU	DAC0_DATA_DATA11,		11
	.EQU	DAC0_DATA_DATA10,		10
	.EQU	DAC0_DATA_DATA9,		9
	.EQU	DAC0_DATA_DATA8,		8
	.EQU	DAC0_DATA_DATA7,		7
	.EQU	DAC0_DATA_DATA6,		6
	.EQU	DAC0_DATA_DATA5,		5
	.EQU	DAC0_DATA_DATA4,		4
	.EQU	DAC0_DATA_DATA3,		3
	.EQU	DAC0_DATA_DATA2,		2
	.EQU	DAC0_DATA_DATA1,		1
	.EQU	DAC0_DATA_DATA0,		0
//  register-------------------------------------
	.EQU	DAC0_CTL1,		0x40001B0C
//  0x4000 1B0C  DAC0_CTL1   Bits-------------------------------------
	.EQU	DAC0_CTL1_CLKDIV2,		11
	.EQU	DAC0_CTL1_CLKDIV1,		10
	.EQU	DAC0_CTL1_CLKDIV0,		9
	.EQU	DAC0_CTL1_BUFEN,		6
	.EQU	DAC0_CTL1_CLK1,		5
	.EQU	DAC0_CTL1_CLK0,		4
	.EQU	DAC0_CTL1_RFS1,		3
	.EQU	DAC0_CTL1_RFS0,		2
	.EQU	DAC0_CTL1_SEL1,		1
	.EQU	DAC0_CTL1_SEL0,		0
//  register-------------------------------------
	.EQU	DAC0_CAL,		0x40001B14
//  0x4000 1B14  DAC0_CAL   Bits-------------------------------------
	.EQU	DAC0_CAL_TRIMPPOL,		30
	.EQU	DAC0_CAL_TRIMP5,		29
	.EQU	DAC0_CAL_TRIMP4,		28
	.EQU	DAC0_CAL_TRIMP3,		27
	.EQU	DAC0_CAL_TRIMP2,		26
	.EQU	DAC0_CAL_TRIMP1,		25
	.EQU	DAC0_CAL_TRIMP0,		24
	.EQU	DAC0_CAL_TRIMNPOL,		22
	.EQU	DAC0_CAL_TRIMN5,		21
	.EQU	DAC0_CAL_TRIMN4,		20
	.EQU	DAC0_CAL_TRIMN3,		19
	.EQU	DAC0_CAL_TRIMN2,		18
	.EQU	DAC0_CAL_TRIMN1,		17
	.EQU	DAC0_CAL_TRIMN0,		16
	.EQU	DAC0_CAL_TRIMSTATE,		15
	.EQU	DAC0_CAL_TRIMHI,		14
	.EQU	DAC0_CAL_TRIMLO,		13
	.EQU	DAC0_CAL_TP1,		2
	.EQU	DAC0_CAL_TP0,		1
	.EQU	DAC0_CAL_TPEN,		0
//  register-------------------------------------
	.EQU	CMP_CTL0,		0x40000380
//  0x4000 0380  CMP_CTL0   Bits-------------------------------------
	.EQU	CMP_CTL0_PMOD3,		31
	.EQU	CMP_CTL0_PMOD2,		30
	.EQU	CMP_CTL0_PMOD1,		29
	.EQU	CMP_CTL0_PMOD0,		28
	.EQU	CMP_CTL0_NMOD3,		27
	.EQU	CMP_CTL0_NMOD2,		26
	.EQU	CMP_CTL0_NMOD1,		25
	.EQU	CMP_CTL0_NMOD0,		24
	.EQU	CMP_CTL0_IFFEN,		19
	.EQU	CMP_CTL0_IFREN,		18
	.EQU	CMP_CTL0_FLTCS1,		17
	.EQU	CMP_CTL0_FLTCS0,		16
	.EQU	CMP_CTL0_FLTDIV7,		15
	.EQU	CMP_CTL0_FLTDIV6,		14
	.EQU	CMP_CTL0_FLTDIV5,		13
	.EQU	CMP_CTL0_FLTDIV4,		12
	.EQU	CMP_CTL0_FLTDIV3,		11
	.EQU	CMP_CTL0_FLTDIV2,		10
	.EQU	CMP_CTL0_FLTDIV1,		9
	.EQU	CMP_CTL0_FLTDIV0,		8
	.EQU	CMP_CTL0_WINCLKSEL,		7
	.EQU	CMP_CTL0_FLTCNT2,		6
	.EQU	CMP_CTL0_FLTCNT1,		5
	.EQU	CMP_CTL0_FLTCNT0,		4
	.EQU	CMP_CTL0_FLTEN,		3
	.EQU	CMP_CTL0_WINEN,		2
	.EQU	CMP_CTL0_POL,		1
//  register-------------------------------------
	.EQU	CMP_CTL1,		0x40000384
//  0x4000 0384  CMP_CTL1   Bits-------------------------------------
	.EQU	CMP_CTL1_PMOD3,		31
	.EQU	CMP_CTL1_PMOD2,		30
	.EQU	CMP_CTL1_PMOD1,		29
	.EQU	CMP_CTL1_PMOD0,		28
	.EQU	CMP_CTL1_NMOD3,		27
	.EQU	CMP_CTL1_NMOD2,		26
	.EQU	CMP_CTL1_NMOD1,		25
	.EQU	CMP_CTL1_NMOD0,		24
	.EQU	CMP_CTL1_IFFEN,		19
	.EQU	CMP_CTL1_IFREN,		18
	.EQU	CMP_CTL1_FLTCS1,		17
	.EQU	CMP_CTL1_FLTCS0,		16
	.EQU	CMP_CTL1_FLTDIV7,		15
	.EQU	CMP_CTL1_FLTDIV6,		14
	.EQU	CMP_CTL1_FLTDIV5,		13
	.EQU	CMP_CTL1_FLTDIV4,		12
	.EQU	CMP_CTL1_FLTDIV3,		11
	.EQU	CMP_CTL1_FLTDIV2,		10
	.EQU	CMP_CTL1_FLTDIV1,		9
	.EQU	CMP_CTL1_FLTDIV0,		8
	.EQU	CMP_CTL1_WINCLKSEL,		7
	.EQU	CMP_CTL1_FLTCNT2,		6
	.EQU	CMP_CTL1_FLTCNT1,		5
	.EQU	CMP_CTL1_FLTCNT0,		4
	.EQU	CMP_CTL1_FLTEN,		3
	.EQU	CMP_CTL1_WINEN,		2
	.EQU	CMP_CTL1_POL,		1
//  register-------------------------------------
	.EQU	CMP_CTL2,		0x40000388
//  0x4000 0388  CMP_CTL2   Bits-------------------------------------
	.EQU	CMP_CTL2_PMOD3,		31
	.EQU	CMP_CTL2_PMOD2,		30
	.EQU	CMP_CTL2_PMOD1,		29
	.EQU	CMP_CTL2_PMOD0,		28
	.EQU	CMP_CTL2_NMOD3,		27
	.EQU	CMP_CTL2_NMOD2,		26
	.EQU	CMP_CTL2_NMOD1,		25
	.EQU	CMP_CTL2_NMOD0,		24
	.EQU	CMP_CTL2_IFFEN,		19
	.EQU	CMP_CTL2_IFREN,		18
	.EQU	CMP_CTL2_FLTCS1,		17
	.EQU	CMP_CTL2_FLTCS0,		16
	.EQU	CMP_CTL2_FLTDIV7,		15
	.EQU	CMP_CTL2_FLTDIV6,		14
	.EQU	CMP_CTL2_FLTDIV5,		13
	.EQU	CMP_CTL2_FLTDIV4,		12
	.EQU	CMP_CTL2_FLTDIV3,		11
	.EQU	CMP_CTL2_FLTDIV2,		10
	.EQU	CMP_CTL2_FLTDIV1,		9
	.EQU	CMP_CTL2_FLTDIV0,		8
	.EQU	CMP_CTL2_WINCLKSEL,		7
	.EQU	CMP_CTL2_FLTCNT2,		6
	.EQU	CMP_CTL2_FLTCNT1,		5
	.EQU	CMP_CTL2_FLTCNT0,		4
	.EQU	CMP_CTL2_FLTEN,		3
	.EQU	CMP_CTL2_WINEN,		2
	.EQU	CMP_CTL2_POL,		1
//  register-------------------------------------
	.EQU	CMP_CTL3,		0x4000038C
//  0x4000 038C  CMP_CTL3   Bits-------------------------------------
	.EQU	CMP_CTL3_PMOD3,		31
	.EQU	CMP_CTL3_PMOD2,		30
	.EQU	CMP_CTL3_PMOD1,		29
	.EQU	CMP_CTL3_PMOD0,		28
	.EQU	CMP_CTL3_NMOD3,		27
	.EQU	CMP_CTL3_NMOD2,		26
	.EQU	CMP_CTL3_NMOD1,		25
	.EQU	CMP_CTL3_NMOD0,		24
	.EQU	CMP_CTL3_IFFEN,		19
	.EQU	CMP_CTL3_IFREN,		18
	.EQU	CMP_CTL3_FLTCS1,		17
	.EQU	CMP_CTL3_FLTCS0,		16
	.EQU	CMP_CTL3_FLTDIV7,		15
	.EQU	CMP_CTL3_FLTDIV6,		14
	.EQU	CMP_CTL3_FLTDIV5,		13
	.EQU	CMP_CTL3_FLTDIV4,		12
	.EQU	CMP_CTL3_FLTDIV3,		11
	.EQU	CMP_CTL3_FLTDIV2,		10
	.EQU	CMP_CTL3_FLTDIV1,		9
	.EQU	CMP_CTL3_FLTDIV0,		8
	.EQU	CMP_CTL3_WINCLKSEL,		7
	.EQU	CMP_CTL3_FLTCNT2,		6
	.EQU	CMP_CTL3_FLTCNT1,		5
	.EQU	CMP_CTL3_FLTCNT0,		4
	.EQU	CMP_CTL3_FLTEN,		3
	.EQU	CMP_CTL3_WINEN,		2
	.EQU	CMP_CTL3_POL,		1
	.EQU	CMP_CTL3_EN,		0
//  register-------------------------------------
	.EQU	CMP_CTL4,		0x40000390
//  0x4000 0390  CMP_CTL4   Bits-------------------------------------
	.EQU	CMP_CTL4_C3OUT,		31
	.EQU	CMP_CTL4_C2OUT,		30
	.EQU	CMP_CTL4_C1OUT,		29
	.EQU	CMP_CTL4_C0OUT,		28
	.EQU	CMP_CTL4_C3IF,		27
	.EQU	CMP_CTL4_C2IF,		26
	.EQU	CMP_CTL4_C1IF,		25
	.EQU	CMP_CTL4_C0IF,		24
	.EQU	CMP_CTL4_CIFMS,		23
	.EQU	CMP_CTL4_PWMCMP,		22
	.EQU	CMP_CTL4_CMPOUTASEL1,		21
	.EQU	CMP_CTL4_CMPOUTASEL0,		20
	.EQU	CMP_CTL4_C3IC,		19
	.EQU	CMP_CTL4_C2IC,		18
	.EQU	CMP_CTL4_C1IC,		17
	.EQU	CMP_CTL4_C0IC,		16
	.EQU	CMP_CTL4_C3IE,		15
	.EQU	CMP_CTL4_C2IE,		14
	.EQU	CMP_CTL4_C1IE,		13
	.EQU	CMP_CTL4_C0IE,		12
	.EQU	CMP_CTL4_CMP3ANALOGOUTEN,		11
	.EQU	CMP_CTL4_IOEN,		10
	.EQU	CMP_CTL4_CMPOUTDSEL1,		9
	.EQU	CMP_CTL4_CMPOUTDSEL0,		8
	.EQU	CMP_CTL4_DELAYVOL1,		7
	.EQU	CMP_CTL4_DELAYVOL0,		6
	.EQU	CMP_CTL4_HALLSEL,		5
	.EQU	CMP_CTL4_BEMFEN,		4
	.EQU	CMP_CTL4_FLTINSEL,		3
	.EQU	CMP_CTL4_C2EN,		2
	.EQU	CMP_CTL4_C1EN,		1
	.EQU	CMP_CTL4_C0EN,		0
//  register-------------------------------------
	.EQU	CMP_CTL5,		0x40000394
//  0x4000 0394  CMP_CTL5   Bits-------------------------------------
	.EQU	CMP_CTL5_INSCM,		31
	.EQU	CMP_CTL5_MOTORSEL,		30
	.EQU	CMP_CTL5_COPSEL1,		29
	.EQU	CMP_CTL5_COPSEL0,		28
	.EQU	CMP_CTL5_CMPLPEN,		8
//  register-------------------------------------
	.EQU	CMP_TRIM0,		0x40000398
//  0x4000 0398  CMP_TRIM0   Bits-------------------------------------
	.EQU	CMP_TRIM0_CMPTRIMHIGHEN,		31
	.EQU	CMP_TRIM0_CMPTRIMLOWEN,		30
	.EQU	CMP_TRIM0_C0TRIMP5,		13
	.EQU	CMP_TRIM0_C0TRIMP4,		12
	.EQU	CMP_TRIM0_C0TRIMP3,		11
	.EQU	CMP_TRIM0_C0TRIMP2,		10
	.EQU	CMP_TRIM0_C0TRIMP1,		9
	.EQU	CMP_TRIM0_C0TRIMP0,		8
	.EQU	CMP_TRIM0_C0TRIMPPOL,		7
	.EQU	CMP_TRIM0_C0TRIMN5,		6
	.EQU	CMP_TRIM0_C0TRIMN4,		5
	.EQU	CMP_TRIM0_C0TRIMN3,		4
	.EQU	CMP_TRIM0_C0TRIMN2,		3
	.EQU	CMP_TRIM0_C0TRIMN1,		2
	.EQU	CMP_TRIM0_C0TRIMN0,		1
	.EQU	CMP_TRIM0_C0TRIMNPOL,		0
//  register-------------------------------------
	.EQU	CMP_TRIM1,		0x4000039C
//  0x4000 039C  CMP_TRIM1   Bits-------------------------------------
	.EQU	CMP_TRIM1_C1TRIMP5,		13
	.EQU	CMP_TRIM1_C1TRIMP4,		12
	.EQU	CMP_TRIM1_C1TRIMP3,		11
	.EQU	CMP_TRIM1_C1TRIMP2,		10
	.EQU	CMP_TRIM1_C1TRIMP1,		9
	.EQU	CMP_TRIM1_C1TRIMP0,		8
	.EQU	CMP_TRIM1_C1TRIMPPOL,		7
	.EQU	CMP_TRIM1_C1TRIMN5,		6
	.EQU	CMP_TRIM1_C1TRIMN4,		5
	.EQU	CMP_TRIM1_C1TRIMN3,		4
	.EQU	CMP_TRIM1_C1TRIMN2,		3
	.EQU	CMP_TRIM1_C1TRIMN1,		2
	.EQU	CMP_TRIM1_C1TRIMN0,		1
	.EQU	CMP_TRIM1_C1TRIMNPOL,		0
//  register-------------------------------------
	.EQU	CMP_TRIM2,		0x400003A0
//  0x4000 03A0  CMP_TRIM2   Bits-------------------------------------
	.EQU	CMP_TRIM2_C2TRIMP5,		13
	.EQU	CMP_TRIM2_C2TRIMP4,		12
	.EQU	CMP_TRIM2_C2TRIMP3,		11
	.EQU	CMP_TRIM2_C2TRIMP2,		10
	.EQU	CMP_TRIM2_C2TRIMP1,		9
	.EQU	CMP_TRIM2_C2TRIMP0,		8
	.EQU	CMP_TRIM2_C2TRIMPPOL,		7
	.EQU	CMP_TRIM2_C2TRIMN5,		6
	.EQU	CMP_TRIM2_C2TRIMN4,		5
	.EQU	CMP_TRIM2_C2TRIMN3,		4
	.EQU	CMP_TRIM2_C2TRIMN2,		3
	.EQU	CMP_TRIM2_C2TRIMN1,		2
	.EQU	CMP_TRIM2_C2TRIMN0,		1
	.EQU	CMP_TRIM2_C2TRIMNPOL,		0
//  register-------------------------------------
	.EQU	CMP_TRIM3,		0x400003A4
//  0x4000 03A4  CMP_TRIM3   Bits-------------------------------------
	.EQU	CMP_TRIM3_C3TRIMP5,		13
	.EQU	CMP_TRIM3_C3TRIMP4,		12
	.EQU	CMP_TRIM3_C3TRIMP3,		11
	.EQU	CMP_TRIM3_C3TRIMP2,		10
	.EQU	CMP_TRIM3_C3TRIMP1,		9
	.EQU	CMP_TRIM3_C3TRIMP0,		8
	.EQU	CMP_TRIM3_C3TRIMPPOL,		7
	.EQU	CMP_TRIM3_C3TRIMN5,		6
	.EQU	CMP_TRIM3_C3TRIMN4,		5
	.EQU	CMP_TRIM3_C3TRIMN3,		4
	.EQU	CMP_TRIM3_C3TRIMN2,		3
	.EQU	CMP_TRIM3_C3TRIMN1,		2
	.EQU	CMP_TRIM3_C3TRIMN0,		1
	.EQU	CMP_TRIM3_C3TRIMNPOL,		0
//  register-------------------------------------
	.EQU	USART0_CTLR,	0x40000500
//  0x4000 0500  USART0_CTLR   Bits-------------------------------------
	.EQU	USART0_CTLR_RESHD,		30
	.EQU	USART0_CTLR_BKPWS,		26
	.EQU	USART0_CTLR_RTSE,		25
	.EQU	USART0_CTLR_CTSE,		24
	.EQU	USART0_CTLR_DT9EN,		21
	.EQU	USART0_CTLR_PARM,		20
	.EQU	USART0_CTLR_TX9SEL,		19
	.EQU	USART0_CTLR_STPW,		18
	.EQU	USART0_CTLR_TIDLEEN,		17
	.EQU	USART0_CTLR_RXEN,		16
	.EQU	USART0_CTLR_TXEN,		15
	.EQU	USART0_CTLR_SYNC,		14
	.EQU	USART0_CTLR_SENDB,		13
	.EQU	USART0_CTLR_RIDLEIS,		12
	.EQU	USART0_CTLR_ABRDEN,		11
	.EQU	USART0_CTLR_ADREN,		9
	.EQU	USART0_CTLR_CSRS,		8
	.EQU	USART0_CTLR_WUEN,		7
	.EQU	USART0_CTLR_RCONV,		5
	.EQU	USART0_CTLR_TCONV,		4
	.EQU	USART0_CTLR_SCKPS,		3
	.EQU	USART0_CTLR_BRCKS1,		2
	.EQU	USART0_CTLR_BRCKS0,		1
	.EQU	USART0_CTLR_USARTEN,		0
//  register-------------------------------------
	.EQU	USART0_BRGR,	0x40000504
//  0x4000 0504  USART0_BRGR   Bits-------------------------------------
	.EQU	USART0_BRGR_BRGF2_3,		23
	.EQU	USART0_BRGR_BRGF2_2,		22
	.EQU	USART0_BRGR_BRGF2_1,		21
	.EQU	USART0_BRGR_BRGF2_0,		20
	.EQU	USART0_BRGR_BRGF1_3,		19
	.EQU	USART0_BRGR_BRGF1_2,		18
	.EQU	USART0_BRGR_BRGF1_1,		17
	.EQU	USART0_BRGR_BRGF1_0,		16
	.EQU	USART0_BRGR_BRGM15,		15
	.EQU	USART0_BRGR_BRGM14,		14
	.EQU	USART0_BRGR_BRGM13,		13
	.EQU	USART0_BRGR_BRGM12,		12
	.EQU	USART0_BRGR_BRGM11,		11
	.EQU	USART0_BRGR_BRGM10,		10
	.EQU	USART0_BRGR_BRGM9,		9
	.EQU	USART0_BRGR_BRGM8,		8
	.EQU	USART0_BRGR_BRGM7,		7
	.EQU	USART0_BRGR_BRGM6,		6
	.EQU	USART0_BRGR_BRGM5,		5
	.EQU	USART0_BRGR_BRGM4,		4
	.EQU	USART0_BRGR_BRGM3,		3
	.EQU	USART0_BRGR_BRGM2,		2
	.EQU	USART0_BRGR_BRGM1,		1
	.EQU	USART0_BRGR_BRGM0,		0
//  register-------------------------------------
	.EQU	USART0_STR,	0x40000508
//  0x4000 0508  USART0_STR   Bits-------------------------------------
	.EQU	USART0_STR_TXSEL,		30
	.EQU	USART0_STR_RXDSEL,		29
	.EQU	USART0_STR_CTSSEL,		28
	.EQU	USART0_STR_TFEIF1,		27
	.EQU	USART0_STR_IDLEIC,		26
	.EQU	USART0_STR_UADMIC,		25
	.EQU	USART0_STR_CTSIC,		24
	.EQU	USART0_STR_REIC,		23
	.EQU	USART0_STR_TEIC,		22
	.EQU	USART0_STR_WUIC,		21
	.EQU	USART0_STR_ABTOIC,		20
	.EQU	USART0_STR_BRIC,		19
	.EQU	USART0_STR_FREIC,		18
	.EQU	USART0_STR_PAREIC,		17
	.EQU	USART0_STR_OVFEIC,		16
	.EQU	USART0_STR_IDLEIF,		15
	.EQU	USART0_STR_UADMIF,		14
	.EQU	USART0_STR_TXEIF,		13
	.EQU	USART0_STR_TFEIF,		12
	.EQU	USART0_STR_RDRIF,		11
	.EQU	USART0_STR_TXFR,		10
	.EQU	USART0_STR_RCFR,		9
	.EQU	USART0_STR_CTSIF,		8
	.EQU	USART0_STR_WUIF,		5
	.EQU	USART0_STR_ABTOIF,		4
	.EQU	USART0_STR_BRIF,		3
	.EQU	USART0_STR_FREIF,		2
	.EQU	USART0_STR_PAREIF,		1
	.EQU	USART0_STR_OVFEIF,		0
//  register-------------------------------------
	.EQU	USART0_TBUFR,	0x4000050C
//  0x4000 050C  USART0_TBUFR   Bits-------------------------------------
	.EQU	USART0_TBUFR_TBUF7,		7
	.EQU	USART0_TBUFR_TBUF6,		6
	.EQU	USART0_TBUFR_TBUF5,		5
	.EQU	USART0_TBUFR_TBUF4,		4
	.EQU	USART0_TBUFR_TBUF3,		3
	.EQU	USART0_TBUFR_TBUF2,		2
	.EQU	USART0_TBUFR_TBUF1,		1
	.EQU	USART0_TBUFR_TBUF0,		0
//  register-------------------------------------
	.EQU	USART0_RBUFR,	0x4000050C
//  0x4000 050C  USART0_RBUFR   Bits-------------------------------------
	.EQU	USART0_RBUFR_RBUF8,		8
	.EQU	USART0_RBUFR_RBUF7,		7
	.EQU	USART0_RBUFR_RBUF6,		6
	.EQU	USART0_RBUFR_RBUF5,		5
	.EQU	USART0_RBUFR_RBUF4,		4
	.EQU	USART0_RBUFR_RBUF3,		3
	.EQU	USART0_RBUFR_RBUF2,		2
	.EQU	USART0_RBUFR_RBUF1,		1
	.EQU	USART0_RBUFR_RBUF0,		0
//  register-------------------------------------
	.EQU	USART0_IER,	0x40000514
//  0x4000 0514  USART0_IER   Bits-------------------------------------
	.EQU	USART0_IER_UADMIE,		18
	.EQU	USART0_IER_UTXDE,		17
	.EQU	USART0_IER_URCDE,		16
	.EQU	USART0_IER_IDLEIE,		12
	.EQU	USART0_IER_TXEIE,		11
	.EQU	USART0_IER_TFEIE,		10
	.EQU	USART0_IER_RDRIE,		9
	.EQU	USART0_IER_CTSIE,		8
	.EQU	USART0_IER_WUIE,		5
	.EQU	USART0_IER_ABTOIE,		4
	.EQU	USART0_IER_BRIE,		3
	.EQU	USART0_IER_FREIE,		2
	.EQU	USART0_IER_PAREIE,		1
	.EQU	USART0_IER_OVFEIE,		0
//  register-------------------------------------
	.EQU	USART0_ADM,	0x40000518
//  0x4000 0518  USART0_ADM   Bits-------------------------------------
	.EQU	USART0_ADM_ADM7,		7
	.EQU	USART0_ADM_ADM6,		6
	.EQU	USART0_ADM_ADM5,		5
	.EQU	USART0_ADM_ADM4,		4
	.EQU	USART0_ADM_ADM3,		3
	.EQU	USART0_ADM_ADM2,		2
	.EQU	USART0_ADM_ADM1,		1
	.EQU	USART0_ADM_ADM0,		0
//  register-------------------------------------
	.EQU	USART1_CTLR,	0x40000580
//  0x4000 0580  USART1_CTLR   Bits-------------------------------------
	.EQU	USART1_CTLR_RESHD,		30
	.EQU	USART1_CTLR_BKPWS,		26
	.EQU	USART1_CTLR_RTSE,		25
	.EQU	USART1_CTLR_CTSE,		24
	.EQU	USART1_CTLR_DT9EN,		21
	.EQU	USART1_CTLR_PARM,		20
	.EQU	USART1_CTLR_TX9SEL,		19
	.EQU	USART1_CTLR_STPW,		18
	.EQU	USART1_CTLR_TIDLEEN,		17
	.EQU	USART1_CTLR_RXEN,		16
	.EQU	USART1_CTLR_TXEN,		15
	.EQU	USART1_CTLR_SYNC,		14
	.EQU	USART1_CTLR_SENDB,		13
	.EQU	USART1_CTLR_RIDLEIS,		12
	.EQU	USART1_CTLR_ABRDEN,		11
	.EQU	USART1_CTLR_ADREN,		9
	.EQU	USART1_CTLR_CSRS,		8
	.EQU	USART1_CTLR_WUEN,		7
	.EQU	USART1_CTLR_RCONV,		5
	.EQU	USART1_CTLR_TCONV,		4
	.EQU	USART1_CTLR_SCKPS,		3
	.EQU	USART1_CTLR_BRCKS1,		2
	.EQU	USART1_CTLR_BRCKS0,		1
	.EQU	USART1_CTLR_USARTEN,		0
//  register-------------------------------------
	.EQU	USART1_BRGR,	0x40000584
//  0x4000 0584  USART1_BRGR   Bits-------------------------------------
	.EQU	USART1_BRGR_BRGF2_3,		23
	.EQU	USART1_BRGR_BRGF2_2,		22
	.EQU	USART1_BRGR_BRGF2_1,		21
	.EQU	USART1_BRGR_BRGF2_0,		20
	.EQU	USART1_BRGR_BRGF1_3,		19
	.EQU	USART1_BRGR_BRGF1_2,		18
	.EQU	USART1_BRGR_BRGF1_1,		17
	.EQU	USART1_BRGR_BRGF1_0,		16
	.EQU	USART1_BRGR_BRGM15,		15
	.EQU	USART1_BRGR_BRGM14,		14
	.EQU	USART1_BRGR_BRGM13,		13
	.EQU	USART1_BRGR_BRGM12,		12
	.EQU	USART1_BRGR_BRGM11,		11
	.EQU	USART1_BRGR_BRGM10,		10
	.EQU	USART1_BRGR_BRGM9,		9
	.EQU	USART1_BRGR_BRGM8,		8
	.EQU	USART1_BRGR_BRGM7,		7
	.EQU	USART1_BRGR_BRGM6,		6
	.EQU	USART1_BRGR_BRGM5,		5
	.EQU	USART1_BRGR_BRGM4,		4
	.EQU	USART1_BRGR_BRGM3,		3
	.EQU	USART1_BRGR_BRGM2,		2
	.EQU	USART1_BRGR_BRGM1,		1
	.EQU	USART1_BRGR_BRGM0,		0
//  register-------------------------------------
	.EQU	USART1_STR,	0x40000588
//  0x4000 0588  USART1_STR   Bits-------------------------------------
	.EQU	USART1_STR_TXSEL,		30
	.EQU	USART1_STR_RXDSEL,		29
	.EQU	USART1_STR_CTSSEL,		28
	.EQU	USART1_STR_TFEIF1,		27
	.EQU	USART1_STR_IDLEIC,		26
	.EQU	USART1_STR_UADMIC,		25
	.EQU	USART1_STR_CTSIC,		24
	.EQU	USART1_STR_REIC,		23
	.EQU	USART1_STR_TEIC,		22
	.EQU	USART1_STR_WUIC,		21
	.EQU	USART1_STR_ABTOIC,		20
	.EQU	USART1_STR_BRIC,		19
	.EQU	USART1_STR_FREIC,		18
	.EQU	USART1_STR_PAREIC,		17
	.EQU	USART1_STR_OVFEIC,		16
	.EQU	USART1_STR_IDLEIF,		15
	.EQU	USART1_STR_UADMIF,		14
	.EQU	USART1_STR_TXEIF,		13
	.EQU	USART1_STR_TFEIF,		12
	.EQU	USART1_STR_RDRIF,		11
	.EQU	USART1_STR_TXFR,		10
	.EQU	USART1_STR_RCFR,		9
	.EQU	USART1_STR_CTSIF,		8
	.EQU	USART1_STR_WUIF,		5
	.EQU	USART1_STR_ABTOIF,		4
	.EQU	USART1_STR_BRIF,		3
	.EQU	USART1_STR_FREIF,		2
	.EQU	USART1_STR_PAREIF,		1
	.EQU	USART1_STR_OVFEIF,		0
//  register-------------------------------------
	.EQU	USART1_TBUFR,	0x4000058C
//  0x4000 058C  USART1_TBUFR   Bits-------------------------------------
	.EQU	USART1_TBUFR_TBUF7,		7
	.EQU	USART1_TBUFR_TBUF6,		6
	.EQU	USART1_TBUFR_TBUF5,		5
	.EQU	USART1_TBUFR_TBUF4,		4
	.EQU	USART1_TBUFR_TBUF3,		3
	.EQU	USART1_TBUFR_TBUF2,		2
	.EQU	USART1_TBUFR_TBUF1,		1
	.EQU	USART1_TBUFR_TBUF0,		0
//  register-------------------------------------
	.EQU	USART1_RBUFR,	0x4000058C
//  0x4000 058C  USART1_RBUFR   Bits-------------------------------------
	.EQU	USART1_RBUFR_RBUF8,		8
	.EQU	USART1_RBUFR_RBUF7,		7
	.EQU	USART1_RBUFR_RBUF6,		6
	.EQU	USART1_RBUFR_RBUF5,		5
	.EQU	USART1_RBUFR_RBUF4,		4
	.EQU	USART1_RBUFR_RBUF3,		3
	.EQU	USART1_RBUFR_RBUF2,		2
	.EQU	USART1_RBUFR_RBUF1,		1
	.EQU	USART1_RBUFR_RBUF0,		0
//  register-------------------------------------
	.EQU	USART1_IER,	0x40000594
//  0x4000 0594  USART1_IER   Bits-------------------------------------
	.EQU	USART1_IER_UADMIE,		18
	.EQU	USART1_IER_UTXDE,		17
	.EQU	USART1_IER_URCDE,		16
	.EQU	USART1_IER_IDLEIE,		12
	.EQU	USART1_IER_TXEIE,		11
	.EQU	USART1_IER_TFEIE,		10
	.EQU	USART1_IER_RDRIE,		9
	.EQU	USART1_IER_CTSIE,		8
	.EQU	USART1_IER_WUIE,		5
	.EQU	USART1_IER_ABTOIE,		4
	.EQU	USART1_IER_BRIE,		3
	.EQU	USART1_IER_FREIE,		2
	.EQU	USART1_IER_PAREIE,		1
	.EQU	USART1_IER_OVFEIE,		0
//  register-------------------------------------
	.EQU	USART1_ADM,	0x40000598
//  0x4000 0598  USART1_ADM   Bits-------------------------------------
	.EQU	USART1_ADM_ADM7,		7
	.EQU	USART1_ADM_ADM6,		6
	.EQU	USART1_ADM_ADM5,		5
	.EQU	USART1_ADM_ADM4,		4
	.EQU	USART1_ADM_ADM3,		3
	.EQU	USART1_ADM_ADM2,		2
	.EQU	USART1_ADM_ADM1,		1
	.EQU	USART1_ADM_ADM0,		0
//  register-------------------------------------
	.EQU	USART2_CTLR,	0x40000600
//  0x4000 0600  USART2_CTLR   Bits-------------------------------------
	.EQU	USART2_CTLR_RESHD,		30
	.EQU	USART2_CTLR_BKPWS,		26
	.EQU	USART2_CTLR_RTSE,		25
	.EQU	USART2_CTLR_CTSE,		24
	.EQU	USART2_CTLR_DT9EN,		21
	.EQU	USART2_CTLR_PARM,		20
	.EQU	USART2_CTLR_TX9SEL,		19
	.EQU	USART2_CTLR_STPW,		18
	.EQU	USART2_CTLR_TIDLEEN,		17
	.EQU	USART2_CTLR_RXEN,		16
	.EQU	USART2_CTLR_TXEN,		15
	.EQU	USART2_CTLR_SYNC,		14
	.EQU	USART2_CTLR_SENDB,		13
	.EQU	USART2_CTLR_RIDLEIS,		12
	.EQU	USART2_CTLR_ABRDEN,		11
	.EQU	USART2_CTLR_ADREN,		9
	.EQU	USART2_CTLR_CSRS,		8
	.EQU	USART2_CTLR_WUEN,		7
	.EQU	USART2_CTLR_RCONV,		5
	.EQU	USART2_CTLR_TCONV,		4
	.EQU	USART2_CTLR_SCKPS,		3
	.EQU	USART2_CTLR_BRCKS1,		2
	.EQU	USART2_CTLR_BRCKS0,		1
	.EQU	USART2_CTLR_USARTEN,		0
//  register-------------------------------------
	.EQU	USART2_BRGR,	0x40000604
//  0x4000 0604  USART2_BRGR   Bits-------------------------------------
	.EQU	USART2_BRGR_BRGF2_3,		23
	.EQU	USART2_BRGR_BRGF2_2,		22
	.EQU	USART2_BRGR_BRGF2_1,		21
	.EQU	USART2_BRGR_BRGF2_0,		20
	.EQU	USART2_BRGR_BRGF1_3,		19
	.EQU	USART2_BRGR_BRGF1_2,		18
	.EQU	USART2_BRGR_BRGF1_1,		17
	.EQU	USART2_BRGR_BRGF1_0,		16
	.EQU	USART2_BRGR_BRGM15,		15
	.EQU	USART2_BRGR_BRGM14,		14
	.EQU	USART2_BRGR_BRGM13,		13
	.EQU	USART2_BRGR_BRGM12,		12
	.EQU	USART2_BRGR_BRGM11,		11
	.EQU	USART2_BRGR_BRGM10,		10
	.EQU	USART2_BRGR_BRGM9,		9
	.EQU	USART2_BRGR_BRGM8,		8
	.EQU	USART2_BRGR_BRGM7,		7
	.EQU	USART2_BRGR_BRGM6,		6
	.EQU	USART2_BRGR_BRGM5,		5
	.EQU	USART2_BRGR_BRGM4,		4
	.EQU	USART2_BRGR_BRGM3,		3
	.EQU	USART2_BRGR_BRGM2,		2
	.EQU	USART2_BRGR_BRGM1,		1
	.EQU	USART2_BRGR_BRGM0,		0
//  register-------------------------------------
	.EQU	USART2_STR,	0x40000608
//  0x4000 0608  USART2_STR   Bits-------------------------------------
	.EQU	USART2_STR_TXSEL,		30
	.EQU	USART2_STR_RXDSEL,		29
	.EQU	USART2_STR_CTSSEL,		28
	.EQU	USART2_STR_TFEIF1,		27
	.EQU	USART2_STR_IDLEIC,		26
	.EQU	USART2_STR_UADMIC,		25
	.EQU	USART2_STR_CTSIC,		24
	.EQU	USART2_STR_REIC,		23
	.EQU	USART2_STR_TEIC,		22
	.EQU	USART2_STR_WUIC,		21
	.EQU	USART2_STR_ABTOIC,		20
	.EQU	USART2_STR_BRIC,		19
	.EQU	USART2_STR_FREIC,		18
	.EQU	USART2_STR_PAREIC,		17
	.EQU	USART2_STR_OVFEIC,		16
	.EQU	USART2_STR_IDLEIF,		15
	.EQU	USART2_STR_UADMIF,		14
	.EQU	USART2_STR_TXEIF,		13
	.EQU	USART2_STR_TFEIF,		12
	.EQU	USART2_STR_RDRIF,		11
	.EQU	USART2_STR_TXFR,		10
	.EQU	USART2_STR_RCFR,		9
	.EQU	USART2_STR_CTSIF,		8
	.EQU	USART2_STR_WUIF,		5
	.EQU	USART2_STR_ABTOIF,		4
	.EQU	USART2_STR_BRIF,		3
	.EQU	USART2_STR_FREIF,		2
	.EQU	USART2_STR_PAREIF,		1
	.EQU	USART2_STR_OVFEIF,		0
//  register-------------------------------------
	.EQU	USART2_TBUFR,	0x4000060C
//  0x4000 060C  USART2_TBUFR   Bits-------------------------------------
	.EQU	USART2_TBUFR_TBUF7,		7
	.EQU	USART2_TBUFR_TBUF6,		6
	.EQU	USART2_TBUFR_TBUF5,		5
	.EQU	USART2_TBUFR_TBUF4,		4
	.EQU	USART2_TBUFR_TBUF3,		3
	.EQU	USART2_TBUFR_TBUF2,		2
	.EQU	USART2_TBUFR_TBUF1,		1
	.EQU	USART2_TBUFR_TBUF0,		0
//  register-------------------------------------
	.EQU	USART2_RBUFR,	0x4000060C
//  0x4000 060C  USART2_RBUFR   Bits-------------------------------------
	.EQU	USART2_RBUFR_RBUF8,		8
	.EQU	USART2_RBUFR_RBUF7,		7
	.EQU	USART2_RBUFR_RBUF6,		6
	.EQU	USART2_RBUFR_RBUF5,		5
	.EQU	USART2_RBUFR_RBUF4,		4
	.EQU	USART2_RBUFR_RBUF3,		3
	.EQU	USART2_RBUFR_RBUF2,		2
	.EQU	USART2_RBUFR_RBUF1,		1
	.EQU	USART2_RBUFR_RBUF0,		0
//  register-------------------------------------
	.EQU	USART2_IER,	0x40000614
//  0x4000 0614  USART2_IER   Bits-------------------------------------
	.EQU	USART2_IER_UADMIE,		18
	.EQU	USART2_IER_UTXDE,		17
	.EQU	USART2_IER_URCDE,		16
	.EQU	USART2_IER_IDLEIE,		12
	.EQU	USART2_IER_TXEIE,		11
	.EQU	USART2_IER_TFEIE,		10
	.EQU	USART2_IER_RDRIE,		9
	.EQU	USART2_IER_CTSIE,		8
	.EQU	USART2_IER_WUIE,		5
	.EQU	USART2_IER_ABTOIE,		4
	.EQU	USART2_IER_BRIE,		3
	.EQU	USART2_IER_FREIE,		2
	.EQU	USART2_IER_PAREIE,		1
	.EQU	USART2_IER_OVFEIE,		0
//  register-------------------------------------
	.EQU	USART2_ADM,	0x40000618
//  0x4000 0618  USART2_ADM   Bits-------------------------------------
	.EQU	USART2_ADM_ADM7,		7
	.EQU	USART2_ADM_ADM6,		6
	.EQU	USART2_ADM_ADM5,		5
	.EQU	USART2_ADM_ADM4,		4
	.EQU	USART2_ADM_ADM3,		3
	.EQU	USART2_ADM_ADM2,		2
	.EQU	USART2_ADM_ADM1,		1
	.EQU	USART2_ADM_ADM0,		0
//  register-------------------------------------
	.EQU	USART3_CTLR,	0x40000680
//  0x4000 0680  USART3_CTLR   Bits-------------------------------------
	.EQU	USART3_CTLR_RESHD,		30
	.EQU	USART3_CTLR_BKPWS,		26
	.EQU	USART3_CTLR_RTSE,		25
	.EQU	USART3_CTLR_CTSE,		24
	.EQU	USART3_CTLR_DT9EN,		21
	.EQU	USART3_CTLR_PARM,		20
	.EQU	USART3_CTLR_TX9SEL,		19
	.EQU	USART3_CTLR_STPW,		18
	.EQU	USART3_CTLR_TIDLEEN,		17
	.EQU	USART3_CTLR_RXEN,		16
	.EQU	USART3_CTLR_TXEN,		15
	.EQU	USART3_CTLR_SYNC,		14
	.EQU	USART3_CTLR_SENDB,		13
	.EQU	USART3_CTLR_RIDLEIS,		12
	.EQU	USART3_CTLR_ABRDEN,		11
	.EQU	USART3_CTLR_ADREN,		9
	.EQU	USART3_CTLR_CSRS,		8
	.EQU	USART3_CTLR_WUEN,		7
	.EQU	USART3_CTLR_RCONV,		5
	.EQU	USART3_CTLR_TCONV,		4
	.EQU	USART3_CTLR_SCKPS,		3
	.EQU	USART3_CTLR_BRCKS1,		2
	.EQU	USART3_CTLR_BRCKS0,		1
	.EQU	USART3_CTLR_USARTEN,		0
//  register-------------------------------------
	.EQU	USART3_BRGR,	0x40000684
//  0x4000 0684  USART3_BRGR   Bits-------------------------------------
	.EQU	USART3_BRGR_BRGF2_3,		23
	.EQU	USART3_BRGR_BRGF2_2,		22
	.EQU	USART3_BRGR_BRGF2_1,		21
	.EQU	USART3_BRGR_BRGF2_0,		20
	.EQU	USART3_BRGR_BRGF1_3,		19
	.EQU	USART3_BRGR_BRGF1_2,		18
	.EQU	USART3_BRGR_BRGF1_1,		17
	.EQU	USART3_BRGR_BRGF1_0,		16
	.EQU	USART3_BRGR_BRGM15,		15
	.EQU	USART3_BRGR_BRGM14,		14
	.EQU	USART3_BRGR_BRGM13,		13
	.EQU	USART3_BRGR_BRGM12,		12
	.EQU	USART3_BRGR_BRGM11,		11
	.EQU	USART3_BRGR_BRGM10,		10
	.EQU	USART3_BRGR_BRGM9,		9
	.EQU	USART3_BRGR_BRGM8,		8
	.EQU	USART3_BRGR_BRGM7,		7
	.EQU	USART3_BRGR_BRGM6,		6
	.EQU	USART3_BRGR_BRGM5,		5
	.EQU	USART3_BRGR_BRGM4,		4
	.EQU	USART3_BRGR_BRGM3,		3
	.EQU	USART3_BRGR_BRGM2,		2
	.EQU	USART3_BRGR_BRGM1,		1
	.EQU	USART3_BRGR_BRGM0,		0
//  register-------------------------------------
	.EQU	USART3_STR,	0x40000688
//  0x4000 0688  USART3_STR   Bits-------------------------------------
	.EQU	USART3_STR_TXSEL,		30
	.EQU	USART3_STR_RXDSEL,		29
	.EQU	USART3_STR_CTSSEL,		28
	.EQU	USART3_STR_TFEIF1,		27
	.EQU	USART3_STR_IDLEIC,		26
	.EQU	USART3_STR_UADMIC,		25
	.EQU	USART3_STR_CTSIC,		24
	.EQU	USART3_STR_REIC,		23
	.EQU	USART3_STR_TEIC,		22
	.EQU	USART3_STR_WUIC,		21
	.EQU	USART3_STR_ABTOIC,		20
	.EQU	USART3_STR_BRIC,		19
	.EQU	USART3_STR_FREIC,		18
	.EQU	USART3_STR_PAREIC,		17
	.EQU	USART3_STR_OVFEIC,		16
	.EQU	USART3_STR_IDLEIF,		15
	.EQU	USART3_STR_UADMIF,		14
	.EQU	USART3_STR_TXEIF,		13
	.EQU	USART3_STR_TFEIF,		12
	.EQU	USART3_STR_RDRIF,		11
	.EQU	USART3_STR_TXFR,		10
	.EQU	USART3_STR_RCFR,		9
	.EQU	USART3_STR_CTSIF,		8
	.EQU	USART3_STR_WUIF,		5
	.EQU	USART3_STR_ABTOIF,		4
	.EQU	USART3_STR_BRIF,		3
	.EQU	USART3_STR_FREIF,		2
	.EQU	USART3_STR_PAREIF,		1
	.EQU	USART3_STR_OVFEIF,		0
//  register-------------------------------------
	.EQU	USART3_TBUFR,	0x4000068C
//  0x4000 068C  USART3_TBUFR   Bits-------------------------------------
	.EQU	USART3_TBUFR_TBUF7,		7
	.EQU	USART3_TBUFR_TBUF6,		6
	.EQU	USART3_TBUFR_TBUF5,		5
	.EQU	USART3_TBUFR_TBUF4,		4
	.EQU	USART3_TBUFR_TBUF3,		3
	.EQU	USART3_TBUFR_TBUF2,		2
	.EQU	USART3_TBUFR_TBUF1,		1
	.EQU	USART3_TBUFR_TBUF0,		0
//  register-------------------------------------
	.EQU	USART3_RBUFR,	0x4000068C
//  0x4000 068C  USART3_RBUFR   Bits-------------------------------------
	.EQU	USART3_RBUFR_RBUF8,		8
	.EQU	USART3_RBUFR_RBUF7,		7
	.EQU	USART3_RBUFR_RBUF6,		6
	.EQU	USART3_RBUFR_RBUF5,		5
	.EQU	USART3_RBUFR_RBUF4,		4
	.EQU	USART3_RBUFR_RBUF3,		3
	.EQU	USART3_RBUFR_RBUF2,		2
	.EQU	USART3_RBUFR_RBUF1,		1
	.EQU	USART3_RBUFR_RBUF0,		0
//  register-------------------------------------
	.EQU	USART3_IER,	0x40000694
//  0x4000 0694  USART3_IER   Bits-------------------------------------
	.EQU	USART3_IER_UADMIE,		18
	.EQU	USART3_IER_UTXDE,		17
	.EQU	USART3_IER_URCDE,		16
	.EQU	USART3_IER_IDLEIE,		12
	.EQU	USART3_IER_TXEIE,		11
	.EQU	USART3_IER_TFEIE,		10
	.EQU	USART3_IER_RDRIE,		9
	.EQU	USART3_IER_CTSIE,		8
	.EQU	USART3_IER_WUIE,		5
	.EQU	USART3_IER_ABTOIE,		4
	.EQU	USART3_IER_BRIE,		3
	.EQU	USART3_IER_FREIE,		2
	.EQU	USART3_IER_PAREIE,		1
	.EQU	USART3_IER_OVFEIE,		0
//  register-------------------------------------
	.EQU	USART3_ADM,	0x40000698
//  0x4000 0698  USART3_ADM   Bits-------------------------------------
	.EQU	USART3_ADM_ADM7,		7
	.EQU	USART3_ADM_ADM6,		6
	.EQU	USART3_ADM_ADM5,		5
	.EQU	USART3_ADM_ADM4,		4
	.EQU	USART3_ADM_ADM3,		3
	.EQU	USART3_ADM_ADM2,		2
	.EQU	USART3_ADM_ADM1,		1
	.EQU	USART3_ADM_ADM0,		0
//  register-------------------------------------
	.EQU	SPI0_BRGR,		0x40000700
//  0x4000 0700  SPI0_BRGR   Bits-------------------------------------
	.EQU	SPI0_BRGR_SPIBRG15,		15
	.EQU	SPI0_BRGR_SPIBRG14,		14
	.EQU	SPI0_BRGR_SPIBRG13,		13
	.EQU	SPI0_BRGR_SPIBRG12,		12
	.EQU	SPI0_BRGR_SPIBRG11,		11
	.EQU	SPI0_BRGR_SPIBRG10,		10
	.EQU	SPI0_BRGR_SPIBRG9,		9
	.EQU	SPI0_BRGR_SPIBRG8,		8
	.EQU	SPI0_BRGR_SPIBRG7,		7
	.EQU	SPI0_BRGR_SPIBRG6,		6
	.EQU	SPI0_BRGR_SPIBRG5,		5
	.EQU	SPI0_BRGR_SPIBRG4,		4
	.EQU	SPI0_BRGR_SPIBRG3,		3
	.EQU	SPI0_BRGR_SPIBRG2,		2
	.EQU	SPI0_BRGR_SPIBRG1,		1
	.EQU	SPI0_BRGR_SPIBRG0,		0
//  register-------------------------------------
	.EQU	SPI0_CTLR,		0x40000704
//  0x4000 0704  SPI0_CTLR   Bits-------------------------------------
	.EQU	SPI0_CTLR_SSEL1,		15
	.EQU	SPI0_CTLR_SSEL0,		14
	.EQU	SPI0_CTLR_SPIBS1,		13
	.EQU	SPI0_CTLR_SPIBS0,		12
	.EQU	SPI0_CTLR_SPICKE,		9
	.EQU	SPI0_CTLR_SPICKP,		8
	.EQU	SPI0_CTLR_SPIIOS,		7
	.EQU	SPI0_CTLR_SPIDS,		6
	.EQU	SPI0_CTLR_SPICKS1,		5
	.EQU	SPI0_CTLR_SPICKS0,		4
	.EQU	SPI0_CTLR_SPIMS2,		3
	.EQU	SPI0_CTLR_SPIMS1,		2
	.EQU	SPI0_CTLR_SPIMS0,		1
	.EQU	SPI0_CTLR_SPIEN,		0
//  register-------------------------------------
	.EQU	SPI0_BUFR,		0x40000708
//  0x4000 0708  SPI0_BUFR   Bits-------------------------------------
	.EQU	SPI0_BUFR_SPIBUF31,		31
	.EQU	SPI0_BUFR_SPIBUF30,		30
	.EQU	SPI0_BUFR_SPIBUF29,		29
	.EQU	SPI0_BUFR_SPIBUF28,		28
	.EQU	SPI0_BUFR_SPIBUF27,		27
	.EQU	SPI0_BUFR_SPIBUF26,		26
	.EQU	SPI0_BUFR_SPIBUF25,		25
	.EQU	SPI0_BUFR_SPIBUF24,		24
	.EQU	SPI0_BUFR_SPIBUF23,		23
	.EQU	SPI0_BUFR_SPIBUF22,		22
	.EQU	SPI0_BUFR_SPIBUF21,		21
	.EQU	SPI0_BUFR_SPIBUF20,		20
	.EQU	SPI0_BUFR_SPIBUF19,		19
	.EQU	SPI0_BUFR_SPIBUF18,		18
	.EQU	SPI0_BUFR_SPIBUF17,		17
	.EQU	SPI0_BUFR_SPIBUF16,		16
	.EQU	SPI0_BUFR_SPIBUF15,		15
	.EQU	SPI0_BUFR_SPIBUF14,		14
	.EQU	SPI0_BUFR_SPIBUF13,		13
	.EQU	SPI0_BUFR_SPIBUF12,		12
	.EQU	SPI0_BUFR_SPIBUF11,		11
	.EQU	SPI0_BUFR_SPIBUF10,		10
	.EQU	SPI0_BUFR_SPIBUF9,		9
	.EQU	SPI0_BUFR_SPIBUF8,		8
	.EQU	SPI0_BUFR_SPIBUF7,		7
	.EQU	SPI0_BUFR_SPIBUF6,		6
	.EQU	SPI0_BUFR_SPIBUF5,		5
	.EQU	SPI0_BUFR_SPIBUF4,		4
	.EQU	SPI0_BUFR_SPIBUF3,		3
	.EQU	SPI0_BUFR_SPIBUF2,		2
	.EQU	SPI0_BUFR_SPIBUF1,		1
	.EQU	SPI0_BUFR_SPIBUF0,		0
//  register-------------------------------------
	.EQU	SPI0_STR,		0x4000070C
//  0x4000 070C  SPI0_STR   Bits-------------------------------------
	.EQU	SPI0_STR_STXDE,		21
	.EQU	SPI0_STR_SRCDE,		20
	.EQU	SPI0_STR_TSTOPIC,		19
	.EQU	SPI0_STR_UDRIC,		18
	.EQU	SPI0_STR_TOVFIC,		17
	.EQU	SPI0_STR_ROVFIC,		16
	.EQU	SPI0_STR_TNEIE,		15
	.EQU	SPI0_STR_RNEIE,		14
	.EQU	SPI0_STR_TOVFIE,		13
	.EQU	SPI0_STR_ROVFIE,		12
	.EQU	SPI0_STR_UDRIE,		11
	.EQU	SPI0_STR_TSTOPIE,		10
	.EQU	SPI0_STR_TSTOP,		7
	.EQU	SPI0_STR_UDRIF,		6
	.EQU	SPI0_STR_TOVFIF,		5
	.EQU	SPI0_STR_ROVFIF,		4
	.EQU	SPI0_STR_TNE,		2
	.EQU	SPI0_STR_RNE,		1
	.EQU	SPI0_STR_SPIBUSY,		0
//  register-------------------------------------
	.EQU	SPI0_PPX,		0x40000718
//  0x4000 0718  SPI0_PPX   Bits-------------------------------------
	.EQU	SPI0_PPX_TESTEN_CSDELAY,		31
	.EQU	SPI0_PPX_CSDELAYEND,		30
	.EQU	SPI0_PPX_SPIPPX15,		15
	.EQU	SPI0_PPX_SPIPPX14,		14
	.EQU	SPI0_PPX_SPIPPX13,		13
	.EQU	SPI0_PPX_SPIPPX12,		12
	.EQU	SPI0_PPX_SPIPPX11,		11
	.EQU	SPI0_PPX_SPIPPX10,		10
	.EQU	SPI0_PPX_SPIPPX9,		9
	.EQU	SPI0_PPX_SPIPPX8,		8
	.EQU	SPI0_PPX_SPIPPX7,		7
	.EQU	SPI0_PPX_SPIPPX6,		6
	.EQU	SPI0_PPX_SPIPPX5,		5
	.EQU	SPI0_PPX_SPIPPX4,		4
	.EQU	SPI0_PPX_SPIPPX3,		3
	.EQU	SPI0_PPX_SPIPPX2,		2
	.EQU	SPI0_PPX_SPIPPX1,		1
	.EQU	SPI0_PPX_SPIPPX0,		0
//  register-------------------------------------
	.EQU	SPI1_BRGR,		0x40000780
//  0x4000 0780  SPI1_BRGR   Bits-------------------------------------
	.EQU	SPI1_BRGR_SPIBRG15,		15
	.EQU	SPI1_BRGR_SPIBRG14,		14
	.EQU	SPI1_BRGR_SPIBRG13,		13
	.EQU	SPI1_BRGR_SPIBRG12,		12
	.EQU	SPI1_BRGR_SPIBRG11,		11
	.EQU	SPI1_BRGR_SPIBRG10,		10
	.EQU	SPI1_BRGR_SPIBRG9,		9
	.EQU	SPI1_BRGR_SPIBRG8,		8
	.EQU	SPI1_BRGR_SPIBRG7,		7
	.EQU	SPI1_BRGR_SPIBRG6,		6
	.EQU	SPI1_BRGR_SPIBRG5,		5
	.EQU	SPI1_BRGR_SPIBRG4,		4
	.EQU	SPI1_BRGR_SPIBRG3,		3
	.EQU	SPI1_BRGR_SPIBRG2,		2
	.EQU	SPI1_BRGR_SPIBRG1,		1
	.EQU	SPI1_BRGR_SPIBRG0,		0
//  register-------------------------------------
	.EQU	SPI1_CTLR,		0x40000784
//  0x4000 0784  SPI1_CTLR   Bits-------------------------------------
	.EQU	SPI1_CTLR_SSEL1,		15
	.EQU	SPI1_CTLR_SSEL0,		14
	.EQU	SPI1_CTLR_SPIBS1,		13
	.EQU	SPI1_CTLR_SPIBS0,		12
	.EQU	SPI1_CTLR_SPICKE,		9
	.EQU	SPI1_CTLR_SPICKP,		8
	.EQU	SPI1_CTLR_SPIIOS,		7
	.EQU	SPI1_CTLR_SPIDS,		6
	.EQU	SPI1_CTLR_SPICKS1,		5
	.EQU	SPI1_CTLR_SPICKS0,		4
	.EQU	SPI1_CTLR_SPIMS2,		3
	.EQU	SPI1_CTLR_SPIMS1,		2
	.EQU	SPI1_CTLR_SPIMS0,		1
	.EQU	SPI1_CTLR_SPIEN,		0
//  register-------------------------------------
	.EQU	SPI1_BUFR,		0x40000788
//  0x4000 0788  SPI1_BUFR   Bits-------------------------------------
	.EQU	SPI1_BUFR_SPIBUF31,		31
	.EQU	SPI1_BUFR_SPIBUF30,		30
	.EQU	SPI1_BUFR_SPIBUF29,		29
	.EQU	SPI1_BUFR_SPIBUF28,		28
	.EQU	SPI1_BUFR_SPIBUF27,		27
	.EQU	SPI1_BUFR_SPIBUF26,		26
	.EQU	SPI1_BUFR_SPIBUF25,		25
	.EQU	SPI1_BUFR_SPIBUF24,		24
	.EQU	SPI1_BUFR_SPIBUF23,		23
	.EQU	SPI1_BUFR_SPIBUF22,		22
	.EQU	SPI1_BUFR_SPIBUF21,		21
	.EQU	SPI1_BUFR_SPIBUF20,		20
	.EQU	SPI1_BUFR_SPIBUF19,		19
	.EQU	SPI1_BUFR_SPIBUF18,		18
	.EQU	SPI1_BUFR_SPIBUF17,		17
	.EQU	SPI1_BUFR_SPIBUF16,		16
	.EQU	SPI1_BUFR_SPIBUF15,		15
	.EQU	SPI1_BUFR_SPIBUF14,		14
	.EQU	SPI1_BUFR_SPIBUF13,		13
	.EQU	SPI1_BUFR_SPIBUF12,		12
	.EQU	SPI1_BUFR_SPIBUF11,		11
	.EQU	SPI1_BUFR_SPIBUF10,		10
	.EQU	SPI1_BUFR_SPIBUF9,		9
	.EQU	SPI1_BUFR_SPIBUF8,		8
	.EQU	SPI1_BUFR_SPIBUF7,		7
	.EQU	SPI1_BUFR_SPIBUF6,		6
	.EQU	SPI1_BUFR_SPIBUF5,		5
	.EQU	SPI1_BUFR_SPIBUF4,		4
	.EQU	SPI1_BUFR_SPIBUF3,		3
	.EQU	SPI1_BUFR_SPIBUF2,		2
	.EQU	SPI1_BUFR_SPIBUF1,		1
	.EQU	SPI1_BUFR_SPIBUF0,		0
//  register-------------------------------------
	.EQU	SPI1_STR,		0x4000078C
//  0x4000 078C  SPI1_STR   Bits-------------------------------------
	.EQU	SPI1_STR_STXDE,		21
	.EQU	SPI1_STR_SRCDE,		20
	.EQU	SPI1_STR_TSTOPIC,		19
	.EQU	SPI1_STR_UDRIC,		18
	.EQU	SPI1_STR_TOVFIC,		17
	.EQU	SPI1_STR_ROVFIC,		16
	.EQU	SPI1_STR_TNEIE,		15
	.EQU	SPI1_STR_RNEIE,		14
	.EQU	SPI1_STR_TOVFIE,		13
	.EQU	SPI1_STR_ROVFIE,		12
	.EQU	SPI1_STR_UDRIE,		11
	.EQU	SPI1_STR_TSTOPIE,		10
	.EQU	SPI1_STR_TSTOP,		7
	.EQU	SPI1_STR_UDRIF,		6
	.EQU	SPI1_STR_TOVFIF,		5
	.EQU	SPI1_STR_ROVFIF,		4
	.EQU	SPI1_STR_TNE,		2
	.EQU	SPI1_STR_RNE,		1
	.EQU	SPI1_STR_SPIBUSY,		0
//  register-------------------------------------
	.EQU	SPI1_PPX,		0x40000798
//  0x4000 0798  SPI1_PPX   Bits-------------------------------------
	.EQU	SPI1_PPX_TESTEN_CSDELAY,		31
	.EQU	SPI1_PPX_CSDELAYEND,		30
	.EQU	SPI1_PPX_SPIPPX15,		15
	.EQU	SPI1_PPX_SPIPPX14,		14
	.EQU	SPI1_PPX_SPIPPX13,		13
	.EQU	SPI1_PPX_SPIPPX12,		12
	.EQU	SPI1_PPX_SPIPPX11,		11
	.EQU	SPI1_PPX_SPIPPX10,		10
	.EQU	SPI1_PPX_SPIPPX9,		9
	.EQU	SPI1_PPX_SPIPPX8,		8
	.EQU	SPI1_PPX_SPIPPX7,		7
	.EQU	SPI1_PPX_SPIPPX6,		6
	.EQU	SPI1_PPX_SPIPPX5,		5
	.EQU	SPI1_PPX_SPIPPX4,		4
	.EQU	SPI1_PPX_SPIPPX3,		3
	.EQU	SPI1_PPX_SPIPPX2,		2
	.EQU	SPI1_PPX_SPIPPX1,		1
	.EQU	SPI1_PPX_SPIPPX0,		0
//  register-------------------------------------
	.EQU	I2C0_CTLR,		0x40000800
//  0x4000 0800  I2C0_CTLR   Bits-------------------------------------
	.EQU	I2C0_CTLR_ADRL,		31
	.EQU	I2C0_CTLR_MENA,		22
	.EQU	I2C0_CTLR_ENASCL,		21
	.EQU	I2C0_CTLR_MTHALL,		20
	.EQU	I2C0_CTLR_I2CCKDIV1,		19
	.EQU	I2C0_CTLR_I2CCKDIV0,		18
	.EQU	I2C0_CTLR_I2CCKS1,		17
	.EQU	I2C0_CTLR_I2CCKS0,		16
	.EQU	I2C0_CTLR_GCEN,		14
	.EQU	I2C0_CTLR_ACKDT,		13
	.EQU	I2C0_CTLR_ACKEN,		12
	.EQU	I2C0_CTLR_SCLNOSTR,		11
	.EQU	I2C0_CTLR_PEN,		10
	.EQU	I2C0_CTLR_SEN,		8
	.EQU	I2C0_CTLR_DHCNT3,		7
	.EQU	I2C0_CTLR_DHCNT2,		6
	.EQU	I2C0_CTLR_DHCNT1,		5
	.EQU	I2C0_CTLR_DHCNT0,		4
	.EQU	I2C0_CTLR_BADR10,		1
	.EQU	I2C0_CTLR_I2CEN,		0
//  register-------------------------------------
	.EQU	I2C0_SR,		0x40000804
//  0x4000 0804  I2C0_SR   Bits-------------------------------------
	.EQU	I2C0_SR_BUSY,		20
	.EQU	I2C0_SR_OVERIF,		19
	.EQU	I2C0_SR_BERRIF,		18
	.EQU	I2C0_SR_BLTF,		15
	.EQU	I2C0_SR_TXBE,		13
	.EQU	I2C0_SR_RCBF,		12
	.EQU	I2C0_SR_ISIF,		11
	.EQU	I2C0_SR_RNW,		7
	.EQU	I2C0_SR_ARBLIF,		6
	.EQU	I2C0_SR_AFIF,		5
	.EQU	I2C0_SR_DATA,		4
	.EQU	I2C0_SR_ADD10,		3
	.EQU	I2C0_SR_ADDR,		2
	.EQU	I2C0_SR_PIF,		1
	.EQU	I2C0_SR_SIF,		0
//  register-------------------------------------
	.EQU	I2C0_BUFR,		0x40000808
//  0x4000 0808  I2C0_BUFR   Bits-------------------------------------
	.EQU	I2C0_BUFR_I2CBUF9,		9
	.EQU	I2C0_BUFR_I2CBUF8,		8
	.EQU	I2C0_BUFR_I2CBUF7,		7
	.EQU	I2C0_BUFR_I2CBUF6,		6
	.EQU	I2C0_BUFR_I2CBUF5,		5
	.EQU	I2C0_BUFR_I2CBUF4,		4
	.EQU	I2C0_BUFR_I2CBUF3,		3
	.EQU	I2C0_BUFR_I2CBUF2,		2
	.EQU	I2C0_BUFR_I2CBUF1,		1
	.EQU	I2C0_BUFR_I2CBUF0,		0
//  register-------------------------------------
	.EQU	I2C0_ADDR0,	0x4000080C
//  0x4000 080C  I2C0_ADDR0   Bits-------------------------------------
	.EQU	I2C0_ADDR0_I2CMSK9,		25
	.EQU	I2C0_ADDR0_I2CMSK8,		24
	.EQU	I2C0_ADDR0_I2CMSK7,		23
	.EQU	I2C0_ADDR0_I2CMSK6,		22
	.EQU	I2C0_ADDR0_I2CMSK5,		21
	.EQU	I2C0_ADDR0_I2CMSK4,		20
	.EQU	I2C0_ADDR0_I2CMSK3,		19
	.EQU	I2C0_ADDR0_I2CMSK2,		18
	.EQU	I2C0_ADDR0_I2CMSK1,		17
	.EQU	I2C0_ADDR0_I2CMSK0,		16
	.EQU	I2C0_ADDR0_I2CADD9,		9
	.EQU	I2C0_ADDR0_I2CADD8,		8
	.EQU	I2C0_ADDR0_I2CADD7,		7
	.EQU	I2C0_ADDR0_I2CADD6,		6
	.EQU	I2C0_ADDR0_I2CADD5,		5
	.EQU	I2C0_ADDR0_I2CADD4,		4
	.EQU	I2C0_ADDR0_I2CADD3,		3
	.EQU	I2C0_ADDR0_I2CADD2,		2
	.EQU	I2C0_ADDR0_I2CADD1,		1
	.EQU	I2C0_ADDR0_I2CADD0,		0
//  register-------------------------------------
	.EQU	I2C0_BRGR,		0x40000810
//  0x4000 0810  I2C0_BRGR   Bits-------------------------------------
	.EQU	I2C0_BRGR_I2CBRGL15,		31
	.EQU	I2C0_BRGR_I2CBRGL14,		30
	.EQU	I2C0_BRGR_I2CBRGL13,		29
	.EQU	I2C0_BRGR_I2CBRGL12,		28
	.EQU	I2C0_BRGR_I2CBRGL11,		27
	.EQU	I2C0_BRGR_I2CBRGL10,		26
	.EQU	I2C0_BRGR_I2CBRGL9,		25
	.EQU	I2C0_BRGR_I2CBRGL8,		24
	.EQU	I2C0_BRGR_I2CBRGL7,		23
	.EQU	I2C0_BRGR_I2CBRGL6,		22
	.EQU	I2C0_BRGR_I2CBRGL5,		21
	.EQU	I2C0_BRGR_I2CBRGL4,		20
	.EQU	I2C0_BRGR_I2CBRGL3,		19
	.EQU	I2C0_BRGR_I2CBRGL2,		18
	.EQU	I2C0_BRGR_I2CBRGL1,		17
	.EQU	I2C0_BRGR_I2CBRGL0,		16
	.EQU	I2C0_BRGR_I2CBRGH15,		15
	.EQU	I2C0_BRGR_I2CBRGH14,		14
	.EQU	I2C0_BRGR_I2CBRGH13,		13
	.EQU	I2C0_BRGR_I2CBRGH12,		12
	.EQU	I2C0_BRGR_I2CBRGH11,		11
	.EQU	I2C0_BRGR_I2CBRGH10,		10
	.EQU	I2C0_BRGR_I2CBRGH9,		9
	.EQU	I2C0_BRGR_I2CBRGH8,		8
	.EQU	I2C0_BRGR_I2CBRGH7,		7
	.EQU	I2C0_BRGR_I2CBRGH6,		6
	.EQU	I2C0_BRGR_I2CBRGH5,		5
	.EQU	I2C0_BRGR_I2CBRGH4,		4
	.EQU	I2C0_BRGR_I2CBRGH3,		3
	.EQU	I2C0_BRGR_I2CBRGH2,		2
	.EQU	I2C0_BRGR_I2CBRGH1,		1
	.EQU	I2C0_BRGR_I2CBRGH0,		0
//  register-------------------------------------
	.EQU	I2C0_ADDR1,	0x40000814
//  0x4000 0814  I2C0_ADDR1   Bits-------------------------------------
	.EQU	I2C0_ADDR1_I2CMSK9,		25
	.EQU	I2C0_ADDR1_I2CMSK8,		24
	.EQU	I2C0_ADDR1_I2CMSK7,		23
	.EQU	I2C0_ADDR1_I2CMSK6,		22
	.EQU	I2C0_ADDR1_I2CMSK5,		21
	.EQU	I2C0_ADDR1_I2CMSK4,		20
	.EQU	I2C0_ADDR1_I2CMSK3,		19
	.EQU	I2C0_ADDR1_I2CMSK2,		18
	.EQU	I2C0_ADDR1_I2CMSK1,		17
	.EQU	I2C0_ADDR1_I2CMSK0,		16
	.EQU	I2C0_ADDR1_I2CADD9,		9
	.EQU	I2C0_ADDR1_I2CADD8,		8
	.EQU	I2C0_ADDR1_I2CADD7,		7
	.EQU	I2C0_ADDR1_I2CADD6,		6
	.EQU	I2C0_ADDR1_I2CADD5,		5
	.EQU	I2C0_ADDR1_I2CADD4,		4
	.EQU	I2C0_ADDR1_I2CADD3,		3
	.EQU	I2C0_ADDR1_I2CADD2,		2
	.EQU	I2C0_ADDR1_I2CADD1,		1
	.EQU	I2C0_ADDR1_I2CADD0,		0
//  register-------------------------------------
	.EQU	I2C0_ADDR2,	0x40000818
//  0x4000 0818  I2C0_ADDR2   Bits-------------------------------------
	.EQU	I2C0_ADDR2_I2CMSK9,		25
	.EQU	I2C0_ADDR2_I2CMSK8,		24
	.EQU	I2C0_ADDR2_I2CMSK7,		23
	.EQU	I2C0_ADDR2_I2CMSK6,		22
	.EQU	I2C0_ADDR2_I2CMSK5,		21
	.EQU	I2C0_ADDR2_I2CMSK4,		20
	.EQU	I2C0_ADDR2_I2CMSK3,		19
	.EQU	I2C0_ADDR2_I2CMSK2,		18
	.EQU	I2C0_ADDR2_I2CMSK1,		17
	.EQU	I2C0_ADDR2_I2CMSK0,		16
	.EQU	I2C0_ADDR2_I2CADD9,		9
	.EQU	I2C0_ADDR2_I2CADD8,		8
	.EQU	I2C0_ADDR2_I2CADD7,		7
	.EQU	I2C0_ADDR2_I2CADD6,		6
	.EQU	I2C0_ADDR2_I2CADD5,		5
	.EQU	I2C0_ADDR2_I2CADD4,		4
	.EQU	I2C0_ADDR2_I2CADD3,		3
	.EQU	I2C0_ADDR2_I2CADD2,		2
	.EQU	I2C0_ADDR2_I2CADD1,		1
	.EQU	I2C0_ADDR2_I2CADD0,		0
//  register-------------------------------------
	.EQU	I2C0_ADDR3,	0x4000081C
//  0x4000 081C  I2C0_ADDR3   Bits-------------------------------------
	.EQU	I2C0_ADDR3_I2CMSK9,		25
	.EQU	I2C0_ADDR3_I2CMSK8,		24
	.EQU	I2C0_ADDR3_I2CMSK7,		23
	.EQU	I2C0_ADDR3_I2CMSK6,		22
	.EQU	I2C0_ADDR3_I2CMSK5,		21
	.EQU	I2C0_ADDR3_I2CMSK4,		20
	.EQU	I2C0_ADDR3_I2CMSK3,		19
	.EQU	I2C0_ADDR3_I2CMSK2,		18
	.EQU	I2C0_ADDR3_I2CMSK1,		17
	.EQU	I2C0_ADDR3_I2CMSK0,		16
	.EQU	I2C0_ADDR3_I2CADD9,		9
	.EQU	I2C0_ADDR3_I2CADD8,		8
	.EQU	I2C0_ADDR3_I2CADD7,		7
	.EQU	I2C0_ADDR3_I2CADD6,		6
	.EQU	I2C0_ADDR3_I2CADD5,		5
	.EQU	I2C0_ADDR3_I2CADD4,		4
	.EQU	I2C0_ADDR3_I2CADD3,		3
	.EQU	I2C0_ADDR3_I2CADD2,		2
	.EQU	I2C0_ADDR3_I2CADD1,		1
	.EQU	I2C0_ADDR3_I2CADD0,		0
//  register-------------------------------------
	.EQU	I2C0_IER,		0x40000820
//  0x4000 0820  I2C0_IER   Bits-------------------------------------
	.EQU	I2C0_IER_BUSLOW11,		31
	.EQU	I2C0_IER_BUSLOW10,		30
	.EQU	I2C0_IER_BUSLOW9,		29
	.EQU	I2C0_IER_BUSLOW8,		28
	.EQU	I2C0_IER_BUSLOW7,		27
	.EQU	I2C0_IER_BUSLOW6,		26
	.EQU	I2C0_IER_BUSLOW5,		25
	.EQU	I2C0_IER_BUSLOW4,		24
	.EQU	I2C0_IER_BUSLOW3,		23
	.EQU	I2C0_IER_BUSLOW2,		22
	.EQU	I2C0_IER_BUSLOW1,		21
	.EQU	I2C0_IER_BUSLOW0,		20
	.EQU	I2C0_IER_OVERIE,		19
	.EQU	I2C0_IER_BERRIE,		18
	.EQU	I2C0_IER_BLTIE,		15
	.EQU	I2C0_IER_SDATEN,		14
	.EQU	I2C0_IER_ISIE,		11
	.EQU	I2C0_IER_ARBLIE,		6
	.EQU	I2C0_IER_AFIE,		5
	.EQU	I2C0_IER_PIE,		1
	.EQU	I2C0_IER_SIE,		0
//  register-------------------------------------
	.EQU	I2C1_CTLR,		0x40000880
//  0x4000 0880  I2C1_CTLR   Bits-------------------------------------
	.EQU	I2C1_CTLR_ADRL,		31
	.EQU	I2C1_CTLR_MENA,		22
	.EQU	I2C1_CTLR_ENASCL,		21
	.EQU	I2C1_CTLR_MTHALL,		20
	.EQU	I2C1_CTLR_I2CCKDIV1,		19
	.EQU	I2C1_CTLR_I2CCKDIV0,		18
	.EQU	I2C1_CTLR_I2CCKS1,		17
	.EQU	I2C1_CTLR_I2CCKS0,		16
	.EQU	I2C1_CTLR_GCEN,		14
	.EQU	I2C1_CTLR_ACKDT,		13
	.EQU	I2C1_CTLR_ACKEN,		12
	.EQU	I2C1_CTLR_SCLNOSTR,		11
	.EQU	I2C1_CTLR_PEN,		10
	.EQU	I2C1_CTLR_SEN,		8
	.EQU	I2C1_CTLR_DHCNT3,		7
	.EQU	I2C1_CTLR_DHCNT2,		6
	.EQU	I2C1_CTLR_DHCNT1,		5
	.EQU	I2C1_CTLR_DHCNT0,		4
	.EQU	I2C1_CTLR_BADR10,		1
	.EQU	I2C1_CTLR_I2CEN,		0
//  register-------------------------------------
	.EQU	I2C1_SR,		0x40000884
//  0x4000 0884  I2C1_SR   Bits-------------------------------------
	.EQU	I2C1_SR_BUSY,		20
	.EQU	I2C1_SR_ITXDF,		17
	.EQU	I2C1_SR_IRCDF,		16
	.EQU	I2C1_SR_BLTF,		15
	.EQU	I2C1_SR_TXBE,		13
	.EQU	I2C1_SR_RCBF,		12
	.EQU	I2C1_SR_ISIF,		11
	.EQU	I2C1_SR_RNW,		7
	.EQU	I2C1_SR_ARBLIF,		6
	.EQU	I2C1_SR_AFIF,		5
	.EQU	I2C1_SR_DATA,		4
	.EQU	I2C1_SR_ADD10,		3
	.EQU	I2C1_SR_ADDR,		2
	.EQU	I2C1_SR_PIF,		1
	.EQU	I2C1_SR_SIF,		0
//  register-------------------------------------
	.EQU	I2C1_BUFR,		0x40000888
//  0x4000 0888  I2C1_BUFR   Bits-------------------------------------
	.EQU	I2C1_BUFR_I2CBUF9,		9
	.EQU	I2C1_BUFR_I2CBUF8,		8
	.EQU	I2C1_BUFR_I2CBUF7,		7
	.EQU	I2C1_BUFR_I2CBUF6,		6
	.EQU	I2C1_BUFR_I2CBUF5,		5
	.EQU	I2C1_BUFR_I2CBUF4,		4
	.EQU	I2C1_BUFR_I2CBUF3,		3
	.EQU	I2C1_BUFR_I2CBUF2,		2
	.EQU	I2C1_BUFR_I2CBUF1,		1
	.EQU	I2C1_BUFR_I2CBUF0,		0
//  register-------------------------------------
	.EQU	I2C1_ADDR0,	0x4000088C
//  0x4000 088C  I2C1_ADDR0   Bits-------------------------------------
	.EQU	I2C1_ADDR0_I2CMSK9,		25
	.EQU	I2C1_ADDR0_I2CMSK8,		24
	.EQU	I2C1_ADDR0_I2CMSK7,		23
	.EQU	I2C1_ADDR0_I2CMSK6,		22
	.EQU	I2C1_ADDR0_I2CMSK5,		21
	.EQU	I2C1_ADDR0_I2CMSK4,		20
	.EQU	I2C1_ADDR0_I2CMSK3,		19
	.EQU	I2C1_ADDR0_I2CMSK2,		18
	.EQU	I2C1_ADDR0_I2CMSK1,		17
	.EQU	I2C1_ADDR0_I2CMSK0,		16
	.EQU	I2C1_ADDR0_I2CADD9,		9
	.EQU	I2C1_ADDR0_I2CADD8,		8
	.EQU	I2C1_ADDR0_I2CADD7,		7
	.EQU	I2C1_ADDR0_I2CADD6,		6
	.EQU	I2C1_ADDR0_I2CADD5,		5
	.EQU	I2C1_ADDR0_I2CADD4,		4
	.EQU	I2C1_ADDR0_I2CADD3,		3
	.EQU	I2C1_ADDR0_I2CADD2,		2
	.EQU	I2C1_ADDR0_I2CADD1,		1
	.EQU	I2C1_ADDR0_I2CADD0,		0
//  register-------------------------------------
	.EQU	I2C1_BRGR,		0x40000890
//  0x4000 0890  I2C1_BRGR   Bits-------------------------------------
	.EQU	I2C1_BRGR_I2CBRGL15,		31
	.EQU	I2C1_BRGR_I2CBRGL14,		30
	.EQU	I2C1_BRGR_I2CBRGL13,		29
	.EQU	I2C1_BRGR_I2CBRGL12,		28
	.EQU	I2C1_BRGR_I2CBRGL11,		27
	.EQU	I2C1_BRGR_I2CBRGL10,		26
	.EQU	I2C1_BRGR_I2CBRGL9,		25
	.EQU	I2C1_BRGR_I2CBRGL8,		24
	.EQU	I2C1_BRGR_I2CBRGL7,		23
	.EQU	I2C1_BRGR_I2CBRGL6,		22
	.EQU	I2C1_BRGR_I2CBRGL5,		21
	.EQU	I2C1_BRGR_I2CBRGL4,		20
	.EQU	I2C1_BRGR_I2CBRGL3,		19
	.EQU	I2C1_BRGR_I2CBRGL2,		18
	.EQU	I2C1_BRGR_I2CBRGL1,		17
	.EQU	I2C1_BRGR_I2CBRGL0,		16
	.EQU	I2C1_BRGR_I2CBRGH15,		15
	.EQU	I2C1_BRGR_I2CBRGH14,		14
	.EQU	I2C1_BRGR_I2CBRGH13,		13
	.EQU	I2C1_BRGR_I2CBRGH12,		12
	.EQU	I2C1_BRGR_I2CBRGH11,		11
	.EQU	I2C1_BRGR_I2CBRGH10,		10
	.EQU	I2C1_BRGR_I2CBRGH9,		9
	.EQU	I2C1_BRGR_I2CBRGH8,		8
	.EQU	I2C1_BRGR_I2CBRGH7,		7
	.EQU	I2C1_BRGR_I2CBRGH6,		6
	.EQU	I2C1_BRGR_I2CBRGH5,		5
	.EQU	I2C1_BRGR_I2CBRGH4,		4
	.EQU	I2C1_BRGR_I2CBRGH3,		3
	.EQU	I2C1_BRGR_I2CBRGH2,		2
	.EQU	I2C1_BRGR_I2CBRGH1,		1
	.EQU	I2C1_BRGR_I2CBRGH0,		0
//  register-------------------------------------
	.EQU	I2C1_ADDR1,	0x40000894
//  0x4000 0894  I2C1_ADDR1   Bits-------------------------------------
	.EQU	I2C1_ADDR1_I2CMSK9,		25
	.EQU	I2C1_ADDR1_I2CMSK8,		24
	.EQU	I2C1_ADDR1_I2CMSK7,		23
	.EQU	I2C1_ADDR1_I2CMSK6,		22
	.EQU	I2C1_ADDR1_I2CMSK5,		21
	.EQU	I2C1_ADDR1_I2CMSK4,		20
	.EQU	I2C1_ADDR1_I2CMSK3,		19
	.EQU	I2C1_ADDR1_I2CMSK2,		18
	.EQU	I2C1_ADDR1_I2CMSK1,		17
	.EQU	I2C1_ADDR1_I2CMSK0,		16
	.EQU	I2C1_ADDR1_I2CADD9,		9
	.EQU	I2C1_ADDR1_I2CADD8,		8
	.EQU	I2C1_ADDR1_I2CADD7,		7
	.EQU	I2C1_ADDR1_I2CADD6,		6
	.EQU	I2C1_ADDR1_I2CADD5,		5
	.EQU	I2C1_ADDR1_I2CADD4,		4
	.EQU	I2C1_ADDR1_I2CADD3,		3
	.EQU	I2C1_ADDR1_I2CADD2,		2
	.EQU	I2C1_ADDR1_I2CADD1,		1
	.EQU	I2C1_ADDR1_I2CADD0,		0
//  register-------------------------------------
	.EQU	I2C1_ADDR2,	0x40000898
//  0x4000 0898  I2C1_ADDR2   Bits-------------------------------------
	.EQU	I2C1_ADDR2_I2CMSK9,		25
	.EQU	I2C1_ADDR2_I2CMSK8,		24
	.EQU	I2C1_ADDR2_I2CMSK7,		23
	.EQU	I2C1_ADDR2_I2CMSK6,		22
	.EQU	I2C1_ADDR2_I2CMSK5,		21
	.EQU	I2C1_ADDR2_I2CMSK4,		20
	.EQU	I2C1_ADDR2_I2CMSK3,		19
	.EQU	I2C1_ADDR2_I2CMSK2,		18
	.EQU	I2C1_ADDR2_I2CMSK1,		17
	.EQU	I2C1_ADDR2_I2CMSK0,		16
	.EQU	I2C1_ADDR2_I2CADD9,		9
	.EQU	I2C1_ADDR2_I2CADD8,		8
	.EQU	I2C1_ADDR2_I2CADD7,		7
	.EQU	I2C1_ADDR2_I2CADD6,		6
	.EQU	I2C1_ADDR2_I2CADD5,		5
	.EQU	I2C1_ADDR2_I2CADD4,		4
	.EQU	I2C1_ADDR2_I2CADD3,		3
	.EQU	I2C1_ADDR2_I2CADD2,		2
	.EQU	I2C1_ADDR2_I2CADD1,		1
	.EQU	I2C1_ADDR2_I2CADD0,		0
//  register-------------------------------------
	.EQU	I2C1_ADDR3,	0x4000089C
//  0x4000 089C  I2C1_ADDR3   Bits-------------------------------------
	.EQU	I2C1_ADDR3_I2CMSK9,		25
	.EQU	I2C1_ADDR3_I2CMSK8,		24
	.EQU	I2C1_ADDR3_I2CMSK7,		23
	.EQU	I2C1_ADDR3_I2CMSK6,		22
	.EQU	I2C1_ADDR3_I2CMSK5,		21
	.EQU	I2C1_ADDR3_I2CMSK4,		20
	.EQU	I2C1_ADDR3_I2CMSK3,		19
	.EQU	I2C1_ADDR3_I2CMSK2,		18
	.EQU	I2C1_ADDR3_I2CMSK1,		17
	.EQU	I2C1_ADDR3_I2CMSK0,		16
	.EQU	I2C1_ADDR3_I2CADD9,		9
	.EQU	I2C1_ADDR3_I2CADD8,		8
	.EQU	I2C1_ADDR3_I2CADD7,		7
	.EQU	I2C1_ADDR3_I2CADD6,		6
	.EQU	I2C1_ADDR3_I2CADD5,		5
	.EQU	I2C1_ADDR3_I2CADD4,		4
	.EQU	I2C1_ADDR3_I2CADD3,		3
	.EQU	I2C1_ADDR3_I2CADD2,		2
	.EQU	I2C1_ADDR3_I2CADD1,		1
	.EQU	I2C1_ADDR3_I2CADD0,		0
//  register-------------------------------------
	.EQU	I2C1_IER,		0x400008A0
//  0x4000 08A0  I2C1_IER   Bits-------------------------------------
	.EQU	I2C1_IER_BUSLOW11,		31
	.EQU	I2C1_IER_BUSLOW10,		30
	.EQU	I2C1_IER_BUSLOW9,		29
	.EQU	I2C1_IER_BUSLOW8,		28
	.EQU	I2C1_IER_BUSLOW7,		27
	.EQU	I2C1_IER_BUSLOW6,		26
	.EQU	I2C1_IER_BUSLOW5,		25
	.EQU	I2C1_IER_BUSLOW4,		24
	.EQU	I2C1_IER_BUSLOW3,		23
	.EQU	I2C1_IER_BUSLOW2,		22
	.EQU	I2C1_IER_BUSLOW1,		21
	.EQU	I2C1_IER_BUSLOW0,		20
	.EQU	I2C1_IER_OVERIE,		19
	.EQU	I2C1_IER_BERRIE,		18
	.EQU	I2C1_IER_BLTIE,		15
	.EQU	I2C1_IER_SDATEN,		14
	.EQU	I2C1_IER_ISIE,		11
	.EQU	I2C1_IER_ARBLIE,		6
	.EQU	I2C1_IER_AFIE,		5
	.EQU	I2C1_IER_PIE,		1
	.EQU	I2C1_IER_SIE,		0
//  register-------------------------------------
	.EQU	IWDT_CTL,		0x40000E00
//  0x4000 0E00  IWDT_CTL   Bits-------------------------------------
	.EQU	IWDT_CTL_IWDTEN,		31
	.EQU	IWDT_CTL_CLKS,		29
	.EQU	IWDT_CTL_IWDTOVF11,		15
	.EQU	IWDT_CTL_IWDTOVF10,		14
	.EQU	IWDT_CTL_IWDTOVF9,		13
	.EQU	IWDT_CTL_IWDTOVF8,		12
	.EQU	IWDT_CTL_IWDTOVF7,		11
	.EQU	IWDT_CTL_IWDTOVF6,		10
	.EQU	IWDT_CTL_IWDTOVF5,		9
	.EQU	IWDT_CTL_IWDTOVF4,		8
	.EQU	IWDT_CTL_IWDTOVF3,		7
	.EQU	IWDT_CTL_IWDTOVF2,		6
	.EQU	IWDT_CTL_IWDTOVF1,		5
	.EQU	IWDT_CTL_IWDTOVF0,		4
	.EQU	IWDT_CTL_IWDTPS3,		3
	.EQU	IWDT_CTL_IWDTPS2,		2
	.EQU	IWDT_CTL_IWDTPS1,		1
	.EQU	IWDT_CTL_IWDTPS0,		0
//  register-------------------------------------
	.EQU	IWDT_FD,		0x40000E04
//  0x4000 0E04  IWDT_FD   Bits-------------------------------------
	.EQU	IWDT_FD_IWDTFD31,		31
	.EQU	IWDT_FD_IWDTFD30,		30
	.EQU	IWDT_FD_IWDTFD29,		29
	.EQU	IWDT_FD_IWDTFD28,		28
	.EQU	IWDT_FD_IWDTFD27,		27
	.EQU	IWDT_FD_IWDTFD26,		26
	.EQU	IWDT_FD_IWDTFD25,		25
	.EQU	IWDT_FD_IWDTFD24,		24
	.EQU	IWDT_FD_IWDTFD23,		23
	.EQU	IWDT_FD_IWDTFD22,		22
	.EQU	IWDT_FD_IWDTFD21,		21
	.EQU	IWDT_FD_IWDTFD20,		20
	.EQU	IWDT_FD_IWDTFD19,		19
	.EQU	IWDT_FD_IWDTFD18,		18
	.EQU	IWDT_FD_IWDTFD17,		17
	.EQU	IWDT_FD_IWDTFD16,		16
	.EQU	IWDT_FD_IWDTFD15,		15
	.EQU	IWDT_FD_IWDTFD14,		14
	.EQU	IWDT_FD_IWDTFD13,		13
	.EQU	IWDT_FD_IWDTFD12,		12
	.EQU	IWDT_FD_IWDTFD11,		11
	.EQU	IWDT_FD_IWDTFD10,		10
	.EQU	IWDT_FD_IWDTFD9,		9
	.EQU	IWDT_FD_IWDTFD8,		8
	.EQU	IWDT_FD_IWDTFD7,		7
	.EQU	IWDT_FD_IWDTFD6,		6
	.EQU	IWDT_FD_IWDTFD5,		5
	.EQU	IWDT_FD_IWDTFD4,		4
	.EQU	IWDT_FD_IWDTFD3,		3
	.EQU	IWDT_FD_IWDTFD2,		2
	.EQU	IWDT_FD_IWDTFD1,		1
	.EQU	IWDT_FD_IWDTFD0,		0
//  register-------------------------------------
	.EQU	WWDT_CTL,		0x40000E80
//  0x4000 0E80  WWDT_CTL   Bits-------------------------------------
	.EQU	WWDT_CTL_WWDTIC,		15
	.EQU	WWDT_CTL_WW6,		14
	.EQU	WWDT_CTL_WW5,		13
	.EQU	WWDT_CTL_WW4,		12
	.EQU	WWDT_CTL_WW3,		11
	.EQU	WWDT_CTL_WW2,		10
	.EQU	WWDT_CTL_WW1,		9
	.EQU	WWDT_CTL_WW0,		8
	.EQU	WWDT_CTL_WPS4,		7
	.EQU	WWDT_CTL_WPS3,		6
	.EQU	WWDT_CTL_WPS2,		5
	.EQU	WWDT_CTL_WPS1,		4
	.EQU	WWDT_CTL_WPS0,		3
	.EQU	WWDT_CTL_WWDTIF,		2
	.EQU	WWDT_CTL_WWDTIE,		1
	.EQU	WWDT_CTL_WWDTEN,		0
//  register-------------------------------------
	.EQU	WWDT_CNT,		0x40000E84
//  0x4000 0E84  WWDT_CNT   Bits-------------------------------------
	.EQU	WWDT_CNT_WT6,		6
	.EQU	WWDT_CNT_WT5,		5
	.EQU	WWDT_CNT_WT4,		4
	.EQU	WWDT_CNT_WT3,		3
	.EQU	WWDT_CNT_WT2,		2
	.EQU	WWDT_CNT_WT1,		1
	.EQU	WWDT_CNT_WT0,		0
//  register-------------------------------------
	.EQU	WWDT_CTL1,		0x40000E88
//  0x4000 0E88  WWDT_CTL1   Bits-------------------------------------
	.EQU	WWDT_CTL1_CLKS1,		1
	.EQU	WWDT_CTL1_CLKS0,		0
//  register-------------------------------------
	.EQU	EWDT_CTL,		0x40000F00
//  0x4000 0F00  EWDT_CTL   Bits-------------------------------------
	.EQU	EWDT_CTL_OUTSEL,		24
	.EQU	EWDT_CTL_EWDTRSTIF,		23
	.EQU	EWDT_CTL_EWDTRSTIC,		22
	.EQU	EWDT_CTL_EWDTRSTIE,		21
	.EQU	EWDT_CTL_CLK1,		19
	.EQU	EWDT_CTL_CLK0,		18
	.EQU	EWDT_CTL_EWDTINPOL,		17
	.EQU	EWDT_CTL_EWDTINEN,		16
	.EQU	EWDT_CTL_WT40IC,		15
	.EQU	EWDT_CTL_WW6,		14
	.EQU	EWDT_CTL_WW5,		13
	.EQU	EWDT_CTL_WW4,		12
	.EQU	EWDT_CTL_WW3,		11
	.EQU	EWDT_CTL_WW2,		10
	.EQU	EWDT_CTL_WW1,		9
	.EQU	EWDT_CTL_WW0,		8
	.EQU	EWDT_CTL_WPS4,		7
	.EQU	EWDT_CTL_WPS3,		6
	.EQU	EWDT_CTL_WPS2,		5
	.EQU	EWDT_CTL_WPS1,		4
	.EQU	EWDT_CTL_WPS0,		3
	.EQU	EWDT_CTL_WT40IF,		2
	.EQU	EWDT_CTL_WT40IE,		1
	.EQU	EWDT_CTL_EWDTEN,		0
//  register-------------------------------------
	.EQU	EWDT_CNT,		0x40000F04
//  0x4000 0F04  EWDT_CNT   Bits-------------------------------------
	.EQU	EWDT_CNT_WT6,		6
	.EQU	EWDT_CNT_WT5,		5
	.EQU	EWDT_CNT_WT4,		4
	.EQU	EWDT_CNT_WT3,		3
	.EQU	EWDT_CNT_WT2,		2
	.EQU	EWDT_CNT_WT1,		1
	.EQU	EWDT_CNT_WT0,		0
//  register-------------------------------------
	.EQU	RST_CTL0,		0x40000F80
//  0x4000 0F80  RST_CTL0   Bits-------------------------------------
	.EQU	RST_CTL0_GPIODRST,		3
	.EQU	RST_CTL0_GPIOCRST,		2
	.EQU	RST_CTL0_GPIOBRST,		1
	.EQU	RST_CTL0_GPIOARST,		0
//  register-------------------------------------
	.EQU	RST_CTL1,		0x40000F84
//  0x4000 0F84  RST_CTL1   Bits-------------------------------------
	.EQU	RST_CTL1_MPURST,		30
	.EQU	RST_CTL1_I2C1RST,		27
	.EQU	RST_CTL1_I2C0RST,		26
	.EQU	RST_CTL1_SPI1RST,		25
	.EQU	RST_CTL1_SPI0RST,		24
	.EQU	RST_CTL1_USART3RST,		22
	.EQU	RST_CTL1_USART2RST,		21
	.EQU	RST_CTL1_USART1RST,		20
	.EQU	RST_CTL1_USART0RST,		19
	.EQU	RST_CTL1_T0RST,		17
	.EQU	RST_CTL1_CMPRST,		16
	.EQU	RST_CTL1_DAC0RST,		14
	.EQU	RST_CTL1_ADC0RST,		11
	.EQU	RST_CTL1_T4RST,		5
	.EQU	RST_CTL1_T3RST,		4
	.EQU	RST_CTL1_T2RST,		3
	.EQU	RST_CTL1_T1RST,		2
//  register-------------------------------------
	.EQU	RST_CTL2,		0x40000F88
//  0x4000 0F88  RST_CTL2   Bits-------------------------------------
	.EQU	RST_CTL2_T5RST,		21
	.EQU	RST_CTL2_DMA0RST,		12
	.EQU	RST_CTL2_EPWM16RST,		11
	.EQU	RST_CTL2_EPWM13RST,		10
	.EQU	RST_CTL2_EPWM12RST,		9
	.EQU	RST_CTL2_EPWM11RST,		8
	.EQU	RST_CTL2_WWDTRST,		5
//  register-------------------------------------
	.EQU	RST_CTL3,		0x40000F8C
//  0x4000 0F8C  RST_CTL3   Bits-------------------------------------
	.EQU	RST_CTL3_CANFD6RST,		29
	.EQU	RST_CTL3_EWDTRST,		27
	.EQU	RST_CTL3_CRCRST,		13
	.EQU	RST_CTL3_CMURST,		12
//  register-------------------------------------
	.EQU	RST_CTL4,		0x40000F90
//  0x4000 0F90  RST_CTL4   Bits-------------------------------------
	.EQU	RST_CTL4_ECC0RST,		20
	.EQU	RST_CTL4_ECC1RST,		10
//  register-------------------------------------
	.EQU	PCLK_CTL0,		0x400012C0
//  0x4000 12C0  PCLK_CTL0   Bits-------------------------------------
	.EQU	PCLK_CTL0_GPIODCLKEN,		3
	.EQU	PCLK_CTL0_GPIOCCLKEN,		2
	.EQU	PCLK_CTL0_GPIOBCLKEN,		1
	.EQU	PCLK_CTL0_GPIOACLKEN,		0
//  register-------------------------------------
	.EQU	PCLK_CTL1,		0x400012C4
//  0x4000 12C4  PCLK_CTL1   Bits-------------------------------------
	.EQU	PCLK_CTL1_MPUCLKEN,		30
	.EQU	PCLK_CTL1_I2C1CLKEN,		27
	.EQU	PCLK_CTL1_I2C0CLKEN,		26
	.EQU	PCLK_CTL1_SPI1CLKEN,		25
	.EQU	PCLK_CTL1_SPI0CLKEN,		24
	.EQU	PCLK_CTL1_USART3CLKEN,		22
	.EQU	PCLK_CTL1_USART2CLKEN,		21
	.EQU	PCLK_CTL1_USART1CLKEN,		20
	.EQU	PCLK_CTL1_USART0CLKEN,		19
	.EQU	PCLK_CTL1_T0CLKEN,		17
	.EQU	PCLK_CTL1_CMPCLKEN,		16
	.EQU	PCLK_CTL1_DAC0CLKEN,		14
	.EQU	PCLK_CTL1_ADC0CLKEN,		11
	.EQU	PCLK_CTL1_T4CLKEN,		5
	.EQU	PCLK_CTL1_T3CLKEN,		4
	.EQU	PCLK_CTL1_T2CLKEN,		3
	.EQU	PCLK_CTL1_T1CLKEN,		2
//  register-------------------------------------
	.EQU	PCLK_CTL2,		0x400012C8
//  0x4000 12C8  PCLK_CTL2   Bits-------------------------------------
	.EQU	PCLK_CTL2_T5CLKEN,		21
	.EQU	PCLK_CTL2_DMA0CLKEN,		12
	.EQU	PCLK_CTL2_EPWM14CLKEN,		11
	.EQU	PCLK_CTL2_EPWM13CLKEN,		10
	.EQU	PCLK_CTL2_EPWM12CLKEN,		9
	.EQU	PCLK_CTL2_EPWM11CLKEN,		8
	.EQU	PCLK_CTL2_WWDTCLKEN,		5
//  register-------------------------------------
	.EQU	PCLK_CTL3,		0x400012CC
//  0x4000 12CC  PCLK_CTL3   Bits-------------------------------------
	.EQU	PCLK_CTL3_CANFD6CLKEN,		29
	.EQU	PCLK_CTL3_EWDTCLKEN,		27
	.EQU	PCLK_CTL3_CRCCLKEN,		13
	.EQU	PCLK_CTL3_CMUCLKEN,		12
//  register-------------------------------------
	.EQU	PCLK_CTL4,		0x400012D0
//  0x4000 12D0  PCLK_CTL4   Bits-------------------------------------
	.EQU	PCLK_CTL4_ECC0CLKEN,		20
	.EQU	PCLK_CTL4_ECC1CLKEN,		10
//  register-------------------------------------
	.EQU	BKP_CTL,		0x40000D00
//  0x4000 0D00  BKP_CTL   Bits-------------------------------------
	.EQU	BKP_CTL_BKPRST,		31
//  register-------------------------------------
	.EQU	BKP_DATA0,		0x40000D40
//  0x4000 0D40  BKP_DATA0   Bits-------------------------------------
	.EQU	BKP_DATA0_BKPDATA0_31,		31
	.EQU	BKP_DATA0_BKPDATA0_30,		30
	.EQU	BKP_DATA0_BKPDATA0_29,		29
	.EQU	BKP_DATA0_BKPDATA0_28,		28
	.EQU	BKP_DATA0_BKPDATA0_27,		27
	.EQU	BKP_DATA0_BKPDATA0_26,		26
	.EQU	BKP_DATA0_BKPDATA0_25,		25
	.EQU	BKP_DATA0_BKPDATA0_24,		24
	.EQU	BKP_DATA0_BKPDATA0_23,		23
	.EQU	BKP_DATA0_BKPDATA0_22,		22
	.EQU	BKP_DATA0_BKPDATA0_21,		21
	.EQU	BKP_DATA0_BKPDATA0_20,		20
	.EQU	BKP_DATA0_BKPDATA0_19,		19
	.EQU	BKP_DATA0_BKPDATA0_18,		18
	.EQU	BKP_DATA0_BKPDATA0_17,		17
	.EQU	BKP_DATA0_BKPDATA0_16,		16
	.EQU	BKP_DATA0_BKPDATA0_15,		15
	.EQU	BKP_DATA0_BKPDATA0_14,		14
	.EQU	BKP_DATA0_BKPDATA0_13,		13
	.EQU	BKP_DATA0_BKPDATA0_12,		12
	.EQU	BKP_DATA0_BKPDATA0_11,		11
	.EQU	BKP_DATA0_BKPDATA0_10,		10
	.EQU	BKP_DATA0_BKPDATA0_9,		9
	.EQU	BKP_DATA0_BKPDATA0_8,		8
	.EQU	BKP_DATA0_BKPDATA0_7,		7
	.EQU	BKP_DATA0_BKPDATA0_6,		6
	.EQU	BKP_DATA0_BKPDATA0_5,		5
	.EQU	BKP_DATA0_BKPDATA0_4,		4
	.EQU	BKP_DATA0_BKPDATA0_3,		3
	.EQU	BKP_DATA0_BKPDATA0_2,		2
	.EQU	BKP_DATA0_BKPDATA0_1,		1
	.EQU	BKP_DATA0_BKPDATA0_0,		0
//  register-------------------------------------
	.EQU	BKP_DATA1,		0x40000D44
//  0x4000 0D44  BKP_DATA1   Bits-------------------------------------
	.EQU	BKP_DATA1_BKPDATA1_31,		31
	.EQU	BKP_DATA1_BKPDATA1_30,		30
	.EQU	BKP_DATA1_BKPDATA1_29,		29
	.EQU	BKP_DATA1_BKPDATA1_28,		28
	.EQU	BKP_DATA1_BKPDATA1_27,		27
	.EQU	BKP_DATA1_BKPDATA1_26,		26
	.EQU	BKP_DATA1_BKPDATA1_25,		25
	.EQU	BKP_DATA1_BKPDATA1_24,		24
	.EQU	BKP_DATA1_BKPDATA1_23,		23
	.EQU	BKP_DATA1_BKPDATA1_22,		22
	.EQU	BKP_DATA1_BKPDATA1_21,		21
	.EQU	BKP_DATA1_BKPDATA1_20,		20
	.EQU	BKP_DATA1_BKPDATA1_19,		19
	.EQU	BKP_DATA1_BKPDATA1_18,		18
	.EQU	BKP_DATA1_BKPDATA1_17,		17
	.EQU	BKP_DATA1_BKPDATA1_16,		16
	.EQU	BKP_DATA1_BKPDATA1_15,		15
	.EQU	BKP_DATA1_BKPDATA1_14,		14
	.EQU	BKP_DATA1_BKPDATA1_13,		13
	.EQU	BKP_DATA1_BKPDATA1_12,		12
	.EQU	BKP_DATA1_BKPDATA1_11,		11
	.EQU	BKP_DATA1_BKPDATA1_10,		10
	.EQU	BKP_DATA1_BKPDATA1_9,		9
	.EQU	BKP_DATA1_BKPDATA1_8,		8
	.EQU	BKP_DATA1_BKPDATA1_7,		7
	.EQU	BKP_DATA1_BKPDATA1_6,		6
	.EQU	BKP_DATA1_BKPDATA1_5,		5
	.EQU	BKP_DATA1_BKPDATA1_4,		4
	.EQU	BKP_DATA1_BKPDATA1_3,		3
	.EQU	BKP_DATA1_BKPDATA1_2,		2
	.EQU	BKP_DATA1_BKPDATA1_1,		1
	.EQU	BKP_DATA1_BKPDATA1_0,		0
//  register-------------------------------------
	.EQU	BKP_DATA2,		0x40000D48
//  0x4000 0D48  BKP_DATA2   Bits-------------------------------------
	.EQU	BKP_DATA2_BKPDATA2_31,		31
	.EQU	BKP_DATA2_BKPDATA2_30,		30
	.EQU	BKP_DATA2_BKPDATA2_29,		29
	.EQU	BKP_DATA2_BKPDATA2_28,		28
	.EQU	BKP_DATA2_BKPDATA2_27,		27
	.EQU	BKP_DATA2_BKPDATA2_26,		26
	.EQU	BKP_DATA2_BKPDATA2_25,		25
	.EQU	BKP_DATA2_BKPDATA2_24,		24
	.EQU	BKP_DATA2_BKPDATA2_23,		23
	.EQU	BKP_DATA2_BKPDATA2_22,		22
	.EQU	BKP_DATA2_BKPDATA2_21,		21
	.EQU	BKP_DATA2_BKPDATA2_20,		20
	.EQU	BKP_DATA2_BKPDATA2_19,		19
	.EQU	BKP_DATA2_BKPDATA2_18,		18
	.EQU	BKP_DATA2_BKPDATA2_17,		17
	.EQU	BKP_DATA2_BKPDATA2_16,		16
	.EQU	BKP_DATA2_BKPDATA2_15,		15
	.EQU	BKP_DATA2_BKPDATA2_14,		14
	.EQU	BKP_DATA2_BKPDATA2_13,		13
	.EQU	BKP_DATA2_BKPDATA2_12,		12
	.EQU	BKP_DATA2_BKPDATA2_11,		11
	.EQU	BKP_DATA2_BKPDATA2_10,		10
	.EQU	BKP_DATA2_BKPDATA2_9,		9
	.EQU	BKP_DATA2_BKPDATA2_8,		8
	.EQU	BKP_DATA2_BKPDATA2_7,		7
	.EQU	BKP_DATA2_BKPDATA2_6,		6
	.EQU	BKP_DATA2_BKPDATA2_5,		5
	.EQU	BKP_DATA2_BKPDATA2_4,		4
	.EQU	BKP_DATA2_BKPDATA2_3,		3
	.EQU	BKP_DATA2_BKPDATA2_2,		2
	.EQU	BKP_DATA2_BKPDATA2_1,		1
	.EQU	BKP_DATA2_BKPDATA2_0,		0
//  register-------------------------------------
	.EQU	BKP_DATA3,		0x40000D4C
//  0x4000 0D4C  BKP_DATA3   Bits-------------------------------------
	.EQU	BKP_DATA3_BKPDATA3_31,		31
	.EQU	BKP_DATA3_BKPDATA3_30,		30
	.EQU	BKP_DATA3_BKPDATA3_29,		29
	.EQU	BKP_DATA3_BKPDATA3_28,		28
	.EQU	BKP_DATA3_BKPDATA3_27,		27
	.EQU	BKP_DATA3_BKPDATA3_26,		26
	.EQU	BKP_DATA3_BKPDATA3_25,		25
	.EQU	BKP_DATA3_BKPDATA3_24,		24
	.EQU	BKP_DATA3_BKPDATA3_23,		23
	.EQU	BKP_DATA3_BKPDATA3_22,		22
	.EQU	BKP_DATA3_BKPDATA3_21,		21
	.EQU	BKP_DATA3_BKPDATA3_20,		20
	.EQU	BKP_DATA3_BKPDATA3_19,		19
	.EQU	BKP_DATA3_BKPDATA3_18,		18
	.EQU	BKP_DATA3_BKPDATA3_17,		17
	.EQU	BKP_DATA3_BKPDATA3_16,		16
	.EQU	BKP_DATA3_BKPDATA3_15,		15
	.EQU	BKP_DATA3_BKPDATA3_14,		14
	.EQU	BKP_DATA3_BKPDATA3_13,		13
	.EQU	BKP_DATA3_BKPDATA3_12,		12
	.EQU	BKP_DATA3_BKPDATA3_11,		11
	.EQU	BKP_DATA3_BKPDATA3_10,		10
	.EQU	BKP_DATA3_BKPDATA3_9,		9
	.EQU	BKP_DATA3_BKPDATA3_8,		8
	.EQU	BKP_DATA3_BKPDATA3_7,		7
	.EQU	BKP_DATA3_BKPDATA3_6,		6
	.EQU	BKP_DATA3_BKPDATA3_5,		5
	.EQU	BKP_DATA3_BKPDATA3_4,		4
	.EQU	BKP_DATA3_BKPDATA3_3,		3
	.EQU	BKP_DATA3_BKPDATA3_2,		2
	.EQU	BKP_DATA3_BKPDATA3_1,		1
	.EQU	BKP_DATA3_BKPDATA3_0,		0
//  register-------------------------------------
	.EQU	BKP_DATA4,		0x40000D50
//  0x4000 0D50  BKP_DATA4   Bits-------------------------------------
	.EQU	BKP_DATA4_BKPDATA4_31,		31
	.EQU	BKP_DATA4_BKPDATA4_30,		30
	.EQU	BKP_DATA4_BKPDATA4_29,		29
	.EQU	BKP_DATA4_BKPDATA4_28,		28
	.EQU	BKP_DATA4_BKPDATA4_27,		27
	.EQU	BKP_DATA4_BKPDATA4_26,		26
	.EQU	BKP_DATA4_BKPDATA4_25,		25
	.EQU	BKP_DATA4_BKPDATA4_24,		24
	.EQU	BKP_DATA4_BKPDATA4_23,		23
	.EQU	BKP_DATA4_BKPDATA4_22,		22
	.EQU	BKP_DATA4_BKPDATA4_21,		21
	.EQU	BKP_DATA4_BKPDATA4_20,		20
	.EQU	BKP_DATA4_BKPDATA4_19,		19
	.EQU	BKP_DATA4_BKPDATA4_18,		18
	.EQU	BKP_DATA4_BKPDATA4_17,		17
	.EQU	BKP_DATA4_BKPDATA4_16,		16
	.EQU	BKP_DATA4_BKPDATA4_15,		15
	.EQU	BKP_DATA4_BKPDATA4_14,		14
	.EQU	BKP_DATA4_BKPDATA4_13,		13
	.EQU	BKP_DATA4_BKPDATA4_12,		12
	.EQU	BKP_DATA4_BKPDATA4_11,		11
	.EQU	BKP_DATA4_BKPDATA4_10,		10
	.EQU	BKP_DATA4_BKPDATA4_9,		9
	.EQU	BKP_DATA4_BKPDATA4_8,		8
	.EQU	BKP_DATA4_BKPDATA4_7,		7
	.EQU	BKP_DATA4_BKPDATA4_6,		6
	.EQU	BKP_DATA4_BKPDATA4_5,		5
	.EQU	BKP_DATA4_BKPDATA4_4,		4
	.EQU	BKP_DATA4_BKPDATA4_3,		3
	.EQU	BKP_DATA4_BKPDATA4_2,		2
	.EQU	BKP_DATA4_BKPDATA4_1,		1
	.EQU	BKP_DATA4_BKPDATA4_0,		0
//  register-------------------------------------
	.EQU	BKP_DATA5,		0x40000D54
//  0x4000 0D54  BKP_DATA5   Bits-------------------------------------
	.EQU	BKP_DATA5_BKPDATA5_31,		31
	.EQU	BKP_DATA5_BKPDATA5_30,		30
	.EQU	BKP_DATA5_BKPDATA5_29,		29
	.EQU	BKP_DATA5_BKPDATA5_28,		28
	.EQU	BKP_DATA5_BKPDATA5_27,		27
	.EQU	BKP_DATA5_BKPDATA5_26,		26
	.EQU	BKP_DATA5_BKPDATA5_25,		25
	.EQU	BKP_DATA5_BKPDATA5_24,		24
	.EQU	BKP_DATA5_BKPDATA5_23,		23
	.EQU	BKP_DATA5_BKPDATA5_22,		22
	.EQU	BKP_DATA5_BKPDATA5_21,		21
	.EQU	BKP_DATA5_BKPDATA5_20,		20
	.EQU	BKP_DATA5_BKPDATA5_19,		19
	.EQU	BKP_DATA5_BKPDATA5_18,		18
	.EQU	BKP_DATA5_BKPDATA5_17,		17
	.EQU	BKP_DATA5_BKPDATA5_16,		16
	.EQU	BKP_DATA5_BKPDATA5_15,		15
	.EQU	BKP_DATA5_BKPDATA5_14,		14
	.EQU	BKP_DATA5_BKPDATA5_13,		13
	.EQU	BKP_DATA5_BKPDATA5_12,		12
	.EQU	BKP_DATA5_BKPDATA5_11,		11
	.EQU	BKP_DATA5_BKPDATA5_10,		10
	.EQU	BKP_DATA5_BKPDATA5_9,		9
	.EQU	BKP_DATA5_BKPDATA5_8,		8
	.EQU	BKP_DATA5_BKPDATA5_7,		7
	.EQU	BKP_DATA5_BKPDATA5_6,		6
	.EQU	BKP_DATA5_BKPDATA5_5,		5
	.EQU	BKP_DATA5_BKPDATA5_4,		4
	.EQU	BKP_DATA5_BKPDATA5_3,		3
	.EQU	BKP_DATA5_BKPDATA5_2,		2
	.EQU	BKP_DATA5_BKPDATA5_1,		1
	.EQU	BKP_DATA5_BKPDATA5_0,		0
//  register-------------------------------------
	.EQU	BKP_DATA6,		0x40000D58
//  0x4000 0D58  BKP_DATA6   Bits-------------------------------------
	.EQU	BKP_DATA6_BKPDATA6_31,		31
	.EQU	BKP_DATA6_BKPDATA6_30,		30
	.EQU	BKP_DATA6_BKPDATA6_29,		29
	.EQU	BKP_DATA6_BKPDATA6_28,		28
	.EQU	BKP_DATA6_BKPDATA6_27,		27
	.EQU	BKP_DATA6_BKPDATA6_26,		26
	.EQU	BKP_DATA6_BKPDATA6_25,		25
	.EQU	BKP_DATA6_BKPDATA6_24,		24
	.EQU	BKP_DATA6_BKPDATA6_23,		23
	.EQU	BKP_DATA6_BKPDATA6_22,		22
	.EQU	BKP_DATA6_BKPDATA6_21,		21
	.EQU	BKP_DATA6_BKPDATA6_20,		20
	.EQU	BKP_DATA6_BKPDATA6_19,		19
	.EQU	BKP_DATA6_BKPDATA6_18,		18
	.EQU	BKP_DATA6_BKPDATA6_17,		17
	.EQU	BKP_DATA6_BKPDATA6_16,		16
	.EQU	BKP_DATA6_BKPDATA6_15,		15
	.EQU	BKP_DATA6_BKPDATA6_14,		14
	.EQU	BKP_DATA6_BKPDATA6_13,		13
	.EQU	BKP_DATA6_BKPDATA6_12,		12
	.EQU	BKP_DATA6_BKPDATA6_11,		11
	.EQU	BKP_DATA6_BKPDATA6_10,		10
	.EQU	BKP_DATA6_BKPDATA6_9,		9
	.EQU	BKP_DATA6_BKPDATA6_8,		8
	.EQU	BKP_DATA6_BKPDATA6_7,		7
	.EQU	BKP_DATA6_BKPDATA6_6,		6
	.EQU	BKP_DATA6_BKPDATA6_5,		5
	.EQU	BKP_DATA6_BKPDATA6_4,		4
	.EQU	BKP_DATA6_BKPDATA6_3,		3
	.EQU	BKP_DATA6_BKPDATA6_2,		2
	.EQU	BKP_DATA6_BKPDATA6_1,		1
	.EQU	BKP_DATA6_BKPDATA6_0,		0
//  register-------------------------------------
	.EQU	BKP_DATA7,		0x40000D5C
//  0x4000 0D5C  BKP_DATA7   Bits-------------------------------------
	.EQU	BKP_DATA7_BKPDATA7_31,		31
	.EQU	BKP_DATA7_BKPDATA7_30,		30
	.EQU	BKP_DATA7_BKPDATA7_29,		29
	.EQU	BKP_DATA7_BKPDATA7_28,		28
	.EQU	BKP_DATA7_BKPDATA7_27,		27
	.EQU	BKP_DATA7_BKPDATA7_26,		26
	.EQU	BKP_DATA7_BKPDATA7_25,		25
	.EQU	BKP_DATA7_BKPDATA7_24,		24
	.EQU	BKP_DATA7_BKPDATA7_23,		23
	.EQU	BKP_DATA7_BKPDATA7_22,		22
	.EQU	BKP_DATA7_BKPDATA7_21,		21
	.EQU	BKP_DATA7_BKPDATA7_20,		20
	.EQU	BKP_DATA7_BKPDATA7_19,		19
	.EQU	BKP_DATA7_BKPDATA7_18,		18
	.EQU	BKP_DATA7_BKPDATA7_17,		17
	.EQU	BKP_DATA7_BKPDATA7_16,		16
	.EQU	BKP_DATA7_BKPDATA7_15,		15
	.EQU	BKP_DATA7_BKPDATA7_14,		14
	.EQU	BKP_DATA7_BKPDATA7_13,		13
	.EQU	BKP_DATA7_BKPDATA7_12,		12
	.EQU	BKP_DATA7_BKPDATA7_11,		11
	.EQU	BKP_DATA7_BKPDATA7_10,		10
	.EQU	BKP_DATA7_BKPDATA7_9,		9
	.EQU	BKP_DATA7_BKPDATA7_8,		8
	.EQU	BKP_DATA7_BKPDATA7_7,		7
	.EQU	BKP_DATA7_BKPDATA7_6,		6
	.EQU	BKP_DATA7_BKPDATA7_5,		5
	.EQU	BKP_DATA7_BKPDATA7_4,		4
	.EQU	BKP_DATA7_BKPDATA7_3,		3
	.EQU	BKP_DATA7_BKPDATA7_2,		2
	.EQU	BKP_DATA7_BKPDATA7_1,		1
	.EQU	BKP_DATA7_BKPDATA7_0,		0
//  register-------------------------------------
	.EQU	FLASH_ISPCON0,	0x40200100
//  0x4020 0100  FLASH_ISPCON0   Bits-------------------------------------
	.EQU	FLASH_ISPCON0_PFLOCK,		9
	.EQU	FLASH_ISPCON0_DFLOCK,		8
	.EQU	FLASH_ISPCON0_USERLOCK,		7
	.EQU	FLASH_ISPCON0_STANDBY1,		5
	.EQU	FLASH_ISPCON0_IFEN,		4
	.EQU	FLASH_ISPCON0_CFGLOCK,		2
	.EQU	FLASH_ISPCON0_FLASHLOCK,		1
	.EQU	FLASH_ISPCON0_NVMLOCK,		0
//  register-------------------------------------
	.EQU	FLASH_ISPCON1,	0x40200104
//  0x4020 0104  FLASH_ISPCON1   Bits-------------------------------------
	.EQU	FLASH_ISPCON1_CHIPONEN,		15
	.EQU	FLASH_ISPCON1_CONFEN,		2
	.EQU	FLASH_ISPCON1_RECALLEN,		1
	.EQU	FLASH_ISPCON1_IPSEL,		0
//  register-------------------------------------
	.EQU	FLASH_ISPCMD,	0x40200108
//  0x4020 0108  FLASH_ISPCMD   Bits-------------------------------------
	.EQU	FLASH_ISPCMD_WSIZE5,		10
	.EQU	FLASH_ISPCMD_WSIZE4,		9
	.EQU	FLASH_ISPCMD_WSIZE3,		8
	.EQU	FLASH_ISPCMD_WSIZE2,		7
	.EQU	FLASH_ISPCMD_WSIZE1,		6
	.EQU	FLASH_ISPCMD_WSIZE0,		5
	.EQU	FLASH_ISPCMD_CMD4,		4
	.EQU	FLASH_ISPCMD_CMD3,		3
	.EQU	FLASH_ISPCMD_CMD2,		2
	.EQU	FLASH_ISPCMD_CMD1,		1
	.EQU	FLASH_ISPCMD_CMD0,		0
//  register-------------------------------------
	.EQU	FLASH_ISPTRG,	0x4020010C
//  0x4020 010C  FLASH_ISPTRG   Bits-------------------------------------
	.EQU	FLASH_ISPTRG_ISPGO,		0
//  register-------------------------------------
	.EQU	FLASH_CFG,		0x40200114
//  0x4020 0114  FLASH_CFG   Bits-------------------------------------
	.EQU	FLASH_CFG_ECCREADEN,		7
	.EQU	FLASH_CFG_PREFETCHEN,		6
	.EQU	FLASH_CFG_TCFG3,		3
	.EQU	FLASH_CFG_TCFG2,		2
	.EQU	FLASH_CFG_TCFG1,		1
	.EQU	FLASH_CFG_TCFG0,		0
//  register-------------------------------------
	.EQU	FLASH_USERUNLOCK,	0x40200118
//  0x4020 0118  FLASH_USERUNLOCK   Bits-------------------------------------
	.EQU	FLASH_USERUNLOCK_USERUNLOCK31,		31
	.EQU	FLASH_USERUNLOCK_USERUNLOCK30,		30
	.EQU	FLASH_USERUNLOCK_USERUNLOCK29,		29
	.EQU	FLASH_USERUNLOCK_USERUNLOCK28,		28
	.EQU	FLASH_USERUNLOCK_USERUNLOCK27,		27
	.EQU	FLASH_USERUNLOCK_USERUNLOCK26,		26
	.EQU	FLASH_USERUNLOCK_USERUNLOCK25,		25
	.EQU	FLASH_USERUNLOCK_USERUNLOCK24,		24
	.EQU	FLASH_USERUNLOCK_USERUNLOCK23,		23
	.EQU	FLASH_USERUNLOCK_USERUNLOCK22,		22
	.EQU	FLASH_USERUNLOCK_USERUNLOCK21,		21
	.EQU	FLASH_USERUNLOCK_USERUNLOCK20,		20
	.EQU	FLASH_USERUNLOCK_USERUNLOCK19,		19
	.EQU	FLASH_USERUNLOCK_USERUNLOCK18,		18
	.EQU	FLASH_USERUNLOCK_USERUNLOCK17,		17
	.EQU	FLASH_USERUNLOCK_USERUNLOCK16,		16
	.EQU	FLASH_USERUNLOCK_USERUNLOCK15,		15
	.EQU	FLASH_USERUNLOCK_USERUNLOCK14,		14
	.EQU	FLASH_USERUNLOCK_USERUNLOCK13,		13
	.EQU	FLASH_USERUNLOCK_USERUNLOCK12,		12
	.EQU	FLASH_USERUNLOCK_USERUNLOCK11,		11
	.EQU	FLASH_USERUNLOCK_USERUNLOCK10,		10
	.EQU	FLASH_USERUNLOCK_USERUNLOCK9,		9
	.EQU	FLASH_USERUNLOCK_USERUNLOCK8,		8
	.EQU	FLASH_USERUNLOCK_USERUNLOCK7,		7
	.EQU	FLASH_USERUNLOCK_USERUNLOCK6,		6
	.EQU	FLASH_USERUNLOCK_USERUNLOCK5,		5
	.EQU	FLASH_USERUNLOCK_USERUNLOCK4,		4
	.EQU	FLASH_USERUNLOCK_USERUNLOCK3,		3
	.EQU	FLASH_USERUNLOCK_USERUNLOCK2,		2
	.EQU	FLASH_USERUNLOCK_USERUNLOCK1,		1
	.EQU	FLASH_USERUNLOCK_USERUNLOCK0,		0
//  register-------------------------------------
	.EQU	FLASH_ISPADDR,	0x4020011C
//  0x4020 011C  FLASH_ISPADDR   Bits-------------------------------------
	.EQU	FLASH_ISPADDR_SADDR18,		18
	.EQU	FLASH_ISPADDR_SADDR17,		17
	.EQU	FLASH_ISPADDR_SADDR16,		16
	.EQU	FLASH_ISPADDR_SADDR15,		15
	.EQU	FLASH_ISPADDR_SADDR14,		14
	.EQU	FLASH_ISPADDR_SADDR13,		13
	.EQU	FLASH_ISPADDR_SADDR12,		12
	.EQU	FLASH_ISPADDR_SADDR11,		11
	.EQU	FLASH_ISPADDR_SADDR10,		10
	.EQU	FLASH_ISPADDR_SADDR9,		9
	.EQU	FLASH_ISPADDR_SADDR8,		8
	.EQU	FLASH_ISPADDR_SADDR7,		7
	.EQU	FLASH_ISPADDR_SADDR6,		6
	.EQU	FLASH_ISPADDR_SADDR5,		5
	.EQU	FLASH_ISPADDR_SADDR4,		4
	.EQU	FLASH_ISPADDR_SADDR3,		3
//  register-------------------------------------
	.EQU	FLASH_STATE,	0x40200120
//  0x4020 0120  FLASH_STATE   Bits-------------------------------------
	.EQU	FLASH_STATE_BDBGREM,		13
	.EQU	FLASH_STATE_DDBG,		12
	.EQU	FLASH_STATE_TBUSY,		3
	.EQU	FLASH_STATE_TBIT,		2
	.EQU	FLASH_STATE_SIGDONE,		1
	.EQU	FLASH_STATE_CFGERROR,		0
//  register-------------------------------------
	.EQU	FLASH_NVMUNLOCK,	0x40200128
//  0x4020 0128  FLASH_NVMUNLOCK   Bits-------------------------------------
	.EQU	FLASH_NVMUNLOCK_NUMUNLOCK31,		31
	.EQU	FLASH_NVMUNLOCK_NUMUNLOCK30,		30
	.EQU	FLASH_NVMUNLOCK_NUMUNLOCK29,		29
	.EQU	FLASH_NVMUNLOCK_NUMUNLOCK28,		28
	.EQU	FLASH_NVMUNLOCK_NUMUNLOCK27,		27
	.EQU	FLASH_NVMUNLOCK_NUMUNLOCK26,		26
	.EQU	FLASH_NVMUNLOCK_NUMUNLOCK25,		25
	.EQU	FLASH_NVMUNLOCK_NUMUNLOCK24,		24
	.EQU	FLASH_NVMUNLOCK_NUMUNLOCK23,		23
	.EQU	FLASH_NVMUNLOCK_NUMUNLOCK22,		22
	.EQU	FLASH_NVMUNLOCK_NUMUNLOCK21,		21
	.EQU	FLASH_NVMUNLOCK_NUMUNLOCK20,		20
	.EQU	FLASH_NVMUNLOCK_NUMUNLOCK19,		19
	.EQU	FLASH_NVMUNLOCK_NUMUNLOCK18,		18
	.EQU	FLASH_NVMUNLOCK_NUMUNLOCK17,		17
	.EQU	FLASH_NVMUNLOCK_NUMUNLOCK16,		16
	.EQU	FLASH_NVMUNLOCK_NUMUNLOCK15,		15
	.EQU	FLASH_NVMUNLOCK_NUMUNLOCK14,		14
	.EQU	FLASH_NVMUNLOCK_NUMUNLOCK13,		13
	.EQU	FLASH_NVMUNLOCK_NUMUNLOCK12,		12
	.EQU	FLASH_NVMUNLOCK_NUMUNLOCK11,		11
	.EQU	FLASH_NVMUNLOCK_NUMUNLOCK10,		10
	.EQU	FLASH_NVMUNLOCK_NUMUNLOCK9,		9
	.EQU	FLASH_NVMUNLOCK_NUMUNLOCK8,		8
	.EQU	FLASH_NVMUNLOCK_NUMUNLOCK7,		7
	.EQU	FLASH_NVMUNLOCK_NUMUNLOCK6,		6
	.EQU	FLASH_NVMUNLOCK_NUMUNLOCK5,		5
	.EQU	FLASH_NVMUNLOCK_NUMUNLOCK4,		4
	.EQU	FLASH_NVMUNLOCK_NUMUNLOCK3,		3
	.EQU	FLASH_NVMUNLOCK_NUMUNLOCK2,		2
	.EQU	FLASH_NVMUNLOCK_NUMUNLOCK1,		1
	.EQU	FLASH_NVMUNLOCK_NUMUNLOCK0,		0
//  register-------------------------------------
	.EQU	FLASH_PROUNLOCK,	0x4020012C
//  0x4020 012C  FLASH_PROUNLOCK   Bits-------------------------------------
	.EQU	FLASH_PROUNLOCK_PROUNLOCK31,		31
	.EQU	FLASH_PROUNLOCK_PROUNLOCK30,		30
	.EQU	FLASH_PROUNLOCK_PROUNLOCK29,		29
	.EQU	FLASH_PROUNLOCK_PROUNLOCK28,		28
	.EQU	FLASH_PROUNLOCK_PROUNLOCK27,		27
	.EQU	FLASH_PROUNLOCK_PROUNLOCK26,		26
	.EQU	FLASH_PROUNLOCK_PROUNLOCK25,		25
	.EQU	FLASH_PROUNLOCK_PROUNLOCK24,		24
	.EQU	FLASH_PROUNLOCK_PROUNLOCK23,		23
	.EQU	FLASH_PROUNLOCK_PROUNLOCK22,		22
	.EQU	FLASH_PROUNLOCK_PROUNLOCK21,		21
	.EQU	FLASH_PROUNLOCK_PROUNLOCK20,		20
	.EQU	FLASH_PROUNLOCK_PROUNLOCK19,		19
	.EQU	FLASH_PROUNLOCK_PROUNLOCK18,		18
	.EQU	FLASH_PROUNLOCK_PROUNLOCK17,		17
	.EQU	FLASH_PROUNLOCK_PROUNLOCK16,		16
	.EQU	FLASH_PROUNLOCK_PROUNLOCK15,		15
	.EQU	FLASH_PROUNLOCK_PROUNLOCK14,		14
	.EQU	FLASH_PROUNLOCK_PROUNLOCK13,		13
	.EQU	FLASH_PROUNLOCK_PROUNLOCK12,		12
	.EQU	FLASH_PROUNLOCK_PROUNLOCK11,		11
	.EQU	FLASH_PROUNLOCK_PROUNLOCK10,		10
	.EQU	FLASH_PROUNLOCK_PROUNLOCK9,		9
	.EQU	FLASH_PROUNLOCK_PROUNLOCK8,		8
	.EQU	FLASH_PROUNLOCK_PROUNLOCK7,		7
	.EQU	FLASH_PROUNLOCK_PROUNLOCK6,		6
	.EQU	FLASH_PROUNLOCK_PROUNLOCK5,		5
	.EQU	FLASH_PROUNLOCK_PROUNLOCK4,		4
	.EQU	FLASH_PROUNLOCK_PROUNLOCK3,		3
	.EQU	FLASH_PROUNLOCK_PROUNLOCK2,		2
	.EQU	FLASH_PROUNLOCK_PROUNLOCK1,		1
	.EQU	FLASH_PROUNLOCK_PROUNLOCK0,		0
//  register-------------------------------------
	.EQU	FLASH_CFGUNLOCK,	0x40200130
//  0x4020 0130  FLASH_CFGUNLOCK   Bits-------------------------------------
	.EQU	FLASH_CFGUNLOCK_CFGUNLOCK31,		31
	.EQU	FLASH_CFGUNLOCK_CFGUNLOCK30,		30
	.EQU	FLASH_CFGUNLOCK_CFGUNLOCK29,		29
	.EQU	FLASH_CFGUNLOCK_CFGUNLOCK28,		28
	.EQU	FLASH_CFGUNLOCK_CFGUNLOCK27,		27
	.EQU	FLASH_CFGUNLOCK_CFGUNLOCK26,		26
	.EQU	FLASH_CFGUNLOCK_CFGUNLOCK25,		25
	.EQU	FLASH_CFGUNLOCK_CFGUNLOCK24,		24
	.EQU	FLASH_CFGUNLOCK_CFGUNLOCK23,		23
	.EQU	FLASH_CFGUNLOCK_CFGUNLOCK22,		22
	.EQU	FLASH_CFGUNLOCK_CFGUNLOCK21,		21
	.EQU	FLASH_CFGUNLOCK_CFGUNLOCK20,		20
	.EQU	FLASH_CFGUNLOCK_CFGUNLOCK19,		19
	.EQU	FLASH_CFGUNLOCK_CFGUNLOCK18,		18
	.EQU	FLASH_CFGUNLOCK_CFGUNLOCK17,		17
	.EQU	FLASH_CFGUNLOCK_CFGUNLOCK16,		16
	.EQU	FLASH_CFGUNLOCK_CFGUNLOCK15,		15
	.EQU	FLASH_CFGUNLOCK_CFGUNLOCK14,		14
	.EQU	FLASH_CFGUNLOCK_CFGUNLOCK13,		13
	.EQU	FLASH_CFGUNLOCK_CFGUNLOCK12,		12
	.EQU	FLASH_CFGUNLOCK_CFGUNLOCK11,		11
	.EQU	FLASH_CFGUNLOCK_CFGUNLOCK10,		10
	.EQU	FLASH_CFGUNLOCK_CFGUNLOCK9,		9
	.EQU	FLASH_CFGUNLOCK_CFGUNLOCK8,		8
	.EQU	FLASH_CFGUNLOCK_CFGUNLOCK7,		7
	.EQU	FLASH_CFGUNLOCK_CFGUNLOCK6,		6
	.EQU	FLASH_CFGUNLOCK_CFGUNLOCK5,		5
	.EQU	FLASH_CFGUNLOCK_CFGUNLOCK4,		4
	.EQU	FLASH_CFGUNLOCK_CFGUNLOCK3,		3
	.EQU	FLASH_CFGUNLOCK_CFGUNLOCK2,		2
	.EQU	FLASH_CFGUNLOCK_CFGUNLOCK1,		1
	.EQU	FLASH_CFGUNLOCK_CFGUNLOCK0,		0
//  register-------------------------------------
	.EQU	 FLASH_CHIPONLOCK,	0x40200131
//  0x4020 0131   FLASH_CHIPONLOCK   Bits-------------------------------------
	.EQU	 FLASH_CHIPONLOCK_CFGUNLOCK31,		31
	.EQU	 FLASH_CHIPONLOCK_CFGUNLOCK30,		30
	.EQU	 FLASH_CHIPONLOCK_CFGUNLOCK29,		29
	.EQU	 FLASH_CHIPONLOCK_CFGUNLOCK28,		28
	.EQU	 FLASH_CHIPONLOCK_CFGUNLOCK27,		27
	.EQU	 FLASH_CHIPONLOCK_CFGUNLOCK26,		26
	.EQU	 FLASH_CHIPONLOCK_CFGUNLOCK25,		25
	.EQU	 FLASH_CHIPONLOCK_CFGUNLOCK24,		24
	.EQU	 FLASH_CHIPONLOCK_CFGUNLOCK23,		23
	.EQU	 FLASH_CHIPONLOCK_CFGUNLOCK22,		22
	.EQU	 FLASH_CHIPONLOCK_CFGUNLOCK21,		21
	.EQU	 FLASH_CHIPONLOCK_CFGUNLOCK20,		20
	.EQU	 FLASH_CHIPONLOCK_CFGUNLOCK19,		19
	.EQU	 FLASH_CHIPONLOCK_CFGUNLOCK18,		18
	.EQU	 FLASH_CHIPONLOCK_CFGUNLOCK17,		17
	.EQU	 FLASH_CHIPONLOCK_CFGUNLOCK16,		16
	.EQU	 FLASH_CHIPONLOCK_CFGUNLOCK15,		15
	.EQU	 FLASH_CHIPONLOCK_CFGUNLOCK14,		14
	.EQU	 FLASH_CHIPONLOCK_CFGUNLOCK13,		13
	.EQU	 FLASH_CHIPONLOCK_CFGUNLOCK12,		12
	.EQU	 FLASH_CHIPONLOCK_CFGUNLOCK11,		11
	.EQU	 FLASH_CHIPONLOCK_CFGUNLOCK10,		10
	.EQU	 FLASH_CHIPONLOCK_CFGUNLOCK9,		9
	.EQU	 FLASH_CHIPONLOCK_CFGUNLOCK8,		8
	.EQU	 FLASH_CHIPONLOCK_CFGUNLOCK7,		7
	.EQU	 FLASH_CHIPONLOCK_CFGUNLOCK6,		6
	.EQU	 FLASH_CHIPONLOCK_CFGUNLOCK5,		5
	.EQU	 FLASH_CHIPONLOCK_CFGUNLOCK4,		4
	.EQU	 FLASH_CHIPONLOCK_CFGUNLOCK3,		3
	.EQU	 FLASH_CHIPONLOCK_CFGUNLOCK2,		2
	.EQU	 FLASH_CHIPONLOCK_CFGUNLOCK1,		1
	.EQU	 FLASH_CHIPONLOCK_CFGUNLOCK0,		0
//  register-------------------------------------
	.EQU	FLASH_CSSTART,	0x40200138
//  0x4020 0138  FLASH_CSSTART   Bits-------------------------------------
	.EQU	FLASH_CSSTART_CKSTADDR20,		20
	.EQU	FLASH_CSSTART_CKSTADDR19,		19
	.EQU	FLASH_CSSTART_CKSTADDR18,		18
	.EQU	FLASH_CSSTART_CKSTADDR17,		17
	.EQU	FLASH_CSSTART_CKSTADDR16,		16
	.EQU	FLASH_CSSTART_CKSTADDR15,		15
	.EQU	FLASH_CSSTART_CKSTADDR14,		14
	.EQU	FLASH_CSSTART_CKSTADDR13,		13
	.EQU	FLASH_CSSTART_CKSTADDR12,		12
	.EQU	FLASH_CSSTART_CKSTADDR11,		11
	.EQU	FLASH_CSSTART_CKSTADDR10,		10
	.EQU	FLASH_CSSTART_CKSTADDR9,		9
	.EQU	FLASH_CSSTART_CKSTADDR8,		8
	.EQU	FLASH_CSSTART_CKSTADDR7,		7
	.EQU	FLASH_CSSTART_CKSTADDR6,		6
	.EQU	FLASH_CSSTART_CKSTADDR5,		5
	.EQU	FLASH_CSSTART_CKSTADDR4,		4
//  register-------------------------------------
	.EQU	FLASH_CSSTOP,	0x4020013C
//  0x4020 013C  FLASH_CSSTOP   Bits-------------------------------------
	.EQU	FLASH_CSSTOP_SIGGO,		31
	.EQU	FLASH_CSSTOP_CKSPADDR20,		20
	.EQU	FLASH_CSSTOP_CKSPADDR19,		19
	.EQU	FLASH_CSSTOP_CKSPADDR18,		18
	.EQU	FLASH_CSSTOP_CKSPADDR17,		17
	.EQU	FLASH_CSSTOP_CKSPADDR16,		16
	.EQU	FLASH_CSSTOP_CKSPADDR15,		15
	.EQU	FLASH_CSSTOP_CKSPADDR14,		14
	.EQU	FLASH_CSSTOP_CKSPADDR13,		13
	.EQU	FLASH_CSSTOP_CKSPADDR12,		12
	.EQU	FLASH_CSSTOP_CKSPADDR11,		11
	.EQU	FLASH_CSSTOP_CKSPADDR10,		10
	.EQU	FLASH_CSSTOP_CKSPADDR9,		9
	.EQU	FLASH_CSSTOP_CKSPADDR8,		8
	.EQU	FLASH_CSSTOP_CKSPADDR7,		7
	.EQU	FLASH_CSSTOP_CKSPADDR6,		6
	.EQU	FLASH_CSSTOP_CKSPADDR5,		5
	.EQU	FLASH_CSSTOP_CKSPADDR4,		4
//  register-------------------------------------
	.EQU	FLASH_CSRES0,	0x40200140
//  0x4020 0140  FLASH_CSRES0   Bits-------------------------------------
	.EQU	FLASH_CSRES0_CKSPRES0_31,		31
	.EQU	FLASH_CSRES0_CKSPRES0_30,		30
	.EQU	FLASH_CSRES0_CKSPRES0_29,		29
	.EQU	FLASH_CSRES0_CKSPRES0_28,		28
	.EQU	FLASH_CSRES0_CKSPRES0_27,		27
	.EQU	FLASH_CSRES0_CKSPRES0_26,		26
	.EQU	FLASH_CSRES0_CKSPRES0_25,		25
	.EQU	FLASH_CSRES0_CKSPRES0_24,		24
	.EQU	FLASH_CSRES0_CKSPRES0_23,		23
	.EQU	FLASH_CSRES0_CKSPRES0_22,		22
	.EQU	FLASH_CSRES0_CKSPRES0_21,		21
	.EQU	FLASH_CSRES0_CKSPRES0_20,		20
	.EQU	FLASH_CSRES0_CKSPRES0_19,		19
	.EQU	FLASH_CSRES0_CKSPRES0_18,		18
	.EQU	FLASH_CSRES0_CKSPRES0_17,		17
	.EQU	FLASH_CSRES0_CKSPRES0_16,		16
	.EQU	FLASH_CSRES0_CKSPRES0_15,		15
	.EQU	FLASH_CSRES0_CKSPRES0_14,		14
	.EQU	FLASH_CSRES0_CKSPRES0_13,		13
	.EQU	FLASH_CSRES0_CKSPRES0_12,		12
	.EQU	FLASH_CSRES0_CKSPRES0_11,		11
	.EQU	FLASH_CSRES0_CKSPRES0_10,		10
	.EQU	FLASH_CSRES0_CKSPRES0_9,		9
	.EQU	FLASH_CSRES0_CKSPRES0_8,		8
	.EQU	FLASH_CSRES0_CKSPRES0_7,		7
	.EQU	FLASH_CSRES0_CKSPRES0_6,		6
	.EQU	FLASH_CSRES0_CKSPRES0_5,		5
	.EQU	FLASH_CSRES0_CKSPRES0_4,		4
	.EQU	FLASH_CSRES0_CKSPRES0_3,		3
	.EQU	FLASH_CSRES0_CKSPRES0_2,		2
	.EQU	FLASH_CSRES0_CKSPRES0_1,		1
	.EQU	FLASH_CSRES0_CKSPRES0_0,		0
//  register-------------------------------------
	.EQU	FLASH_CSRES1,	0x40200144
//  0x4020 0144  FLASH_CSRES1   Bits-------------------------------------
	.EQU	FLASH_CSRES1_CKSPRES1_31,		31
	.EQU	FLASH_CSRES1_CKSPRES1_30,		30
	.EQU	FLASH_CSRES1_CKSPRES1_29,		29
	.EQU	FLASH_CSRES1_CKSPRES1_28,		28
	.EQU	FLASH_CSRES1_CKSPRES1_27,		27
	.EQU	FLASH_CSRES1_CKSPRES1_26,		26
	.EQU	FLASH_CSRES1_CKSPRES1_25,		25
	.EQU	FLASH_CSRES1_CKSPRES1_24,		24
	.EQU	FLASH_CSRES1_CKSPRES1_23,		23
	.EQU	FLASH_CSRES1_CKSPRES1_22,		22
	.EQU	FLASH_CSRES1_CKSPRES1_21,		21
	.EQU	FLASH_CSRES1_CKSPRES1_20,		20
	.EQU	FLASH_CSRES1_CKSPRES1_19,		19
	.EQU	FLASH_CSRES1_CKSPRES1_18,		18
	.EQU	FLASH_CSRES1_CKSPRES1_17,		17
	.EQU	FLASH_CSRES1_CKSPRES1_16,		16
	.EQU	FLASH_CSRES1_CKSPRES1_15,		15
	.EQU	FLASH_CSRES1_CKSPRES1_14,		14
	.EQU	FLASH_CSRES1_CKSPRES1_13,		13
	.EQU	FLASH_CSRES1_CKSPRES1_12,		12
	.EQU	FLASH_CSRES1_CKSPRES1_11,		11
	.EQU	FLASH_CSRES1_CKSPRES1_10,		10
	.EQU	FLASH_CSRES1_CKSPRES1_9,		9
	.EQU	FLASH_CSRES1_CKSPRES1_8,		8
	.EQU	FLASH_CSRES1_CKSPRES1_7,		7
	.EQU	FLASH_CSRES1_CKSPRES1_6,		6
	.EQU	FLASH_CSRES1_CKSPRES1_5,		5
	.EQU	FLASH_CSRES1_CKSPRES1_4,		4
	.EQU	FLASH_CSRES1_CKSPRES1_3,		3
	.EQU	FLASH_CSRES1_CKSPRES1_2,		2
	.EQU	FLASH_CSRES1_CKSPRES1_1,		1
	.EQU	FLASH_CSRES1_CKSPRES1_0,		0
//  register-------------------------------------
	.EQU	FLASH_CSRES2,	0x40200148
//  0x4020 0148  FLASH_CSRES2   Bits-------------------------------------
	.EQU	FLASH_CSRES2_CKSPRES2_31,		31
	.EQU	FLASH_CSRES2_CKSPRES2_30,		30
	.EQU	FLASH_CSRES2_CKSPRES2_29,		29
	.EQU	FLASH_CSRES2_CKSPRES2_28,		28
	.EQU	FLASH_CSRES2_CKSPRES2_27,		27
	.EQU	FLASH_CSRES2_CKSPRES2_26,		26
	.EQU	FLASH_CSRES2_CKSPRES2_25,		25
	.EQU	FLASH_CSRES2_CKSPRES2_24,		24
	.EQU	FLASH_CSRES2_CKSPRES2_23,		23
	.EQU	FLASH_CSRES2_CKSPRES2_22,		22
	.EQU	FLASH_CSRES2_CKSPRES2_21,		21
	.EQU	FLASH_CSRES2_CKSPRES2_20,		20
	.EQU	FLASH_CSRES2_CKSPRES2_19,		19
	.EQU	FLASH_CSRES2_CKSPRES2_18,		18
	.EQU	FLASH_CSRES2_CKSPRES2_17,		17
	.EQU	FLASH_CSRES2_CKSPRES2_16,		16
	.EQU	FLASH_CSRES2_CKSPRES2_15,		15
	.EQU	FLASH_CSRES2_CKSPRES2_14,		14
	.EQU	FLASH_CSRES2_CKSPRES2_13,		13
	.EQU	FLASH_CSRES2_CKSPRES2_12,		12
	.EQU	FLASH_CSRES2_CKSPRES2_11,		11
	.EQU	FLASH_CSRES2_CKSPRES2_10,		10
	.EQU	FLASH_CSRES2_CKSPRES2_9,		9
	.EQU	FLASH_CSRES2_CKSPRES2_8,		8
	.EQU	FLASH_CSRES2_CKSPRES2_7,		7
	.EQU	FLASH_CSRES2_CKSPRES2_6,		6
	.EQU	FLASH_CSRES2_CKSPRES2_5,		5
	.EQU	FLASH_CSRES2_CKSPRES2_4,		4
	.EQU	FLASH_CSRES2_CKSPRES2_3,		3
	.EQU	FLASH_CSRES2_CKSPRES2_2,		2
	.EQU	FLASH_CSRES2_CKSPRES2_1,		1
	.EQU	FLASH_CSRES2_CKSPRES2_0,		0
//  register-------------------------------------
	.EQU	FLASH_CSRES3,	0x4020014C
//  0x4020 014C  FLASH_CSRES3   Bits-------------------------------------
	.EQU	FLASH_CSRES3_CKSPRES3_31,		31
	.EQU	FLASH_CSRES3_CKSPRES3_30,		30
	.EQU	FLASH_CSRES3_CKSPRES3_29,		29
	.EQU	FLASH_CSRES3_CKSPRES3_28,		28
	.EQU	FLASH_CSRES3_CKSPRES3_27,		27
	.EQU	FLASH_CSRES3_CKSPRES3_26,		26
	.EQU	FLASH_CSRES3_CKSPRES3_25,		25
	.EQU	FLASH_CSRES3_CKSPRES3_24,		24
	.EQU	FLASH_CSRES3_CKSPRES3_23,		23
	.EQU	FLASH_CSRES3_CKSPRES3_22,		22
	.EQU	FLASH_CSRES3_CKSPRES3_21,		21
	.EQU	FLASH_CSRES3_CKSPRES3_20,		20
	.EQU	FLASH_CSRES3_CKSPRES3_19,		19
	.EQU	FLASH_CSRES3_CKSPRES3_18,		18
	.EQU	FLASH_CSRES3_CKSPRES3_17,		17
	.EQU	FLASH_CSRES3_CKSPRES3_16,		16
	.EQU	FLASH_CSRES3_CKSPRES3_15,		15
	.EQU	FLASH_CSRES3_CKSPRES3_14,		14
	.EQU	FLASH_CSRES3_CKSPRES3_13,		13
	.EQU	FLASH_CSRES3_CKSPRES3_12,		12
	.EQU	FLASH_CSRES3_CKSPRES3_11,		11
	.EQU	FLASH_CSRES3_CKSPRES3_10,		10
	.EQU	FLASH_CSRES3_CKSPRES3_9,		9
	.EQU	FLASH_CSRES3_CKSPRES3_8,		8
	.EQU	FLASH_CSRES3_CKSPRES3_7,		7
	.EQU	FLASH_CSRES3_CKSPRES3_6,		6
	.EQU	FLASH_CSRES3_CKSPRES3_5,		5
	.EQU	FLASH_CSRES3_CKSPRES3_4,		4
	.EQU	FLASH_CSRES3_CKSPRES3_3,		3
	.EQU	FLASH_CSRES3_CKSPRES3_2,		2
	.EQU	FLASH_CSRES3_CKSPRES3_1,		1
	.EQU	FLASH_CSRES3_CKSPRES3_0,		0
//  register-------------------------------------
	.EQU	ECC0_CTL,		0x40001480
//  0x4000 1480  ECC0_CTL   Bits-------------------------------------
	.EQU	ECC0_CTL_MEM2IBTERRIC,		14
	.EQU	ECC0_CTL_MEM1BITERRIC,		13
	.EQU	ECC0_CTL_MEMERRIC,		12
	.EQU	ECC0_CTL_MEM2BITERRIE,		10
	.EQU	ECC0_CTL_MEM1BITERRIE,		9
	.EQU	ECC0_CTL_MEMERRIE,		8
	.EQU	ECC0_CTL_ECCTESTEN,		0
//  register-------------------------------------
	.EQU	ECC0_INT,		0x40001484
//  0x4000 1484  ECC0_INT   Bits-------------------------------------
	.EQU	ECC0_INT_MEM2BITERRIF,		2
	.EQU	ECC0_INT_MEM1BITERRIF,		1
	.EQU	ECC0_INT_MEMERRIF,		0
//  register-------------------------------------
	.EQU	ECC0_ERRADDR,	0x40001488
//  0x4000 1488  ECC0_ERRADDR   Bits-------------------------------------
	.EQU	ECC0_ERRADDR_ERRADDR31,		31
	.EQU	ECC0_ERRADDR_ERRADDR30,		30
	.EQU	ECC0_ERRADDR_ERRADDR29,		29
	.EQU	ECC0_ERRADDR_ERRADDR28,		28
	.EQU	ECC0_ERRADDR_ERRADDR27,		27
	.EQU	ECC0_ERRADDR_ERRADDR26,		26
	.EQU	ECC0_ERRADDR_ERRADDR25,		25
	.EQU	ECC0_ERRADDR_ERRADDR24,		24
	.EQU	ECC0_ERRADDR_ERRADDR23,		23
	.EQU	ECC0_ERRADDR_ERRADDR22,		22
	.EQU	ECC0_ERRADDR_ERRADDR21,		21
	.EQU	ECC0_ERRADDR_ERRADDR20,		20
	.EQU	ECC0_ERRADDR_ERRADDR19,		19
	.EQU	ECC0_ERRADDR_ERRADDR18,		18
	.EQU	ECC0_ERRADDR_ERRADDR17,		17
	.EQU	ECC0_ERRADDR_ERRADDR16,		16
	.EQU	ECC0_ERRADDR_ERRADDR15,		15
	.EQU	ECC0_ERRADDR_ERRADDR14,		14
	.EQU	ECC0_ERRADDR_ERRADDR13,		13
	.EQU	ECC0_ERRADDR_ERRADDR12,		12
	.EQU	ECC0_ERRADDR_ERRADDR11,		11
	.EQU	ECC0_ERRADDR_ERRADDR10,		10
	.EQU	ECC0_ERRADDR_ERRADDR9,		9
	.EQU	ECC0_ERRADDR_ERRADDR8,		8
	.EQU	ECC0_ERRADDR_ERRADDR7,		7
	.EQU	ECC0_ERRADDR_ERRADDR6,		6
	.EQU	ECC0_ERRADDR_ERRADDR5,		5
	.EQU	ECC0_ERRADDR_ERRADDR4,		4
	.EQU	ECC0_ERRADDR_ERRADDR3,		3
	.EQU	ECC0_ERRADDR_ERRADDR2,		2
	.EQU	ECC0_ERRADDR_ERRADDR1,		1
	.EQU	ECC0_ERRADDR_ERRADDR0,		0
//  register-------------------------------------
	.EQU	ECC0_EBR0,		0x40001490
//  0x4000 1490  ECC0_EBR0   Bits-------------------------------------
	.EQU	ECC0_EBR0_ERRBITEN31,		31
	.EQU	ECC0_EBR0_ERRBITEN30,		30
	.EQU	ECC0_EBR0_ERRBITEN29,		29
	.EQU	ECC0_EBR0_ERRBITEN28,		28
	.EQU	ECC0_EBR0_ERRBITEN27,		27
	.EQU	ECC0_EBR0_ERRBITEN26,		26
	.EQU	ECC0_EBR0_ERRBITEN25,		25
	.EQU	ECC0_EBR0_ERRBITEN24,		24
	.EQU	ECC0_EBR0_ERRBITEN23,		23
	.EQU	ECC0_EBR0_ERRBITEN22,		22
	.EQU	ECC0_EBR0_ERRBITEN21,		21
	.EQU	ECC0_EBR0_ERRBITEN20,		20
	.EQU	ECC0_EBR0_ERRBITEN19,		19
	.EQU	ECC0_EBR0_ERRBITEN18,		18
	.EQU	ECC0_EBR0_ERRBITEN17,		17
	.EQU	ECC0_EBR0_ERRBITEN16,		16
	.EQU	ECC0_EBR0_ERRBITEN15,		15
	.EQU	ECC0_EBR0_ERRBITEN14,		14
	.EQU	ECC0_EBR0_ERRBITEN13,		13
	.EQU	ECC0_EBR0_ERRBITEN12,		12
	.EQU	ECC0_EBR0_ERRBITEN11,		11
	.EQU	ECC0_EBR0_ERRBITEN10,		10
	.EQU	ECC0_EBR0_ERRBITEN9,		9
	.EQU	ECC0_EBR0_ERRBITEN8,		8
	.EQU	ECC0_EBR0_ERRBITEN7,		7
	.EQU	ECC0_EBR0_ERRBITEN6,		6
	.EQU	ECC0_EBR0_ERRBITEN5,		5
	.EQU	ECC0_EBR0_ERRBITEN4,		4
	.EQU	ECC0_EBR0_ERRBITEN3,		3
	.EQU	ECC0_EBR0_ERRBITEN2,		2
	.EQU	ECC0_EBR0_ERRBITEN1,		1
	.EQU	ECC0_EBR0_ERRBITEN0,		0
//  register-------------------------------------
	.EQU	ECC0_EBR1,		0x40001494
//  0x4000 1494  ECC0_EBR1   Bits-------------------------------------
	.EQU	ECC0_EBR1_ERRBITEN31,		31
	.EQU	ECC0_EBR1_ERRBITEN30,		30
	.EQU	ECC0_EBR1_ERRBITEN29,		29
	.EQU	ECC0_EBR1_ERRBITEN28,		28
	.EQU	ECC0_EBR1_ERRBITEN27,		27
	.EQU	ECC0_EBR1_ERRBITEN26,		26
	.EQU	ECC0_EBR1_ERRBITEN25,		25
	.EQU	ECC0_EBR1_ERRBITEN24,		24
	.EQU	ECC0_EBR1_ERRBITEN23,		23
	.EQU	ECC0_EBR1_ERRBITEN22,		22
	.EQU	ECC0_EBR1_ERRBITEN21,		21
	.EQU	ECC0_EBR1_ERRBITEN20,		20
	.EQU	ECC0_EBR1_ERRBITEN19,		19
	.EQU	ECC0_EBR1_ERRBITEN18,		18
	.EQU	ECC0_EBR1_ERRBITEN17,		17
	.EQU	ECC0_EBR1_ERRBITEN16,		16
	.EQU	ECC0_EBR1_ERRBITEN15,		15
	.EQU	ECC0_EBR1_ERRBITEN14,		14
	.EQU	ECC0_EBR1_ERRBITEN13,		13
	.EQU	ECC0_EBR1_ERRBITEN12,		12
	.EQU	ECC0_EBR1_ERRBITEN11,		11
	.EQU	ECC0_EBR1_ERRBITEN10,		10
	.EQU	ECC0_EBR1_ERRBITEN9,		9
	.EQU	ECC0_EBR1_ERRBITEN8,		8
	.EQU	ECC0_EBR1_ERRBITEN7,		7
	.EQU	ECC0_EBR1_ERRBITEN6,		6
	.EQU	ECC0_EBR1_ERRBITEN5,		5
	.EQU	ECC0_EBR1_ERRBITEN4,		4
	.EQU	ECC0_EBR1_ERRBITEN3,		3
	.EQU	ECC0_EBR1_ERRBITEN2,		2
	.EQU	ECC0_EBR1_ERRBITEN1,		1
	.EQU	ECC0_EBR1_ERRBITEN0,		0
//  register-------------------------------------
	.EQU	ECC0_EBR2,		0x40001498
//  0x4000 1498  ECC0_EBR2   Bits-------------------------------------
	.EQU	ECC0_EBR2_ERRBITEN7,		7
	.EQU	ECC0_EBR2_ERRBITEN6,		6
	.EQU	ECC0_EBR2_ERRBITEN5,		5
	.EQU	ECC0_EBR2_ERRBITEN4,		4
	.EQU	ECC0_EBR2_ERRBITEN3,		3
	.EQU	ECC0_EBR2_ERRBITEN2,		2
	.EQU	ECC0_EBR2_ERRBITEN1,		1
	.EQU	ECC0_EBR2_ERRBITEN0,		0
//  register-------------------------------------
	.EQU	ECC1_CTL,		0x40001580
//  0x4000 1580  ECC1_CTL   Bits-------------------------------------
	.EQU	ECC1_CTL_MEM2IBTERRIC,		14
	.EQU	ECC1_CTL_MEM1BITERRIC,		13
	.EQU	ECC1_CTL_MEMERRIC,		12
	.EQU	ECC1_CTL_MEM2BITERRIE,		10
	.EQU	ECC1_CTL_MEM1BITERRIE,		9
	.EQU	ECC1_CTL_MEMERRIE,		8
	.EQU	ECC1_CTL_ECCTESTEN,		0
//  register-------------------------------------
	.EQU	ECC1_INT,		0x40001584
//  0x4000 1584  ECC1_INT   Bits-------------------------------------
	.EQU	ECC1_INT_MEM2BITERRIF,		2
	.EQU	ECC1_INT_MEM1BITERRIF,		1
	.EQU	ECC1_INT_MEMERRIF,		0
//  register-------------------------------------
	.EQU	ECC1_ERRADDR,	0x40001588
//  0x4000 1588  ECC1_ERRADDR   Bits-------------------------------------
	.EQU	ECC1_ERRADDR_ERRADDR31,		31
	.EQU	ECC1_ERRADDR_ERRADDR30,		30
	.EQU	ECC1_ERRADDR_ERRADDR29,		29
	.EQU	ECC1_ERRADDR_ERRADDR28,		28
	.EQU	ECC1_ERRADDR_ERRADDR27,		27
	.EQU	ECC1_ERRADDR_ERRADDR26,		26
	.EQU	ECC1_ERRADDR_ERRADDR25,		25
	.EQU	ECC1_ERRADDR_ERRADDR24,		24
	.EQU	ECC1_ERRADDR_ERRADDR23,		23
	.EQU	ECC1_ERRADDR_ERRADDR22,		22
	.EQU	ECC1_ERRADDR_ERRADDR21,		21
	.EQU	ECC1_ERRADDR_ERRADDR20,		20
	.EQU	ECC1_ERRADDR_ERRADDR19,		19
	.EQU	ECC1_ERRADDR_ERRADDR18,		18
	.EQU	ECC1_ERRADDR_ERRADDR17,		17
	.EQU	ECC1_ERRADDR_ERRADDR16,		16
	.EQU	ECC1_ERRADDR_ERRADDR15,		15
	.EQU	ECC1_ERRADDR_ERRADDR14,		14
	.EQU	ECC1_ERRADDR_ERRADDR13,		13
	.EQU	ECC1_ERRADDR_ERRADDR12,		12
	.EQU	ECC1_ERRADDR_ERRADDR11,		11
	.EQU	ECC1_ERRADDR_ERRADDR10,		10
	.EQU	ECC1_ERRADDR_ERRADDR9,		9
	.EQU	ECC1_ERRADDR_ERRADDR8,		8
	.EQU	ECC1_ERRADDR_ERRADDR7,		7
	.EQU	ECC1_ERRADDR_ERRADDR6,		6
	.EQU	ECC1_ERRADDR_ERRADDR5,		5
	.EQU	ECC1_ERRADDR_ERRADDR4,		4
	.EQU	ECC1_ERRADDR_ERRADDR3,		3
	.EQU	ECC1_ERRADDR_ERRADDR2,		2
	.EQU	ECC1_ERRADDR_ERRADDR1,		1
	.EQU	ECC1_ERRADDR_ERRADDR0,		0
//  register-------------------------------------
	.EQU	ECC1_EBR0,		0x40001590
//  0x4000 1590  ECC1_EBR0   Bits-------------------------------------
	.EQU	ECC1_EBR0_ERRBITEN31,		31
	.EQU	ECC1_EBR0_ERRBITEN30,		30
	.EQU	ECC1_EBR0_ERRBITEN29,		29
	.EQU	ECC1_EBR0_ERRBITEN28,		28
	.EQU	ECC1_EBR0_ERRBITEN27,		27
	.EQU	ECC1_EBR0_ERRBITEN26,		26
	.EQU	ECC1_EBR0_ERRBITEN25,		25
	.EQU	ECC1_EBR0_ERRBITEN24,		24
	.EQU	ECC1_EBR0_ERRBITEN23,		23
	.EQU	ECC1_EBR0_ERRBITEN22,		22
	.EQU	ECC1_EBR0_ERRBITEN21,		21
	.EQU	ECC1_EBR0_ERRBITEN20,		20
	.EQU	ECC1_EBR0_ERRBITEN19,		19
	.EQU	ECC1_EBR0_ERRBITEN18,		18
	.EQU	ECC1_EBR0_ERRBITEN17,		17
	.EQU	ECC1_EBR0_ERRBITEN16,		16
	.EQU	ECC1_EBR0_ERRBITEN15,		15
	.EQU	ECC1_EBR0_ERRBITEN14,		14
	.EQU	ECC1_EBR0_ERRBITEN13,		13
	.EQU	ECC1_EBR0_ERRBITEN12,		12
	.EQU	ECC1_EBR0_ERRBITEN11,		11
	.EQU	ECC1_EBR0_ERRBITEN10,		10
	.EQU	ECC1_EBR0_ERRBITEN9,		9
	.EQU	ECC1_EBR0_ERRBITEN8,		8
	.EQU	ECC1_EBR0_ERRBITEN7,		7
	.EQU	ECC1_EBR0_ERRBITEN6,		6
	.EQU	ECC1_EBR0_ERRBITEN5,		5
	.EQU	ECC1_EBR0_ERRBITEN4,		4
	.EQU	ECC1_EBR0_ERRBITEN3,		3
	.EQU	ECC1_EBR0_ERRBITEN2,		2
	.EQU	ECC1_EBR0_ERRBITEN1,		1
	.EQU	ECC1_EBR0_ERRBITEN0,		0
//  register-------------------------------------
	.EQU	ECC1_EBR1,		0x40001594
//  0x4000 1594  ECC1_EBR1   Bits-------------------------------------
	.EQU	ECC1_EBR1_ERRBITEN31,		31
	.EQU	ECC1_EBR1_ERRBITEN30,		30
	.EQU	ECC1_EBR1_ERRBITEN29,		29
	.EQU	ECC1_EBR1_ERRBITEN28,		28
	.EQU	ECC1_EBR1_ERRBITEN27,		27
	.EQU	ECC1_EBR1_ERRBITEN26,		26
	.EQU	ECC1_EBR1_ERRBITEN25,		25
	.EQU	ECC1_EBR1_ERRBITEN24,		24
	.EQU	ECC1_EBR1_ERRBITEN23,		23
	.EQU	ECC1_EBR1_ERRBITEN22,		22
	.EQU	ECC1_EBR1_ERRBITEN21,		21
	.EQU	ECC1_EBR1_ERRBITEN20,		20
	.EQU	ECC1_EBR1_ERRBITEN19,		19
	.EQU	ECC1_EBR1_ERRBITEN18,		18
	.EQU	ECC1_EBR1_ERRBITEN17,		17
	.EQU	ECC1_EBR1_ERRBITEN16,		16
	.EQU	ECC1_EBR1_ERRBITEN15,		15
	.EQU	ECC1_EBR1_ERRBITEN14,		14
	.EQU	ECC1_EBR1_ERRBITEN13,		13
	.EQU	ECC1_EBR1_ERRBITEN12,		12
	.EQU	ECC1_EBR1_ERRBITEN11,		11
	.EQU	ECC1_EBR1_ERRBITEN10,		10
	.EQU	ECC1_EBR1_ERRBITEN9,		9
	.EQU	ECC1_EBR1_ERRBITEN8,		8
	.EQU	ECC1_EBR1_ERRBITEN7,		7
	.EQU	ECC1_EBR1_ERRBITEN6,		6
	.EQU	ECC1_EBR1_ERRBITEN5,		5
	.EQU	ECC1_EBR1_ERRBITEN4,		4
	.EQU	ECC1_EBR1_ERRBITEN3,		3
	.EQU	ECC1_EBR1_ERRBITEN2,		2
	.EQU	ECC1_EBR1_ERRBITEN1,		1
	.EQU	ECC1_EBR1_ERRBITEN0,		0
//  register-------------------------------------
	.EQU	ECC1_EBR2,		0x40001598
//  0x4000 1598  ECC1_EBR2   Bits-------------------------------------
	.EQU	ECC1_EBR2_ERRBITEN7,		7
	.EQU	ECC1_EBR2_ERRBITEN6,		6
	.EQU	ECC1_EBR2_ERRBITEN5,		5
	.EQU	ECC1_EBR2_ERRBITEN4,		4
	.EQU	ECC1_EBR2_ERRBITEN3,		3
	.EQU	ECC1_EBR2_ERRBITEN2,		2
	.EQU	ECC1_EBR2_ERRBITEN1,		1
	.EQU	ECC1_EBR2_ERRBITEN0,		0
//  register-------------------------------------
	.EQU	CRC_CTL,		0x40001A80
//  0x4000 1A80  CRC_CTL   Bits-------------------------------------
	.EQU	CRC_CTL_DATAOUTSWAP1,		7
	.EQU	CRC_CTL_DATAOUTSWAP0,		6
	.EQU	CRC_CTL_DATAREV1,		5
	.EQU	CRC_CTL_DATAREV0,		4
	.EQU	CRC_CTL_DATASIZE1,		3
	.EQU	CRC_CTL_DATASIZE0,		2
	.EQU	CRC_CTL_RSET,		0
//  register-------------------------------------
	.EQU	CRC_DATA,		0x40001A84
//  0x4000 1A84  CRC_DATA   Bits-------------------------------------
	.EQU	CRC_DATA_CRCDATA31,		31
	.EQU	CRC_DATA_CRCDATA30,		30
	.EQU	CRC_DATA_CRCDATA29,		29
	.EQU	CRC_DATA_CRCDATA28,		28
	.EQU	CRC_DATA_CRCDATA27,		27
	.EQU	CRC_DATA_CRCDATA26,		26
	.EQU	CRC_DATA_CRCDATA25,		25
	.EQU	CRC_DATA_CRCDATA24,		24
	.EQU	CRC_DATA_CRCDATA23,		23
	.EQU	CRC_DATA_CRCDATA22,		22
	.EQU	CRC_DATA_CRCDATA21,		21
	.EQU	CRC_DATA_CRCDATA20,		20
	.EQU	CRC_DATA_CRCDATA19,		19
	.EQU	CRC_DATA_CRCDATA18,		18
	.EQU	CRC_DATA_CRCDATA17,		17
	.EQU	CRC_DATA_CRCDATA16,		16
	.EQU	CRC_DATA_CRCDATA15,		15
	.EQU	CRC_DATA_CRCDATA14,		14
	.EQU	CRC_DATA_CRCDATA13,		13
	.EQU	CRC_DATA_CRCDATA12,		12
	.EQU	CRC_DATA_CRCDATA11,		11
	.EQU	CRC_DATA_CRCDATA10,		10
	.EQU	CRC_DATA_CRCDATA9,		9
	.EQU	CRC_DATA_CRCDATA8,		8
	.EQU	CRC_DATA_CRCDATA7,		7
	.EQU	CRC_DATA_CRCDATA6,		6
	.EQU	CRC_DATA_CRCDATA5,		5
	.EQU	CRC_DATA_CRCDATA4,		4
	.EQU	CRC_DATA_CRCDATA3,		3
	.EQU	CRC_DATA_CRCDATA2,		2
	.EQU	CRC_DATA_CRCDATA1,		1
	.EQU	CRC_DATA_CRCDATA0,		0
//  register-------------------------------------
	.EQU	CRC_RSLT,		0x40001A88
//  0x4000 1A88  CRC_RSLT   Bits-------------------------------------
	.EQU	CRC_RSLT_CRCRSLT31,		31
	.EQU	CRC_RSLT_CRCRSLT30,		30
	.EQU	CRC_RSLT_CRCRSLT29,		29
	.EQU	CRC_RSLT_CRCRSLT28,		28
	.EQU	CRC_RSLT_CRCRSLT27,		27
	.EQU	CRC_RSLT_CRCRSLT26,		26
	.EQU	CRC_RSLT_CRCRSLT25,		25
	.EQU	CRC_RSLT_CRCRSLT24,		24
	.EQU	CRC_RSLT_CRCRSLT23,		23
	.EQU	CRC_RSLT_CRCRSLT22,		22
	.EQU	CRC_RSLT_CRCRSLT21,		21
	.EQU	CRC_RSLT_CRCRSLT20,		20
	.EQU	CRC_RSLT_CRCRSLT19,		19
	.EQU	CRC_RSLT_CRCRSLT18,		18
	.EQU	CRC_RSLT_CRCRSLT17,		17
	.EQU	CRC_RSLT_CRCRSLT16,		16
	.EQU	CRC_RSLT_CRCRSLT15,		15
	.EQU	CRC_RSLT_CRCRSLT14,		14
	.EQU	CRC_RSLT_CRCRSLT13,		13
	.EQU	CRC_RSLT_CRCRSLT12,		12
	.EQU	CRC_RSLT_CRCRSLT11,		11
	.EQU	CRC_RSLT_CRCRSLT10,		10
	.EQU	CRC_RSLT_CRCRSLT9,		9
	.EQU	CRC_RSLT_CRCRSLT8,		8
	.EQU	CRC_RSLT_CRCRSLT7,		7
	.EQU	CRC_RSLT_CRCRSLT6,		6
	.EQU	CRC_RSLT_CRCRSLT5,		5
	.EQU	CRC_RSLT_CRCRSLT4,		4
	.EQU	CRC_RSLT_CRCRSLT3,		3
	.EQU	CRC_RSLT_CRCRSLT2,		2
	.EQU	CRC_RSLT_CRCRSLT1,		1
	.EQU	CRC_RSLT_CRCRSLT0,		0
//  register-------------------------------------
	.EQU	CRC_INIT,		0x40001A8C
//  0x4000 1A8C  CRC_INIT   Bits-------------------------------------
	.EQU	CRC_INIT_CRCINIT31,		31
	.EQU	CRC_INIT_CRCINIT30,		30
	.EQU	CRC_INIT_CRCINIT29,		29
	.EQU	CRC_INIT_CRCINIT28,		28
	.EQU	CRC_INIT_CRCINIT27,		27
	.EQU	CRC_INIT_CRCINIT26,		26
	.EQU	CRC_INIT_CRCINIT25,		25
	.EQU	CRC_INIT_CRCINIT24,		24
	.EQU	CRC_INIT_CRCINIT23,		23
	.EQU	CRC_INIT_CRCINIT22,		22
	.EQU	CRC_INIT_CRCINIT21,		21
	.EQU	CRC_INIT_CRCINIT20,		20
	.EQU	CRC_INIT_CRCINIT19,		19
	.EQU	CRC_INIT_CRCINIT18,		18
	.EQU	CRC_INIT_CRCINIT17,		17
	.EQU	CRC_INIT_CRCINIT16,		16
	.EQU	CRC_INIT_CRCINIT15,		15
	.EQU	CRC_INIT_CRCINIT14,		14
	.EQU	CRC_INIT_CRCINIT13,		13
	.EQU	CRC_INIT_CRCINIT12,		12
	.EQU	CRC_INIT_CRCINIT11,		11
	.EQU	CRC_INIT_CRCINIT10,		10
	.EQU	CRC_INIT_CRCINIT9,		9
	.EQU	CRC_INIT_CRCINIT8,		8
	.EQU	CRC_INIT_CRCINIT7,		7
	.EQU	CRC_INIT_CRCINIT6,		6
	.EQU	CRC_INIT_CRCINIT5,		5
	.EQU	CRC_INIT_CRCINIT4,		4
	.EQU	CRC_INIT_CRCINIT3,		3
	.EQU	CRC_INIT_CRCINIT2,		2
	.EQU	CRC_INIT_CRCINIT1,		1
	.EQU	CRC_INIT_CRCINIT0,		0
//  register-------------------------------------
	.EQU	CRC_PLN,		0x40001A90
//  0x4000 1A90  CRC_PLN   Bits-------------------------------------
	.EQU	CRC_PLN_CRCPLN31,		31
	.EQU	CRC_PLN_CRCPLN30,		30
	.EQU	CRC_PLN_CRCPLN29,		29
	.EQU	CRC_PLN_CRCPLN28,		28
	.EQU	CRC_PLN_CRCPLN27,		27
	.EQU	CRC_PLN_CRCPLN26,		26
	.EQU	CRC_PLN_CRCPLN25,		25
	.EQU	CRC_PLN_CRCPLN24,		24
	.EQU	CRC_PLN_CRCPLN23,		23
	.EQU	CRC_PLN_CRCPLN22,		22
	.EQU	CRC_PLN_CRCPLN21,		21
	.EQU	CRC_PLN_CRCPLN20,		20
	.EQU	CRC_PLN_CRCPLN19,		19
	.EQU	CRC_PLN_CRCPLN18,		18
	.EQU	CRC_PLN_CRCPLN17,		17
	.EQU	CRC_PLN_CRCPLN16,		16
	.EQU	CRC_PLN_CRCPLN15,		15
	.EQU	CRC_PLN_CRCPLN14,		14
	.EQU	CRC_PLN_CRCPLN13,		13
	.EQU	CRC_PLN_CRCPLN12,		12
	.EQU	CRC_PLN_CRCPLN11,		11
	.EQU	CRC_PLN_CRCPLN10,		10
	.EQU	CRC_PLN_CRCPLN9,		9
	.EQU	CRC_PLN_CRCPLN8,		8
	.EQU	CRC_PLN_CRCPLN7,		7
	.EQU	CRC_PLN_CRCPLN6,		6
	.EQU	CRC_PLN_CRCPLN5,		5
	.EQU	CRC_PLN_CRCPLN4,		4
	.EQU	CRC_PLN_CRCPLN3,		3
	.EQU	CRC_PLN_CRCPLN2,		2
	.EQU	CRC_PLN_CRCPLN1,		1
	.EQU	CRC_PLN_CRCPLN0,		0
//  register-------------------------------------
	.EQU	CRC_RXOR,		0x40001A94
//  0x4000 1A94  CRC_RXOR   Bits-------------------------------------
	.EQU	CRC_RXOR_CRCRXOR31,		31
	.EQU	CRC_RXOR_CRCRXOR30,		30
	.EQU	CRC_RXOR_CRCRXOR29,		29
	.EQU	CRC_RXOR_CRCRXOR28,		28
	.EQU	CRC_RXOR_CRCRXOR27,		27
	.EQU	CRC_RXOR_CRCRXOR26,		26
	.EQU	CRC_RXOR_CRCRXOR25,		25
	.EQU	CRC_RXOR_CRCRXOR24,		24
	.EQU	CRC_RXOR_CRCRXOR23,		23
	.EQU	CRC_RXOR_CRCRXOR22,		22
	.EQU	CRC_RXOR_CRCRXOR21,		21
	.EQU	CRC_RXOR_CRCRXOR20,		20
	.EQU	CRC_RXOR_CRCRXOR19,		19
	.EQU	CRC_RXOR_CRCRXOR18,		18
	.EQU	CRC_RXOR_CRCRXOR17,		17
	.EQU	CRC_RXOR_CRCRXOR16,		16
	.EQU	CRC_RXOR_CRCRXOR15,		15
	.EQU	CRC_RXOR_CRCRXOR14,		14
	.EQU	CRC_RXOR_CRCRXOR13,		13
	.EQU	CRC_RXOR_CRCRXOR12,		12
	.EQU	CRC_RXOR_CRCRXOR11,		11
	.EQU	CRC_RXOR_CRCRXOR10,		10
	.EQU	CRC_RXOR_CRCRXOR9,		9
	.EQU	CRC_RXOR_CRCRXOR8,		8
	.EQU	CRC_RXOR_CRCRXOR7,		7
	.EQU	CRC_RXOR_CRCRXOR6,		6
	.EQU	CRC_RXOR_CRCRXOR5,		5
	.EQU	CRC_RXOR_CRCRXOR4,		4
	.EQU	CRC_RXOR_CRCRXOR3,		3
	.EQU	CRC_RXOR_CRCRXOR2,		2
	.EQU	CRC_RXOR_CRCRXOR1,		1
	.EQU	CRC_RXOR_CRCRXOR0,		0
//  register-------------------------------------
	.EQU	CRC_IDATA,		0x40001A98
//  0x4000 1A98  CRC_IDATA   Bits-------------------------------------
	.EQU	CRC_IDATA_CRCIDATA31,		31
	.EQU	CRC_IDATA_CRCIDATA30,		30
	.EQU	CRC_IDATA_CRCIDATA29,		29
	.EQU	CRC_IDATA_CRCIDATA28,		28
	.EQU	CRC_IDATA_CRCIDATA27,		27
	.EQU	CRC_IDATA_CRCIDATA26,		26
	.EQU	CRC_IDATA_CRCIDATA25,		25
	.EQU	CRC_IDATA_CRCIDATA24,		24
	.EQU	CRC_IDATA_CRCIDATA23,		23
	.EQU	CRC_IDATA_CRCIDATA22,		22
	.EQU	CRC_IDATA_CRCIDATA21,		21
	.EQU	CRC_IDATA_CRCIDATA20,		20
	.EQU	CRC_IDATA_CRCIDATA19,		19
	.EQU	CRC_IDATA_CRCIDATA18,		18
	.EQU	CRC_IDATA_CRCIDATA17,		17
	.EQU	CRC_IDATA_CRCIDATA16,		16
	.EQU	CRC_IDATA_CRCIDATA15,		15
	.EQU	CRC_IDATA_CRCIDATA14,		14
	.EQU	CRC_IDATA_CRCIDATA13,		13
	.EQU	CRC_IDATA_CRCIDATA12,		12
	.EQU	CRC_IDATA_CRCIDATA11,		11
	.EQU	CRC_IDATA_CRCIDATA10,		10
	.EQU	CRC_IDATA_CRCIDATA9,		9
	.EQU	CRC_IDATA_CRCIDATA8,		8
	.EQU	CRC_IDATA_CRCIDATA7,		7
	.EQU	CRC_IDATA_CRCIDATA6,		6
	.EQU	CRC_IDATA_CRCIDATA5,		5
	.EQU	CRC_IDATA_CRCIDATA4,		4
	.EQU	CRC_IDATA_CRCIDATA3,		3
	.EQU	CRC_IDATA_CRCIDATA2,		2
	.EQU	CRC_IDATA_CRCIDATA1,		1
	.EQU	CRC_IDATA_CRCIDATA0,		0
//  register-------------------------------------
	.EQU	CRC_TEMP,		0x40001A9C
//  0x4000 1A9C  CRC_TEMP   Bits-------------------------------------
	.EQU	CRC_TEMP_CRCTEMP31,		31
	.EQU	CRC_TEMP_CRCTEMP30,		30
	.EQU	CRC_TEMP_CRCTEMP29,		29
	.EQU	CRC_TEMP_CRCTEMP28,		28
	.EQU	CRC_TEMP_CRCTEMP27,		27
	.EQU	CRC_TEMP_CRCTEMP26,		26
	.EQU	CRC_TEMP_CRCTEMP25,		25
	.EQU	CRC_TEMP_CRCTEMP24,		24
	.EQU	CRC_TEMP_CRCTEMP23,		23
	.EQU	CRC_TEMP_CRCTEMP22,		22
	.EQU	CRC_TEMP_CRCTEMP21,		21
	.EQU	CRC_TEMP_CRCTEMP20,		20
	.EQU	CRC_TEMP_CRCTEMP19,		19
	.EQU	CRC_TEMP_CRCTEMP18,		18
	.EQU	CRC_TEMP_CRCTEMP17,		17
	.EQU	CRC_TEMP_CRCTEMP16,		16
	.EQU	CRC_TEMP_CRCTEMP15,		15
	.EQU	CRC_TEMP_CRCTEMP14,		14
	.EQU	CRC_TEMP_CRCTEMP13,		13
	.EQU	CRC_TEMP_CRCTEMP12,		12
	.EQU	CRC_TEMP_CRCTEMP11,		11
	.EQU	CRC_TEMP_CRCTEMP10,		10
	.EQU	CRC_TEMP_CRCTEMP9,		9
	.EQU	CRC_TEMP_CRCTEMP8,		8
	.EQU	CRC_TEMP_CRCTEMP7,		7
	.EQU	CRC_TEMP_CRCTEMP6,		6
	.EQU	CRC_TEMP_CRCTEMP5,		5
	.EQU	CRC_TEMP_CRCTEMP4,		4
	.EQU	CRC_TEMP_CRCTEMP3,		3
	.EQU	CRC_TEMP_CRCTEMP2,		2
	.EQU	CRC_TEMP_CRCTEMP1,		1
	.EQU	CRC_TEMP_CRCTEMP0,		0
//  register-------------------------------------
	.EQU	CMU_CTL,		0x40001400
//  0x4000 1400  CMU_CTL   Bits-------------------------------------
	.EQU	CMU_CTL_CH4REFIC,		15
	.EQU	CMU_CTL_CH3REFIC,		14
	.EQU	CMU_CTL_CH2REFIC,		13
	.EQU	CMU_CTL_CH1REFIC,		12
	.EQU	CMU_CTL_FLLIC4,		11
	.EQU	CMU_CTL_FHHIC4,		10
	.EQU	CMU_CTL_FLLIC3,		9
	.EQU	CMU_CTL_FHHIC3,		8
	.EQU	CMU_CTL_FLLIC2,		7
	.EQU	CMU_CTL_FHHIC2,		6
	.EQU	CMU_CTL_FLLIC1,		5
	.EQU	CMU_CTL_FHHIC1,		4
	.EQU	CMU_CTL_CMUEN4,		3
	.EQU	CMU_CTL_CMUEN3,		2
	.EQU	CMU_CTL_CMUEN2,		1
	.EQU	CMU_CTL_CMUEN1,		0
//  register-------------------------------------
	.EQU	CMU_INT,		0x40001404
//  0x4000 1404  CMU_INT   Bits-------------------------------------
	.EQU	CMU_INT_CH4REFIF,		23
	.EQU	CMU_INT_CH3REFIF,		22
	.EQU	CMU_INT_CH2REFIF,		21
	.EQU	CMU_INT_CH1REFIF,		20
	.EQU	CMU_INT_CH4REFIE,		19
	.EQU	CMU_INT_CH3REFIE,		18
	.EQU	CMU_INT_CH2REFIE,		17
	.EQU	CMU_INT_CH1REFIE,		16
	.EQU	CMU_INT_FLLIE4,		15
	.EQU	CMU_INT_FHHIE4,		14
	.EQU	CMU_INT_FLLIE3,		13
	.EQU	CMU_INT_FHHIE3,		12
	.EQU	CMU_INT_FLLIE2,		11
	.EQU	CMU_INT_FHHIE2,		10
	.EQU	CMU_INT_FLLIE1,		9
	.EQU	CMU_INT_FHHIE1,		8
	.EQU	CMU_INT_FLLIF4,		7
	.EQU	CMU_INT_FHHIF4,		6
	.EQU	CMU_INT_FLLIF3,		5
	.EQU	CMU_INT_FHHIF3,		4
	.EQU	CMU_INT_FLLIF2,		3
	.EQU	CMU_INT_FHHIF2,		2
	.EQU	CMU_INT_FLLIF1,		1
	.EQU	CMU_INT_FHHIF1,		0
//  register-------------------------------------
	.EQU	CMU_REFCNT1,	0x40001408
//  0x4000 1408  CMU_REFCNT1   Bits-------------------------------------
	.EQU	CMU_REFCNT1_REFCNT15,		15
	.EQU	CMU_REFCNT1_REFCNT14,		14
	.EQU	CMU_REFCNT1_REFCNT13,		13
	.EQU	CMU_REFCNT1_REFCNT12,		12
	.EQU	CMU_REFCNT1_REFCNT11,		11
	.EQU	CMU_REFCNT1_REFCNT10,		10
	.EQU	CMU_REFCNT1_REFCNT9,		9
	.EQU	CMU_REFCNT1_REFCNT8,		8
	.EQU	CMU_REFCNT1_REFCNT7,		7
	.EQU	CMU_REFCNT1_REFCNT6,		6
	.EQU	CMU_REFCNT1_REFCNT5,		5
	.EQU	CMU_REFCNT1_REFCNT4,		4
	.EQU	CMU_REFCNT1_REFCNT3,		3
	.EQU	CMU_REFCNT1_REFCNT2,		2
	.EQU	CMU_REFCNT1_REFCNT1,		1
	.EQU	CMU_REFCNT1_REFCNT0,		0
//  register-------------------------------------
	.EQU	CMU_HTC1,		0x4000140C
//  0x4000 140C  CMU_HTC1   Bits-------------------------------------
	.EQU	CMU_HTC1_HFREF23,		23
	.EQU	CMU_HTC1_HFREF22,		22
	.EQU	CMU_HTC1_HFREF21,		21
	.EQU	CMU_HTC1_HFREF20,		20
	.EQU	CMU_HTC1_HFREF19,		19
	.EQU	CMU_HTC1_HFREF18,		18
	.EQU	CMU_HTC1_HFREF17,		17
	.EQU	CMU_HTC1_HFREF16,		16
	.EQU	CMU_HTC1_HFREF15,		15
	.EQU	CMU_HTC1_HFREF14,		14
	.EQU	CMU_HTC1_HFREF13,		13
	.EQU	CMU_HTC1_HFREF12,		12
	.EQU	CMU_HTC1_HFREF11,		11
	.EQU	CMU_HTC1_HFREF10,		10
	.EQU	CMU_HTC1_HFREF9,		9
	.EQU	CMU_HTC1_HFREF8,		8
	.EQU	CMU_HTC1_HFREF7,		7
	.EQU	CMU_HTC1_HFREF6,		6
	.EQU	CMU_HTC1_HFREF5,		5
	.EQU	CMU_HTC1_HFREF4,		4
	.EQU	CMU_HTC1_HFREF3,		3
	.EQU	CMU_HTC1_HFREF2,		2
	.EQU	CMU_HTC1_HFREF1,		1
	.EQU	CMU_HTC1_HFREF0,		0
//  register-------------------------------------
	.EQU	CMU_LTC1,		0x40001410
//  0x4000 1410  CMU_LTC1   Bits-------------------------------------
	.EQU	CMU_LTC1_LFREF23,		23
	.EQU	CMU_LTC1_LFREF22,		22
	.EQU	CMU_LTC1_LFREF21,		21
	.EQU	CMU_LTC1_LFREF20,		20
	.EQU	CMU_LTC1_LFREF19,		19
	.EQU	CMU_LTC1_LFREF18,		18
	.EQU	CMU_LTC1_LFREF17,		17
	.EQU	CMU_LTC1_LFREF16,		16
	.EQU	CMU_LTC1_LFREF15,		15
	.EQU	CMU_LTC1_LFREF14,		14
	.EQU	CMU_LTC1_LFREF13,		13
	.EQU	CMU_LTC1_LFREF12,		12
	.EQU	CMU_LTC1_LFREF11,		11
	.EQU	CMU_LTC1_LFREF10,		10
	.EQU	CMU_LTC1_LFREF9,		9
	.EQU	CMU_LTC1_LFREF8,		8
	.EQU	CMU_LTC1_LFREF7,		7
	.EQU	CMU_LTC1_LFREF6,		6
	.EQU	CMU_LTC1_LFREF5,		5
	.EQU	CMU_LTC1_LFREF4,		4
	.EQU	CMU_LTC1_LFREF3,		3
	.EQU	CMU_LTC1_LFREF2,		2
	.EQU	CMU_LTC1_LFREF1,		1
	.EQU	CMU_LTC1_LFREF0,		0
//  register-------------------------------------
	.EQU	CMU_REFCNT2,	0x40001414
//  0x4000 1414  CMU_REFCNT2   Bits-------------------------------------
	.EQU	CMU_REFCNT2_REFCNT15,		15
	.EQU	CMU_REFCNT2_REFCNT14,		14
	.EQU	CMU_REFCNT2_REFCNT13,		13
	.EQU	CMU_REFCNT2_REFCNT12,		12
	.EQU	CMU_REFCNT2_REFCNT11,		11
	.EQU	CMU_REFCNT2_REFCNT10,		10
	.EQU	CMU_REFCNT2_REFCNT9,		9
	.EQU	CMU_REFCNT2_REFCNT8,		8
	.EQU	CMU_REFCNT2_REFCNT7,		7
	.EQU	CMU_REFCNT2_REFCNT6,		6
	.EQU	CMU_REFCNT2_REFCNT5,		5
	.EQU	CMU_REFCNT2_REFCNT4,		4
	.EQU	CMU_REFCNT2_REFCNT3,		3
	.EQU	CMU_REFCNT2_REFCNT2,		2
	.EQU	CMU_REFCNT2_REFCNT1,		1
	.EQU	CMU_REFCNT2_REFCNT0,		0
//  register-------------------------------------
	.EQU	CMU_HTC2,		0x40001418
//  0x4000 1418  CMU_HTC2   Bits-------------------------------------
	.EQU	CMU_HTC2_HFREF23,		23
	.EQU	CMU_HTC2_HFREF22,		22
	.EQU	CMU_HTC2_HFREF21,		21
	.EQU	CMU_HTC2_HFREF20,		20
	.EQU	CMU_HTC2_HFREF19,		19
	.EQU	CMU_HTC2_HFREF18,		18
	.EQU	CMU_HTC2_HFREF17,		17
	.EQU	CMU_HTC2_HFREF16,		16
	.EQU	CMU_HTC2_HFREF15,		15
	.EQU	CMU_HTC2_HFREF14,		14
	.EQU	CMU_HTC2_HFREF13,		13
	.EQU	CMU_HTC2_HFREF12,		12
	.EQU	CMU_HTC2_HFREF11,		11
	.EQU	CMU_HTC2_HFREF10,		10
	.EQU	CMU_HTC2_HFREF9,		9
	.EQU	CMU_HTC2_HFREF8,		8
	.EQU	CMU_HTC2_HFREF7,		7
	.EQU	CMU_HTC2_HFREF6,		6
	.EQU	CMU_HTC2_HFREF5,		5
	.EQU	CMU_HTC2_HFREF4,		4
	.EQU	CMU_HTC2_HFREF3,		3
	.EQU	CMU_HTC2_HFREF2,		2
	.EQU	CMU_HTC2_HFREF1,		1
	.EQU	CMU_HTC2_HFREF0,		0
//  register-------------------------------------
	.EQU	CMU_LTC2,		0x4000141C
//  0x4000 141C  CMU_LTC2   Bits-------------------------------------
	.EQU	CMU_LTC2_LFREF23,		23
	.EQU	CMU_LTC2_LFREF22,		22
	.EQU	CMU_LTC2_LFREF21,		21
	.EQU	CMU_LTC2_LFREF20,		20
	.EQU	CMU_LTC2_LFREF19,		19
	.EQU	CMU_LTC2_LFREF18,		18
	.EQU	CMU_LTC2_LFREF17,		17
	.EQU	CMU_LTC2_LFREF16,		16
	.EQU	CMU_LTC2_LFREF15,		15
	.EQU	CMU_LTC2_LFREF14,		14
	.EQU	CMU_LTC2_LFREF13,		13
	.EQU	CMU_LTC2_LFREF12,		12
	.EQU	CMU_LTC2_LFREF11,		11
	.EQU	CMU_LTC2_LFREF10,		10
	.EQU	CMU_LTC2_LFREF9,		9
	.EQU	CMU_LTC2_LFREF8,		8
	.EQU	CMU_LTC2_LFREF7,		7
	.EQU	CMU_LTC2_LFREF6,		6
	.EQU	CMU_LTC2_LFREF5,		5
	.EQU	CMU_LTC2_LFREF4,		4
	.EQU	CMU_LTC2_LFREF3,		3
	.EQU	CMU_LTC2_LFREF2,		2
	.EQU	CMU_LTC2_LFREF1,		1
	.EQU	CMU_LTC2_LFREF0,		0
//  register-------------------------------------
	.EQU	CMU_REFCNT3,	0x40001420
//  0x4000 1420  CMU_REFCNT3   Bits-------------------------------------
	.EQU	CMU_REFCNT3_REFCNT15,		15
	.EQU	CMU_REFCNT3_REFCNT14,		14
	.EQU	CMU_REFCNT3_REFCNT13,		13
	.EQU	CMU_REFCNT3_REFCNT12,		12
	.EQU	CMU_REFCNT3_REFCNT11,		11
	.EQU	CMU_REFCNT3_REFCNT10,		10
	.EQU	CMU_REFCNT3_REFCNT9,		9
	.EQU	CMU_REFCNT3_REFCNT8,		8
	.EQU	CMU_REFCNT3_REFCNT7,		7
	.EQU	CMU_REFCNT3_REFCNT6,		6
	.EQU	CMU_REFCNT3_REFCNT5,		5
	.EQU	CMU_REFCNT3_REFCNT4,		4
	.EQU	CMU_REFCNT3_REFCNT3,		3
	.EQU	CMU_REFCNT3_REFCNT2,		2
	.EQU	CMU_REFCNT3_REFCNT1,		1
	.EQU	CMU_REFCNT3_REFCNT0,		0
//  register-------------------------------------
	.EQU	CMU_HTC3,		0x40001424
//  0x4000 1424  CMU_HTC3   Bits-------------------------------------
	.EQU	CMU_HTC3_HFREF23,		23
	.EQU	CMU_HTC3_HFREF22,		22
	.EQU	CMU_HTC3_HFREF21,		21
	.EQU	CMU_HTC3_HFREF20,		20
	.EQU	CMU_HTC3_HFREF19,		19
	.EQU	CMU_HTC3_HFREF18,		18
	.EQU	CMU_HTC3_HFREF17,		17
	.EQU	CMU_HTC3_HFREF16,		16
	.EQU	CMU_HTC3_HFREF15,		15
	.EQU	CMU_HTC3_HFREF14,		14
	.EQU	CMU_HTC3_HFREF13,		13
	.EQU	CMU_HTC3_HFREF12,		12
	.EQU	CMU_HTC3_HFREF11,		11
	.EQU	CMU_HTC3_HFREF10,		10
	.EQU	CMU_HTC3_HFREF9,		9
	.EQU	CMU_HTC3_HFREF8,		8
	.EQU	CMU_HTC3_HFREF7,		7
	.EQU	CMU_HTC3_HFREF6,		6
	.EQU	CMU_HTC3_HFREF5,		5
	.EQU	CMU_HTC3_HFREF4,		4
	.EQU	CMU_HTC3_HFREF3,		3
	.EQU	CMU_HTC3_HFREF2,		2
	.EQU	CMU_HTC3_HFREF1,		1
	.EQU	CMU_HTC3_HFREF0,		0
//  register-------------------------------------
	.EQU	CMU_LTC3,		0x40001428
//  0x4000 1428  CMU_LTC3   Bits-------------------------------------
	.EQU	CMU_LTC3_LFREF23,		23
	.EQU	CMU_LTC3_LFREF22,		22
	.EQU	CMU_LTC3_LFREF21,		21
	.EQU	CMU_LTC3_LFREF20,		20
	.EQU	CMU_LTC3_LFREF19,		19
	.EQU	CMU_LTC3_LFREF18,		18
	.EQU	CMU_LTC3_LFREF17,		17
	.EQU	CMU_LTC3_LFREF16,		16
	.EQU	CMU_LTC3_LFREF15,		15
	.EQU	CMU_LTC3_LFREF14,		14
	.EQU	CMU_LTC3_LFREF13,		13
	.EQU	CMU_LTC3_LFREF12,		12
	.EQU	CMU_LTC3_LFREF11,		11
	.EQU	CMU_LTC3_LFREF10,		10
	.EQU	CMU_LTC3_LFREF9,		9
	.EQU	CMU_LTC3_LFREF8,		8
	.EQU	CMU_LTC3_LFREF7,		7
	.EQU	CMU_LTC3_LFREF6,		6
	.EQU	CMU_LTC3_LFREF5,		5
	.EQU	CMU_LTC3_LFREF4,		4
	.EQU	CMU_LTC3_LFREF3,		3
	.EQU	CMU_LTC3_LFREF2,		2
	.EQU	CMU_LTC3_LFREF1,		1
	.EQU	CMU_LTC3_LFREF0,		0
//  register-------------------------------------
	.EQU	CMU_REFCNT4,	0x4000142C
//  0x4000 142C  CMU_REFCNT4   Bits-------------------------------------
	.EQU	CMU_REFCNT4_REFCNT15,		15
	.EQU	CMU_REFCNT4_REFCNT14,		14
	.EQU	CMU_REFCNT4_REFCNT13,		13
	.EQU	CMU_REFCNT4_REFCNT12,		12
	.EQU	CMU_REFCNT4_REFCNT11,		11
	.EQU	CMU_REFCNT4_REFCNT10,		10
	.EQU	CMU_REFCNT4_REFCNT9,		9
	.EQU	CMU_REFCNT4_REFCNT8,		8
	.EQU	CMU_REFCNT4_REFCNT7,		7
	.EQU	CMU_REFCNT4_REFCNT6,		6
	.EQU	CMU_REFCNT4_REFCNT5,		5
	.EQU	CMU_REFCNT4_REFCNT4,		4
	.EQU	CMU_REFCNT4_REFCNT3,		3
	.EQU	CMU_REFCNT4_REFCNT2,		2
	.EQU	CMU_REFCNT4_REFCNT1,		1
	.EQU	CMU_REFCNT4_REFCNT0,		0
//  register-------------------------------------
	.EQU	CMU_HTC4,		0x40001430
//  0x4000 1430  CMU_HTC4   Bits-------------------------------------
	.EQU	CMU_HTC4_HFREF23,		23
	.EQU	CMU_HTC4_HFREF22,		22
	.EQU	CMU_HTC4_HFREF21,		21
	.EQU	CMU_HTC4_HFREF20,		20
	.EQU	CMU_HTC4_HFREF19,		19
	.EQU	CMU_HTC4_HFREF18,		18
	.EQU	CMU_HTC4_HFREF17,		17
	.EQU	CMU_HTC4_HFREF16,		16
	.EQU	CMU_HTC4_HFREF15,		15
	.EQU	CMU_HTC4_HFREF14,		14
	.EQU	CMU_HTC4_HFREF13,		13
	.EQU	CMU_HTC4_HFREF12,		12
	.EQU	CMU_HTC4_HFREF11,		11
	.EQU	CMU_HTC4_HFREF10,		10
	.EQU	CMU_HTC4_HFREF9,		9
	.EQU	CMU_HTC4_HFREF8,		8
	.EQU	CMU_HTC4_HFREF7,		7
	.EQU	CMU_HTC4_HFREF6,		6
	.EQU	CMU_HTC4_HFREF5,		5
	.EQU	CMU_HTC4_HFREF4,		4
	.EQU	CMU_HTC4_HFREF3,		3
	.EQU	CMU_HTC4_HFREF2,		2
	.EQU	CMU_HTC4_HFREF1,		1
	.EQU	CMU_HTC4_HFREF0,		0
//  register-------------------------------------
	.EQU	CMU_LTC4,		0x40001434
//  0x4000 1434  CMU_LTC4   Bits-------------------------------------
	.EQU	CMU_LTC4_LFREF23,		23
	.EQU	CMU_LTC4_LFREF22,		22
	.EQU	CMU_LTC4_LFREF21,		21
	.EQU	CMU_LTC4_LFREF20,		20
	.EQU	CMU_LTC4_LFREF19,		19
	.EQU	CMU_LTC4_LFREF18,		18
	.EQU	CMU_LTC4_LFREF17,		17
	.EQU	CMU_LTC4_LFREF16,		16
	.EQU	CMU_LTC4_LFREF15,		15
	.EQU	CMU_LTC4_LFREF14,		14
	.EQU	CMU_LTC4_LFREF13,		13
	.EQU	CMU_LTC4_LFREF12,		12
	.EQU	CMU_LTC4_LFREF11,		11
	.EQU	CMU_LTC4_LFREF10,		10
	.EQU	CMU_LTC4_LFREF9,		9
	.EQU	CMU_LTC4_LFREF8,		8
	.EQU	CMU_LTC4_LFREF7,		7
	.EQU	CMU_LTC4_LFREF6,		6
	.EQU	CMU_LTC4_LFREF5,		5
	.EQU	CMU_LTC4_LFREF4,		4
	.EQU	CMU_LTC4_LFREF3,		3
	.EQU	CMU_LTC4_LFREF2,		2
	.EQU	CMU_LTC4_LFREF1,		1
	.EQU	CMU_LTC4_LFREF0,		0
//  register-------------------------------------
	.EQU	CMU_INTFLAG,	0x40001438
//  0x4000 1438  CMU_INTFLAG   Bits-------------------------------------
	.EQU	CMU_INTFLAG_CH4INTREF,		3
	.EQU	CMU_INTFLAG_CH3INTREF,		2
	.EQU	CMU_INTFLAG_CH2INTREF,		1
	.EQU	CMU_INTFLAG_CH1INTREF,		0
//  register-------------------------------------
	.EQU	PM_CTL0,		0x40001080
//  0x4000 1080  PM_CTL0   Bits-------------------------------------
	.EQU	PM_CTL0_IOLATCH,		31
	.EQU	PM_CTL0_LSIEN,		29
	.EQU	PM_CTL0_MRBGEN,		25
	.EQU	PM_CTL0_LDO18EN,		24
	.EQU	PM_CTL0_LPBGON,		23
	.EQU	PM_CTL0_BKPREGCLR,		22
	.EQU	PM_CTL0_IWDTCLR,		21
	.EQU	PM_CTL0_IWDTRMSEL,		16
	.EQU	PM_CTL0_PORDELAYSEL,		15
	.EQU	PM_CTL0_VCOREPD12SELB,		12
	.EQU	PM_CTL0_HSIEN,		8
	.EQU	PM_CTL0_BKPWR,		7
	.EQU	PM_CTL0_OCALLOCK,		6
	.EQU	PM_CTL0_LPREN,		5
	.EQU	PM_CTL0_LPMS2,		2
	.EQU	PM_CTL0_LPMS1,		1
	.EQU	PM_CTL0_LPMS0,		0
//  register-------------------------------------
	.EQU	PM_CTL1,		0x40001084
//  0x4000 1084  PM_CTL1   Bits-------------------------------------
	.EQU	PM_CTL1_BOREN,		31
	.EQU	PM_CTL1_PVDWKEN,		30
	.EQU	PM_CTL1_P18OE,		27
	.EQU	PM_CTL1_MONV24EN,		19
	.EQU	PM_CTL1_MONV18EN,		17
	.EQU	PM_CTL1_MONV12EN,		16
	.EQU	PM_CTL1_RAMECCEN,		10
	.EQU	PM_CTL1_P18LVLSENB,		9
	.EQU	PM_CTL1_LPDEBUG,		8
	.EQU	PM_CTL1_VREFSEL1,		7
	.EQU	PM_CTL1_VREFSEL0,		6
	.EQU	PM_CTL1_VREFEN,		5
	.EQU	PM_CTL1_PVDS2,		4
	.EQU	PM_CTL1_PVDS1,		3
	.EQU	PM_CTL1_PVDS0,		2
	.EQU	PM_CTL1_LPRTYPE,		1
	.EQU	PM_CTL1_PVDEN,		0
//  register-------------------------------------
	.EQU	PM_STA0,		0x40001088
//  0x4000 1088  PM_STA0   Bits-------------------------------------
	.EQU	PM_STA0_RSTFC,		31
	.EQU	PM_STA0_IWDTF,		30
	.EQU	PM_STA0_WKPPINF,		28
	.EQU	PM_STA0_PORF,		27
	.EQU	PM_STA0_BORF,		26
	.EQU	PM_STA0_WSRSTF,		25
	.EQU	PM_STA0_PORIF,		24
	.EQU	PM_STA0_NRSTIF,		23
	.EQU	PM_STA0_BKPPORIF,		22
	.EQU	PM_STA0_LPRUNF,		1
	.EQU	PM_STA0_LPRSTA,		0
//  register-------------------------------------
	.EQU	PM_STA1,		0x4000108C
//  0x4000 108C  PM_STA1   Bits-------------------------------------
	.EQU	PM_STA1_WKP5STA,		31
	.EQU	PM_STA1_WKP4STA,		30
	.EQU	PM_STA1_WKP3STA,		29
	.EQU	PM_STA1_WKP2STA,		28
	.EQU	PM_STA1_WKP1STA,		27
	.EQU	PM_STA1_PMCIF,		26
	.EQU	PM_STA1_OVDIE,		25
	.EQU	PM_STA1_OVDIC,		24
	.EQU	PM_STA1_OVDIF,		23
	.EQU	PM_STA1_POR18FINISH,		22
	.EQU	PM_STA1_PMCERROR,		19
	.EQU	PM_STA1_WKP12STA,		17
	.EQU	PM_STA1_WKP11STA,		16
	.EQU	PM_STA1_WKP10STA,		15
	.EQU	PM_STA1_WKP9STA,		14
	.EQU	PM_STA1_WKP8STA,		13
	.EQU	PM_STA1_WKP7STA,		12
	.EQU	PM_STA1_WKP6STA,		11
	.EQU	PM_STA1_PVDSTA,		0
//  register-------------------------------------
	.EQU	PM_STAC,		0x40001090
//  0x4000 1090  PM_STAC   Bits-------------------------------------
	.EQU	PM_STAC_WKP5SC,		31
	.EQU	PM_STAC_WKP4SC,		30
	.EQU	PM_STAC_WKP3SC,		29
	.EQU	PM_STAC_WKP2SC,		28
	.EQU	PM_STAC_WKP1SC,		27
	.EQU	PM_STAC_PMCIC,		26
	.EQU	PM_STAC_INTLF4MEN,		24
	.EQU	PM_STAC_WKP12SC,		22
	.EQU	PM_STAC_WKP11SC,		21
	.EQU	PM_STAC_WKP10SC,		20
	.EQU	PM_STAC_WKP9SC,		19
	.EQU	PM_STAC_WKP8SC,		18
	.EQU	PM_STAC_WKP7SC,		17
	.EQU	PM_STAC_WKP6SC,		16
	.EQU	PM_STAC_WKP12P,		15
	.EQU	PM_STAC_WKP11P,		14
	.EQU	PM_STAC_WKP10P,		13
	.EQU	PM_STAC_WKP9P,		12
	.EQU	PM_STAC_WKP8P,		11
	.EQU	PM_STAC_WKP7P,		10
	.EQU	PM_STAC_WKP6P,		9
	.EQU	PM_STAC_WKP12EN,		8
	.EQU	PM_STAC_WKP11EN,		7
	.EQU	PM_STAC_WKP10EN,		6
	.EQU	PM_STAC_WKP9EN,		5
	.EQU	PM_STAC_WKP8EN,		4
	.EQU	PM_STAC_WKP7EN,		3
	.EQU	PM_STAC_WKP6EN,		2
	.EQU	PM_STAC_FVRMS1,		1
	.EQU	PM_STAC_FVRMS0,		0
//  register-------------------------------------
	.EQU	PM_CTL2,		0x40001094
//  0x4000 1094  PM_CTL2   Bits-------------------------------------
	.EQU	PM_CTL2_WKP5EN,		31
	.EQU	PM_CTL2_WKP4EN,		30
	.EQU	PM_CTL2_WKP3EN,		29
	.EQU	PM_CTL2_WKP2EN,		28
	.EQU	PM_CTL2_WKP1EN,		27
	.EQU	PM_CTL2_WKP5P,		26
	.EQU	PM_CTL2_WKP4P,		25
	.EQU	PM_CTL2_WKP3P,		24
	.EQU	PM_CTL2_WKP2P,		23
	.EQU	PM_CTL2_WKP1P,		22
	.EQU	PM_CTL2_PMCIE,		19
	.EQU	PM_CTL2_GPIOALPEN,		17
	.EQU	PM_CTL2_TTWKPEN,		15
	.EQU	PM_CTL2_TTPRESEN,		14
	.EQU	PM_CTL2_TTSEL1,		13
	.EQU	PM_CTL2_TTSEL0,		12
	.EQU	PM_CTL2_VF12EN,		11
	.EQU	PM_CTL2_VF12INF1,		10
	.EQU	PM_CTL2_VF12INF0,		9
	.EQU	PM_CTL2_POR18SHD,		8
	.EQU	PM_CTL2_EWMCLKLPEN,		6
	.EQU	PM_CTL2_EWDTLPEN,		2
//  register-------------------------------------
	.EQU	PM_CTL3,		0x400010AC
//  0x4000 10AC  PM_CTL3   Bits-------------------------------------
	.EQU	PM_CTL3_EN_COMP_VREF1V,		10
	.EQU	PM_CTL3_Flash_TP1,		9
	.EQU	PM_CTL3_Flash_TP0,		8
	.EQU	PM_CTL3_Flash_TPON,		7
	.EQU	PM_CTL3_BORWKPEN,		6
	.EQU	PM_CTL3_FVRCAPLESSMODE,		5
	.EQU	PM_CTL3_FVRCAPLESSEN,		4
	.EQU	PM_CTL3_BORHSEN,		3
	.EQU	PM_CTL3_BORSEL1,		2
	.EQU	PM_CTL3_BORSEL0,		1
	.EQU	PM_CTL3_PMIWDTEN,		0
//  register-------------------------------------
	.EQU	CANFD_CTL0,	0x40004000
//  0x4000 4000  CANFD_CTL0   Bits-------------------------------------
	.EQU	CANFD_CTL0_DISEN,		31
	.EQU	CANFD_CTL0_SETUPEN,		30
	.EQU	CANFD_CTL0_NRFEN,		29
	.EQU	CANFD_CTL0_HALT,		28
	.EQU	CANFD_CTL0_NOTRDY,		27
	.EQU	CANFD_CTL0_SOFTRST,		25
	.EQU	CANFD_CTL0_HALTACK,		24
	.EQU	CANFD_CTL0_SUPV,		23
	.EQU	CANFD_CTL0_WRNEN,		21
	.EQU	CANFD_CTL0_DMACK,		20
	.EQU	CANFD_CTL0_SRXDIS,		17
	.EQU	CANFD_CTL0_IRMQ,		16
	.EQU	CANFD_CTL0_LPRIOEN,		13
	.EQU	CANFD_CTL0_ATXEN,		12
	.EQU	CANFD_CTL0_FDEN,		11
	.EQU	CANFD_CTL0_NRFIDFM1,		9
	.EQU	CANFD_CTL0_NRFIDFM0,		8
	.EQU	CANFD_CTL0_MAXMB6,		6
	.EQU	CANFD_CTL0_MAXMB5,		5
	.EQU	CANFD_CTL0_MAXMB4,		4
	.EQU	CANFD_CTL0_MAXMB3,		3
	.EQU	CANFD_CTL0_MAXMB2,		2
	.EQU	CANFD_CTL0_MAXMB1,		1
	.EQU	CANFD_CTL0_MAXMB0,		0
//  register-------------------------------------
	.EQU	CANFD_CTL1,	0x40004004
//  0x4000 4004  CANFD_CTL1   Bits-------------------------------------
	.EQU	CANFD_CTL1_PRESDIV7,		31
	.EQU	CANFD_CTL1_PRESDIV6,		30
	.EQU	CANFD_CTL1_PRESDIV5,		29
	.EQU	CANFD_CTL1_PRESDIV4,		28
	.EQU	CANFD_CTL1_PRESDIV3,		27
	.EQU	CANFD_CTL1_PRESDIV2,		26
	.EQU	CANFD_CTL1_PRESDIV1,		25
	.EQU	CANFD_CTL1_PRESDIV0,		24
	.EQU	CANFD_CTL1_RJW1,		23
	.EQU	CANFD_CTL1_RJW0,		22
	.EQU	CANFD_CTL1_PSEG1_2,		21
	.EQU	CANFD_CTL1_PSEG1_1,		20
	.EQU	CANFD_CTL1_PSEG1_0,		19
	.EQU	CANFD_CTL1_PSEG2_2,		18
	.EQU	CANFD_CTL1_PSEG2_1,		17
	.EQU	CANFD_CTL1_PSEG2_0,		16
	.EQU	CANFD_CTL1_BOFFMSK,		15
	.EQU	CANFD_CTL1_ERRMSK,		14
	.EQU	CANFD_CTL1_CLKSRC,		13
	.EQU	CANFD_CTL1_LPB,		12
	.EQU	CANFD_CTL1_TWRNMSK,		11
	.EQU	CANFD_CTL1_RWRNMSK,		10
	.EQU	CANFD_CTL1_SMP,		7
	.EQU	CANFD_CTL1_BOFFREC,		6
	.EQU	CANFD_CTL1_TSYN,		5
	.EQU	CANFD_CTL1_LBUF,		4
	.EQU	CANFD_CTL1_LOM,		3
	.EQU	CANFD_CTL1_PROPSEG2,		2
	.EQU	CANFD_CTL1_PROPSEG1,		1
	.EQU	CANFD_CTL1_PROPSEG0,		0
//  register-------------------------------------
	.EQU	CANFD_TIMER,	0x40004008
//  0x4000 4008  CANFD_TIMER   Bits-------------------------------------
	.EQU	CANFD_TIMER_TIMER15,		15
	.EQU	CANFD_TIMER_TIMER14,		14
	.EQU	CANFD_TIMER_TIMER13,		13
	.EQU	CANFD_TIMER_TIMER12,		12
	.EQU	CANFD_TIMER_TIMER11,		11
	.EQU	CANFD_TIMER_TIMER10,		10
	.EQU	CANFD_TIMER_TIMER9,		9
	.EQU	CANFD_TIMER_TIMER8,		8
	.EQU	CANFD_TIMER_TIMER7,		7
	.EQU	CANFD_TIMER_TIMER6,		6
	.EQU	CANFD_TIMER_TIMER5,		5
	.EQU	CANFD_TIMER_TIMER4,		4
	.EQU	CANFD_TIMER_TIMER3,		3
	.EQU	CANFD_TIMER_TIMER2,		2
	.EQU	CANFD_TIMER_TIMER1,		1
	.EQU	CANFD_TIMER_TIMER0,		0
//  register-------------------------------------
	.EQU	CANFD_RXMGMASK,	0x40004010
//  0x4000 4010  CANFD_RXMGMASK   Bits-------------------------------------
	.EQU	CANFD_RXMGMASK_MG31,		31
	.EQU	CANFD_RXMGMASK_MG30,		30
	.EQU	CANFD_RXMGMASK_MG29,		29
	.EQU	CANFD_RXMGMASK_MG28,		28
	.EQU	CANFD_RXMGMASK_MG27,		27
	.EQU	CANFD_RXMGMASK_MG26,		26
	.EQU	CANFD_RXMGMASK_MG25,		25
	.EQU	CANFD_RXMGMASK_MG24,		24
	.EQU	CANFD_RXMGMASK_MG23,		23
	.EQU	CANFD_RXMGMASK_MG22,		22
	.EQU	CANFD_RXMGMASK_MG21,		21
	.EQU	CANFD_RXMGMASK_MG20,		20
	.EQU	CANFD_RXMGMASK_MG19,		19
	.EQU	CANFD_RXMGMASK_MG18,		18
	.EQU	CANFD_RXMGMASK_MG17,		17
	.EQU	CANFD_RXMGMASK_MG16,		16
	.EQU	CANFD_RXMGMASK_MG15,		15
	.EQU	CANFD_RXMGMASK_MG14,		14
	.EQU	CANFD_RXMGMASK_MG13,		13
	.EQU	CANFD_RXMGMASK_MG12,		12
	.EQU	CANFD_RXMGMASK_MG11,		11
	.EQU	CANFD_RXMGMASK_MG10,		10
	.EQU	CANFD_RXMGMASK_MG9,		9
	.EQU	CANFD_RXMGMASK_MG8,		8
	.EQU	CANFD_RXMGMASK_MG7,		7
	.EQU	CANFD_RXMGMASK_MG6,		6
	.EQU	CANFD_RXMGMASK_MG5,		5
	.EQU	CANFD_RXMGMASK_MG4,		4
	.EQU	CANFD_RXMGMASK_MG3,		3
	.EQU	CANFD_RXMGMASK_MG2,		2
	.EQU	CANFD_RXMGMASK_MG1,		1
	.EQU	CANFD_RXMGMASK_MG0,		0
//  register-------------------------------------
	.EQU	CANFD_ECR,		0x4000401C
//  0x4000 401C  CANFD_ECR   Bits-------------------------------------
	.EQU	CANFD_ECR_RXERRCNT_FD7,		31
	.EQU	CANFD_ECR_RXERRCNT_FD6,		30
	.EQU	CANFD_ECR_RXERRCNT_FD5,		29
	.EQU	CANFD_ECR_RXERRCNT_FD4,		28
	.EQU	CANFD_ECR_RXERRCNT_FD3,		27
	.EQU	CANFD_ECR_RXERRCNT_FD2,		26
	.EQU	CANFD_ECR_RXERRCNT_FD1,		25
	.EQU	CANFD_ECR_RXERRCNT_FD0,		24
	.EQU	CANFD_ECR_TXERRCNT_FD7,		23
	.EQU	CANFD_ECR_TXERRCNT_FD6,		22
	.EQU	CANFD_ECR_TXERRCNT_FD5,		21
	.EQU	CANFD_ECR_TXERRCNT_FD4,		20
	.EQU	CANFD_ECR_TXERRCNT_FD3,		19
	.EQU	CANFD_ECR_TXERRCNT_FD2,		18
	.EQU	CANFD_ECR_TXERRCNT_FD1,		17
	.EQU	CANFD_ECR_TXERRCNT_FD0,		16
	.EQU	CANFD_ECR_RXERRCNT7,		15
	.EQU	CANFD_ECR_RXERRCNT6,		14
	.EQU	CANFD_ECR_RXERRCNT5,		13
	.EQU	CANFD_ECR_RXERRCNT4,		12
	.EQU	CANFD_ECR_RXERRCNT3,		11
	.EQU	CANFD_ECR_RXERRCNT2,		10
	.EQU	CANFD_ECR_RXERRCNT1,		9
	.EQU	CANFD_ECR_RXERRCNT0,		8
	.EQU	CANFD_ECR_TXERRCNT7,		7
	.EQU	CANFD_ECR_TXERRCNT6,		6
	.EQU	CANFD_ECR_TXERRCNT5,		5
	.EQU	CANFD_ECR_TXERRCNT4,		4
	.EQU	CANFD_ECR_TXERRCNT3,		3
	.EQU	CANFD_ECR_TXERRCNT2,		2
	.EQU	CANFD_ECR_TXERRCNT1,		1
	.EQU	CANFD_ECR_TXERRCNT0,		0
//  register-------------------------------------
	.EQU	CANFD_ESR1,	0x40004020
//  0x4000 4020  CANFD_ESR1   Bits-------------------------------------
	.EQU	CANFD_ESR1_BIT1ERR_FD,		31
	.EQU	CANFD_ESR1_BIT0ERR_FD,		30
	.EQU	CANFD_ESR1_CRCERR_FD,		28
	.EQU	CANFD_ESR1_FRMERR_FD,		27
	.EQU	CANFD_ESR1_STFERR_FD,		26
	.EQU	CANFD_ESR1_ERROVER,		21
	.EQU	CANFD_ESR1_ERRINT_FD,		20
	.EQU	CANFD_ESR1_BOFFDONEINT,		19
	.EQU	CANFD_ESR1_SYNCH,		18
	.EQU	CANFD_ESR1_TWRNINT,		17
	.EQU	CANFD_ESR1_RWRNINT,		16
	.EQU	CANFD_ESR1_BIT1ERR,		15
	.EQU	CANFD_ESR1_BIT0ERR,		14
	.EQU	CANFD_ESR1_ACKERR,		13
	.EQU	CANFD_ESR1_CRCERR,		12
	.EQU	CANFD_ESR1_FRMERR,		11
	.EQU	CANFD_ESR1_STFERR,		10
	.EQU	CANFD_ESR1_TXWRN,		9
	.EQU	CANFD_ESR1_RXWRN,		8
	.EQU	CANFD_ESR1_IDLE,		7
	.EQU	CANFD_ESR1_TXSTA,		6
	.EQU	CANFD_ESR1_FLTCONF,		5
	.EQU	CANFD_ESR1_RXSTA,		3
	.EQU	CANFD_ESR1_BOFFINT,		2
	.EQU	CANFD_ESR1_ERRINT,		1
	.EQU	CANFD_ESR1_WAKINT,		0
//  register-------------------------------------
	.EQU	CANFD_IMASK2,	0x40004024
//  0x4000 4024  CANFD_IMASK2   Bits-------------------------------------
	.EQU	CANFD_IMASK2_BUF63TO32M31,		31
	.EQU	CANFD_IMASK2_BUF63TO32M30,		30
	.EQU	CANFD_IMASK2_BUF63TO32M29,		29
	.EQU	CANFD_IMASK2_BUF63TO32M28,		28
	.EQU	CANFD_IMASK2_BUF63TO32M27,		27
	.EQU	CANFD_IMASK2_BUF63TO32M26,		26
	.EQU	CANFD_IMASK2_BUF63TO32M25,		25
	.EQU	CANFD_IMASK2_BUF63TO32M24,		24
	.EQU	CANFD_IMASK2_BUF63TO32M23,		23
	.EQU	CANFD_IMASK2_BUF63TO32M22,		22
	.EQU	CANFD_IMASK2_BUF63TO32M21,		21
	.EQU	CANFD_IMASK2_BUF63TO32M20,		20
	.EQU	CANFD_IMASK2_BUF63TO32M19,		19
	.EQU	CANFD_IMASK2_BUF63TO32M18,		18
	.EQU	CANFD_IMASK2_BUF63TO32M17,		17
	.EQU	CANFD_IMASK2_BUF63TO32M16,		16
	.EQU	CANFD_IMASK2_BUF63TO32M15,		15
	.EQU	CANFD_IMASK2_BUF63TO32M14,		14
	.EQU	CANFD_IMASK2_BUF63TO32M13,		13
	.EQU	CANFD_IMASK2_BUF63TO32M12,		12
	.EQU	CANFD_IMASK2_BUF63TO32M11,		11
	.EQU	CANFD_IMASK2_BUF63TO32M10,		10
	.EQU	CANFD_IMASK2_BUF63TO32M9,		9
	.EQU	CANFD_IMASK2_BUF63TO32M8,		8
	.EQU	CANFD_IMASK2_BUF63TO32M7,		7
	.EQU	CANFD_IMASK2_BUF63TO32M6,		6
	.EQU	CANFD_IMASK2_BUF63TO32M5,		5
	.EQU	CANFD_IMASK2_BUF63TO32M4,		4
	.EQU	CANFD_IMASK2_BUF63TO32M3,		3
	.EQU	CANFD_IMASK2_BUF63TO32M2,		2
	.EQU	CANFD_IMASK2_BUF63TO32M1,		1
	.EQU	CANFD_IMASK2_BUF63TO32M0,		0
//  register-------------------------------------
	.EQU	CANFD_IMASK1,	0x40004028
//  0x4000 4028  CANFD_IMASK1   Bits-------------------------------------
	.EQU	CANFD_IMASK1_BUF31TO0M31,		31
	.EQU	CANFD_IMASK1_BUF31TO0M30,		30
	.EQU	CANFD_IMASK1_BUF31TO0M29,		29
	.EQU	CANFD_IMASK1_BUF31TO0M28,		28
	.EQU	CANFD_IMASK1_BUF31TO0M27,		27
	.EQU	CANFD_IMASK1_BUF31TO0M26,		26
	.EQU	CANFD_IMASK1_BUF31TO0M25,		25
	.EQU	CANFD_IMASK1_BUF31TO0M24,		24
	.EQU	CANFD_IMASK1_BUF31TO0M23,		23
	.EQU	CANFD_IMASK1_BUF31TO0M22,		22
	.EQU	CANFD_IMASK1_BUF31TO0M21,		21
	.EQU	CANFD_IMASK1_BUF31TO0M20,		20
	.EQU	CANFD_IMASK1_BUF31TO0M19,		19
	.EQU	CANFD_IMASK1_BUF31TO0M18,		18
	.EQU	CANFD_IMASK1_BUF31TO0M17,		17
	.EQU	CANFD_IMASK1_BUF31TO0M16,		16
	.EQU	CANFD_IMASK1_BUF31TO0M15,		15
	.EQU	CANFD_IMASK1_BUF31TO0M14,		14
	.EQU	CANFD_IMASK1_BUF31TO0M13,		13
	.EQU	CANFD_IMASK1_BUF31TO0M12,		12
	.EQU	CANFD_IMASK1_BUF31TO0M11,		11
	.EQU	CANFD_IMASK1_BUF31TO0M10,		10
	.EQU	CANFD_IMASK1_BUF31TO0M9,		9
	.EQU	CANFD_IMASK1_BUF31TO0M8,		8
	.EQU	CANFD_IMASK1_BUF31TO0M7,		7
	.EQU	CANFD_IMASK1_BUF31TO0M6,		6
	.EQU	CANFD_IMASK1_BUF31TO0M5,		5
	.EQU	CANFD_IMASK1_BUF31TO0M4,		4
	.EQU	CANFD_IMASK1_BUF31TO0M3,		3
	.EQU	CANFD_IMASK1_BUF31TO0M2,		2
	.EQU	CANFD_IMASK1_BUF31TO0M1,		1
	.EQU	CANFD_IMASK1_BUF31TO0M0,		0
//  register-------------------------------------
	.EQU	CANFD_IFLAG2,	0x4000402C
//  0x4000 402C  CANFD_IFLAG2   Bits-------------------------------------
	.EQU	CANFD_IFLAG2_BUF63TO32I31,		31
	.EQU	CANFD_IFLAG2_BUF63TO32I30,		30
	.EQU	CANFD_IFLAG2_BUF63TO32I29,		29
	.EQU	CANFD_IFLAG2_BUF63TO32I28,		28
	.EQU	CANFD_IFLAG2_BUF63TO32I27,		27
	.EQU	CANFD_IFLAG2_BUF63TO32I26,		26
	.EQU	CANFD_IFLAG2_BUF63TO32I25,		25
	.EQU	CANFD_IFLAG2_BUF63TO32I24,		24
	.EQU	CANFD_IFLAG2_BUF63TO32I23,		23
	.EQU	CANFD_IFLAG2_BUF63TO32I22,		22
	.EQU	CANFD_IFLAG2_BUF63TO32I21,		21
	.EQU	CANFD_IFLAG2_BUF63TO32I20,		20
	.EQU	CANFD_IFLAG2_BUF63TO32I19,		19
	.EQU	CANFD_IFLAG2_BUF63TO32I18,		18
	.EQU	CANFD_IFLAG2_BUF63TO32I17,		17
	.EQU	CANFD_IFLAG2_BUF63TO32I16,		16
	.EQU	CANFD_IFLAG2_BUF63TO32I15,		15
	.EQU	CANFD_IFLAG2_BUF63TO32I14,		14
	.EQU	CANFD_IFLAG2_BUF63TO32I13,		13
	.EQU	CANFD_IFLAG2_BUF63TO32I12,		12
	.EQU	CANFD_IFLAG2_BUF63TO32I11,		11
	.EQU	CANFD_IFLAG2_BUF63TO32I10,		10
	.EQU	CANFD_IFLAG2_BUF63TO32I9,		9
	.EQU	CANFD_IFLAG2_BUF63TO32I8,		8
	.EQU	CANFD_IFLAG2_BUF63TO32I7,		7
	.EQU	CANFD_IFLAG2_BUF63TO32I6,		6
	.EQU	CANFD_IFLAG2_BUF63TO32I5,		5
	.EQU	CANFD_IFLAG2_BUF63TO32I4,		4
	.EQU	CANFD_IFLAG2_BUF63TO32I3,		3
	.EQU	CANFD_IFLAG2_BUF63TO32I2,		2
	.EQU	CANFD_IFLAG2_BUF63TO32I1,		1
	.EQU	CANFD_IFLAG2_BUF63TO32I0,		0
//  register-------------------------------------
	.EQU	CANFD_IFLAG1,	0x40004030
//  0x4000 4030  CANFD_IFLAG1   Bits-------------------------------------
	.EQU	CANFD_IFLAG1_BUF31TO8I31,		31
	.EQU	CANFD_IFLAG1_BUF31TO8I30,		30
	.EQU	CANFD_IFLAG1_BUF31TO8I29,		29
	.EQU	CANFD_IFLAG1_BUF31TO8I28,		28
	.EQU	CANFD_IFLAG1_BUF31TO8I27,		27
	.EQU	CANFD_IFLAG1_BUF31TO8I26,		26
	.EQU	CANFD_IFLAG1_BUF31TO8I25,		25
	.EQU	CANFD_IFLAG1_BUF31TO8I24,		24
	.EQU	CANFD_IFLAG1_BUF31TO8I23,		23
	.EQU	CANFD_IFLAG1_BUF31TO8I22,		22
	.EQU	CANFD_IFLAG1_BUF31TO8I21,		21
	.EQU	CANFD_IFLAG1_BUF31TO8I20,		20
	.EQU	CANFD_IFLAG1_BUF31TO8I19,		19
	.EQU	CANFD_IFLAG1_BUF31TO8I18,		18
	.EQU	CANFD_IFLAG1_BUF31TO8I17,		17
	.EQU	CANFD_IFLAG1_BUF31TO8I16,		16
	.EQU	CANFD_IFLAG1_BUF31TO8I15,		15
	.EQU	CANFD_IFLAG1_BUF31TO8I14,		14
	.EQU	CANFD_IFLAG1_BUF31TO8I13,		13
	.EQU	CANFD_IFLAG1_BUF31TO8I12,		12
	.EQU	CANFD_IFLAG1_BUF31TO8I11,		11
	.EQU	CANFD_IFLAG1_BUF31TO8I10,		10
	.EQU	CANFD_IFLAG1_BUF31TO8I9,		9
	.EQU	CANFD_IFLAG1_BUF31TO8I8,		8
	.EQU	CANFD_IFLAG1_BUF7I,		7
	.EQU	CANFD_IFLAG1_BUF6I,		6
	.EQU	CANFD_IFLAG1_BUF5I,		5
	.EQU	CANFD_IFLAG1_BUF4TO1I3,		4
	.EQU	CANFD_IFLAG1_BUF4TO1I2,		3
	.EQU	CANFD_IFLAG1_BUF4TO1I1,		2
	.EQU	CANFD_IFLAG1_BUF4TO1I0,		1
	.EQU	CANFD_IFLAG1_BUF0I,		0
//  register-------------------------------------
	.EQU	CANFD_CTL2,	0x40004034
//  0x4000 4034  CANFD_CTL2   Bits-------------------------------------
	.EQU	CANFD_CTL2_ERRMSK_FAST,		31
	.EQU	CANFD_CTL2_BOFFDONEMSK,		30
	.EQU	CANFD_CTL2_ECRWRE,		29
	.EQU	CANFD_CTL2_WRMFRZ,		28
	.EQU	CANFD_CTL2_RFFN3,		27
	.EQU	CANFD_CTL2_RFFN2,		26
	.EQU	CANFD_CTL2_RFFN1,		25
	.EQU	CANFD_CTL2_RFFN0,		24
	.EQU	CANFD_CTL2_TASD4,		23
	.EQU	CANFD_CTL2_TASD3,		22
	.EQU	CANFD_CTL2_TASD2,		21
	.EQU	CANFD_CTL2_TASD1,		20
	.EQU	CANFD_CTL2_TASD0,		19
	.EQU	CANFD_CTL2_MRP,		18
	.EQU	CANFD_CTL2_RRS,		17
	.EQU	CANFD_CTL2_EACEN,		16
	.EQU	CANFD_CTL2_TIMER_SRC,		15
	.EQU	CANFD_CTL2_PREXCEN,		14
	.EQU	CANFD_CTL2_BTE,		13
	.EQU	CANFD_CTL2_ISOCANFDEN,		12
	.EQU	CANFD_CTL2_EDFLTDIS,		11
	.EQU	CANFD_CTL2_MBTSBASE1,		9
	.EQU	CANFD_CTL2_MBTSBASE0,		8
	.EQU	CANFD_CTL2_TSTAMPCAP1,		7
	.EQU	CANFD_CTL2_TSTAMPCAP0,		6
//  register-------------------------------------
	.EQU	CANFD_ESR2,	0x40004038
//  0x4000 4038  CANFD_ESR2   Bits-------------------------------------
	.EQU	CANFD_ESR2_TWAINT,		31
	.EQU	CANFD_ESR2_LPTM6,		22
	.EQU	CANFD_ESR2_LPTM5,		21
	.EQU	CANFD_ESR2_LPTM4,		20
	.EQU	CANFD_ESR2_LPTM3,		19
	.EQU	CANFD_ESR2_LPTM2,		18
	.EQU	CANFD_ESR2_LPTM1,		17
	.EQU	CANFD_ESR2_LPTM0,		16
	.EQU	CANFD_ESR2_TWAMSK,		15
	.EQU	CANFD_ESR2_VPS,		14
	.EQU	CANFD_ESR2_IMB,		13
//  register-------------------------------------
	.EQU	CANFD_CRCR,	0x40004044
//  0x4000 4044  CANFD_CRCR   Bits-------------------------------------
	.EQU	CANFD_CRCR_MBCRC6,		22
	.EQU	CANFD_CRCR_MBCRC5,		21
	.EQU	CANFD_CRCR_MBCRC4,		20
	.EQU	CANFD_CRCR_MBCRC3,		19
	.EQU	CANFD_CRCR_MBCRC2,		18
	.EQU	CANFD_CRCR_MBCRC1,		17
	.EQU	CANFD_CRCR_MBCRC0,		16
	.EQU	CANFD_CRCR_TXCRC14,		14
	.EQU	CANFD_CRCR_TXCRC13,		13
	.EQU	CANFD_CRCR_TXCRC12,		12
	.EQU	CANFD_CRCR_TXCRC11,		11
	.EQU	CANFD_CRCR_TXCRC10,		10
	.EQU	CANFD_CRCR_TXCRC9,		9
	.EQU	CANFD_CRCR_TXCRC8,		8
	.EQU	CANFD_CRCR_TXCRC7,		7
	.EQU	CANFD_CRCR_TXCRC6,		6
	.EQU	CANFD_CRCR_TXCRC5,		5
	.EQU	CANFD_CRCR_TXCRC4,		4
	.EQU	CANFD_CRCR_TXCRC3,		3
	.EQU	CANFD_CRCR_TXCRC2,		2
	.EQU	CANFD_CRCR_TXCRC1,		1
	.EQU	CANFD_CRCR_TXCRC0,		0
//  register-------------------------------------
	.EQU	CANFD_NRFGM,	0x40004048
//  0x4000 4048  CANFD_NRFGM   Bits-------------------------------------
	.EQU	CANFD_NRFGM_RFMG31,		31
	.EQU	CANFD_NRFGM_RFMG30,		30
	.EQU	CANFD_NRFGM_RFMG29,		29
	.EQU	CANFD_NRFGM_RFMG28,		28
	.EQU	CANFD_NRFGM_RFMG27,		27
	.EQU	CANFD_NRFGM_RFMG26,		26
	.EQU	CANFD_NRFGM_RFMG25,		25
	.EQU	CANFD_NRFGM_RFMG24,		24
	.EQU	CANFD_NRFGM_RFMG23,		23
	.EQU	CANFD_NRFGM_RFMG22,		22
	.EQU	CANFD_NRFGM_RFMG21,		21
	.EQU	CANFD_NRFGM_RFMG20,		20
	.EQU	CANFD_NRFGM_RFMG19,		19
	.EQU	CANFD_NRFGM_RFMG18,		18
	.EQU	CANFD_NRFGM_RFMG17,		17
	.EQU	CANFD_NRFGM_RFMG16,		16
	.EQU	CANFD_NRFGM_RFMG15,		15
	.EQU	CANFD_NRFGM_RFMG14,		14
	.EQU	CANFD_NRFGM_RFMG13,		13
	.EQU	CANFD_NRFGM_RFMG12,		12
	.EQU	CANFD_NRFGM_RFMG11,		11
	.EQU	CANFD_NRFGM_RFMG10,		10
	.EQU	CANFD_NRFGM_RFMG9,		9
	.EQU	CANFD_NRFGM_RFMG8,		8
	.EQU	CANFD_NRFGM_RFMG7,		7
	.EQU	CANFD_NRFGM_RFMG6,		6
	.EQU	CANFD_NRFGM_RFMG5,		5
	.EQU	CANFD_NRFGM_RFMG4,		4
	.EQU	CANFD_NRFGM_RFMG3,		3
	.EQU	CANFD_NRFGM_RFMG2,		2
	.EQU	CANFD_NRFGM_RFMG1,		1
	.EQU	CANFD_NRFGM_RFMG0,		0
//  register-------------------------------------
	.EQU	CANFD_NRFFIR,	0x4000404C
//  0x4000 404C  CANFD_NRFFIR   Bits-------------------------------------
	.EQU	CANFD_NRFFIR_IDFIR8,		8
	.EQU	CANFD_NRFFIR_IDFIR7,		7
	.EQU	CANFD_NRFFIR_IDFIR6,		6
	.EQU	CANFD_NRFFIR_IDFIR5,		5
	.EQU	CANFD_NRFFIR_IDFIR4,		4
	.EQU	CANFD_NRFFIR_IDFIR3,		3
	.EQU	CANFD_NRFFIR_IDFIR2,		2
	.EQU	CANFD_NRFFIR_IDFIR1,		1
	.EQU	CANFD_NRFFIR_IDFIR0,		0
//  register-------------------------------------
	.EQU	CANFD_CBT,		0x40004050
//  0x4000 4050  CANFD_CBT   Bits-------------------------------------
	.EQU	CANFD_CBT_BTF,		31
	.EQU	CANFD_CBT_EPRESDIV9,		30
	.EQU	CANFD_CBT_EPRESDIV8,		29
	.EQU	CANFD_CBT_EPRESDIV7,		28
	.EQU	CANFD_CBT_EPRESDIV6,		27
	.EQU	CANFD_CBT_EPRESDIV5,		26
	.EQU	CANFD_CBT_EPRESDIV4,		25
	.EQU	CANFD_CBT_EPRESDIV3,		24
	.EQU	CANFD_CBT_EPRESDIV2,		23
	.EQU	CANFD_CBT_EPRESDIV1,		22
	.EQU	CANFD_CBT_EPRESDIV0,		21
	.EQU	CANFD_CBT_ERJW4,		20
	.EQU	CANFD_CBT_ERJW3,		19
	.EQU	CANFD_CBT_ERJW2,		18
	.EQU	CANFD_CBT_ERJW1,		17
	.EQU	CANFD_CBT_ERJW0,		16
	.EQU	CANFD_CBT_EPROPSEG5,		15
	.EQU	CANFD_CBT_EPROPSEG4,		14
	.EQU	CANFD_CBT_EPROPSEG3,		13
	.EQU	CANFD_CBT_EPROPSEG2,		12
	.EQU	CANFD_CBT_EPROPSEG1,		11
	.EQU	CANFD_CBT_EPROPSEG0,		10
	.EQU	CANFD_CBT_EPSEG1_4,		9
	.EQU	CANFD_CBT_EPSEG1_3,		8
	.EQU	CANFD_CBT_EPSEG1_2,		7
	.EQU	CANFD_CBT_EPSEG1_1,		6
	.EQU	CANFD_CBT_EPSEG1_0,		5
	.EQU	CANFD_CBT_EPSEG2_4,		4
	.EQU	CANFD_CBT_EPSEG2_3,		3
	.EQU	CANFD_CBT_EPSEG2_2,		2
	.EQU	CANFD_CBT_EPSEG2_1,		1
	.EQU	CANFD_CBT_EPSEG2_0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR0,	0x40004880
//  0x4000 4880  CANFD_RXIMR0   Bits-------------------------------------
	.EQU	CANFD_RXIMR0_IM31,		31
	.EQU	CANFD_RXIMR0_IM30,		30
	.EQU	CANFD_RXIMR0_IM29,		29
	.EQU	CANFD_RXIMR0_IM28,		28
	.EQU	CANFD_RXIMR0_IM27,		27
	.EQU	CANFD_RXIMR0_IM26,		26
	.EQU	CANFD_RXIMR0_IM25,		25
	.EQU	CANFD_RXIMR0_IM24,		24
	.EQU	CANFD_RXIMR0_IM23,		23
	.EQU	CANFD_RXIMR0_IM22,		22
	.EQU	CANFD_RXIMR0_IM21,		21
	.EQU	CANFD_RXIMR0_IM20,		20
	.EQU	CANFD_RXIMR0_IM19,		19
	.EQU	CANFD_RXIMR0_IM18,		18
	.EQU	CANFD_RXIMR0_IM17,		17
	.EQU	CANFD_RXIMR0_IM16,		16
	.EQU	CANFD_RXIMR0_IM15,		15
	.EQU	CANFD_RXIMR0_IM14,		14
	.EQU	CANFD_RXIMR0_IM13,		13
	.EQU	CANFD_RXIMR0_IM12,		12
	.EQU	CANFD_RXIMR0_IM11,		11
	.EQU	CANFD_RXIMR0_IM10,		10
	.EQU	CANFD_RXIMR0_IM9,		9
	.EQU	CANFD_RXIMR0_IM8,		8
	.EQU	CANFD_RXIMR0_IM7,		7
	.EQU	CANFD_RXIMR0_IM6,		6
	.EQU	CANFD_RXIMR0_IM5,		5
	.EQU	CANFD_RXIMR0_IM4,		4
	.EQU	CANFD_RXIMR0_IM3,		3
	.EQU	CANFD_RXIMR0_IM2,		2
	.EQU	CANFD_RXIMR0_IM1,		1
	.EQU	CANFD_RXIMR0_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR1,	0x40004884
//  0x4000 4884  CANFD_RXIMR1   Bits-------------------------------------
	.EQU	CANFD_RXIMR1_IM31,		31
	.EQU	CANFD_RXIMR1_IM30,		30
	.EQU	CANFD_RXIMR1_IM29,		29
	.EQU	CANFD_RXIMR1_IM28,		28
	.EQU	CANFD_RXIMR1_IM27,		27
	.EQU	CANFD_RXIMR1_IM26,		26
	.EQU	CANFD_RXIMR1_IM25,		25
	.EQU	CANFD_RXIMR1_IM24,		24
	.EQU	CANFD_RXIMR1_IM23,		23
	.EQU	CANFD_RXIMR1_IM22,		22
	.EQU	CANFD_RXIMR1_IM21,		21
	.EQU	CANFD_RXIMR1_IM20,		20
	.EQU	CANFD_RXIMR1_IM19,		19
	.EQU	CANFD_RXIMR1_IM18,		18
	.EQU	CANFD_RXIMR1_IM17,		17
	.EQU	CANFD_RXIMR1_IM16,		16
	.EQU	CANFD_RXIMR1_IM15,		15
	.EQU	CANFD_RXIMR1_IM14,		14
	.EQU	CANFD_RXIMR1_IM13,		13
	.EQU	CANFD_RXIMR1_IM12,		12
	.EQU	CANFD_RXIMR1_IM11,		11
	.EQU	CANFD_RXIMR1_IM10,		10
	.EQU	CANFD_RXIMR1_IM9,		9
	.EQU	CANFD_RXIMR1_IM8,		8
	.EQU	CANFD_RXIMR1_IM7,		7
	.EQU	CANFD_RXIMR1_IM6,		6
	.EQU	CANFD_RXIMR1_IM5,		5
	.EQU	CANFD_RXIMR1_IM4,		4
	.EQU	CANFD_RXIMR1_IM3,		3
	.EQU	CANFD_RXIMR1_IM2,		2
	.EQU	CANFD_RXIMR1_IM1,		1
	.EQU	CANFD_RXIMR1_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR2,	0x40004888
//  0x4000 4888  CANFD_RXIMR2   Bits-------------------------------------
	.EQU	CANFD_RXIMR2_IM31,		31
	.EQU	CANFD_RXIMR2_IM30,		30
	.EQU	CANFD_RXIMR2_IM29,		29
	.EQU	CANFD_RXIMR2_IM28,		28
	.EQU	CANFD_RXIMR2_IM27,		27
	.EQU	CANFD_RXIMR2_IM26,		26
	.EQU	CANFD_RXIMR2_IM25,		25
	.EQU	CANFD_RXIMR2_IM24,		24
	.EQU	CANFD_RXIMR2_IM23,		23
	.EQU	CANFD_RXIMR2_IM22,		22
	.EQU	CANFD_RXIMR2_IM21,		21
	.EQU	CANFD_RXIMR2_IM20,		20
	.EQU	CANFD_RXIMR2_IM19,		19
	.EQU	CANFD_RXIMR2_IM18,		18
	.EQU	CANFD_RXIMR2_IM17,		17
	.EQU	CANFD_RXIMR2_IM16,		16
	.EQU	CANFD_RXIMR2_IM15,		15
	.EQU	CANFD_RXIMR2_IM14,		14
	.EQU	CANFD_RXIMR2_IM13,		13
	.EQU	CANFD_RXIMR2_IM12,		12
	.EQU	CANFD_RXIMR2_IM11,		11
	.EQU	CANFD_RXIMR2_IM10,		10
	.EQU	CANFD_RXIMR2_IM9,		9
	.EQU	CANFD_RXIMR2_IM8,		8
	.EQU	CANFD_RXIMR2_IM7,		7
	.EQU	CANFD_RXIMR2_IM6,		6
	.EQU	CANFD_RXIMR2_IM5,		5
	.EQU	CANFD_RXIMR2_IM4,		4
	.EQU	CANFD_RXIMR2_IM3,		3
	.EQU	CANFD_RXIMR2_IM2,		2
	.EQU	CANFD_RXIMR2_IM1,		1
	.EQU	CANFD_RXIMR2_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR3,	0x4000488C
//  0x4000 488C  CANFD_RXIMR3   Bits-------------------------------------
	.EQU	CANFD_RXIMR3_IM31,		31
	.EQU	CANFD_RXIMR3_IM30,		30
	.EQU	CANFD_RXIMR3_IM29,		29
	.EQU	CANFD_RXIMR3_IM28,		28
	.EQU	CANFD_RXIMR3_IM27,		27
	.EQU	CANFD_RXIMR3_IM26,		26
	.EQU	CANFD_RXIMR3_IM25,		25
	.EQU	CANFD_RXIMR3_IM24,		24
	.EQU	CANFD_RXIMR3_IM23,		23
	.EQU	CANFD_RXIMR3_IM22,		22
	.EQU	CANFD_RXIMR3_IM21,		21
	.EQU	CANFD_RXIMR3_IM20,		20
	.EQU	CANFD_RXIMR3_IM19,		19
	.EQU	CANFD_RXIMR3_IM18,		18
	.EQU	CANFD_RXIMR3_IM17,		17
	.EQU	CANFD_RXIMR3_IM16,		16
	.EQU	CANFD_RXIMR3_IM15,		15
	.EQU	CANFD_RXIMR3_IM14,		14
	.EQU	CANFD_RXIMR3_IM13,		13
	.EQU	CANFD_RXIMR3_IM12,		12
	.EQU	CANFD_RXIMR3_IM11,		11
	.EQU	CANFD_RXIMR3_IM10,		10
	.EQU	CANFD_RXIMR3_IM9,		9
	.EQU	CANFD_RXIMR3_IM8,		8
	.EQU	CANFD_RXIMR3_IM7,		7
	.EQU	CANFD_RXIMR3_IM6,		6
	.EQU	CANFD_RXIMR3_IM5,		5
	.EQU	CANFD_RXIMR3_IM4,		4
	.EQU	CANFD_RXIMR3_IM3,		3
	.EQU	CANFD_RXIMR3_IM2,		2
	.EQU	CANFD_RXIMR3_IM1,		1
	.EQU	CANFD_RXIMR3_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR4,	0x40004890
//  0x4000 4890  CANFD_RXIMR4   Bits-------------------------------------
	.EQU	CANFD_RXIMR4_IM31,		31
	.EQU	CANFD_RXIMR4_IM30,		30
	.EQU	CANFD_RXIMR4_IM29,		29
	.EQU	CANFD_RXIMR4_IM28,		28
	.EQU	CANFD_RXIMR4_IM27,		27
	.EQU	CANFD_RXIMR4_IM26,		26
	.EQU	CANFD_RXIMR4_IM25,		25
	.EQU	CANFD_RXIMR4_IM24,		24
	.EQU	CANFD_RXIMR4_IM23,		23
	.EQU	CANFD_RXIMR4_IM22,		22
	.EQU	CANFD_RXIMR4_IM21,		21
	.EQU	CANFD_RXIMR4_IM20,		20
	.EQU	CANFD_RXIMR4_IM19,		19
	.EQU	CANFD_RXIMR4_IM18,		18
	.EQU	CANFD_RXIMR4_IM17,		17
	.EQU	CANFD_RXIMR4_IM16,		16
	.EQU	CANFD_RXIMR4_IM15,		15
	.EQU	CANFD_RXIMR4_IM14,		14
	.EQU	CANFD_RXIMR4_IM13,		13
	.EQU	CANFD_RXIMR4_IM12,		12
	.EQU	CANFD_RXIMR4_IM11,		11
	.EQU	CANFD_RXIMR4_IM10,		10
	.EQU	CANFD_RXIMR4_IM9,		9
	.EQU	CANFD_RXIMR4_IM8,		8
	.EQU	CANFD_RXIMR4_IM7,		7
	.EQU	CANFD_RXIMR4_IM6,		6
	.EQU	CANFD_RXIMR4_IM5,		5
	.EQU	CANFD_RXIMR4_IM4,		4
	.EQU	CANFD_RXIMR4_IM3,		3
	.EQU	CANFD_RXIMR4_IM2,		2
	.EQU	CANFD_RXIMR4_IM1,		1
	.EQU	CANFD_RXIMR4_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR5,	0x40004894
//  0x4000 4894  CANFD_RXIMR5   Bits-------------------------------------
	.EQU	CANFD_RXIMR5_IM31,		31
	.EQU	CANFD_RXIMR5_IM30,		30
	.EQU	CANFD_RXIMR5_IM29,		29
	.EQU	CANFD_RXIMR5_IM28,		28
	.EQU	CANFD_RXIMR5_IM27,		27
	.EQU	CANFD_RXIMR5_IM26,		26
	.EQU	CANFD_RXIMR5_IM25,		25
	.EQU	CANFD_RXIMR5_IM24,		24
	.EQU	CANFD_RXIMR5_IM23,		23
	.EQU	CANFD_RXIMR5_IM22,		22
	.EQU	CANFD_RXIMR5_IM21,		21
	.EQU	CANFD_RXIMR5_IM20,		20
	.EQU	CANFD_RXIMR5_IM19,		19
	.EQU	CANFD_RXIMR5_IM18,		18
	.EQU	CANFD_RXIMR5_IM17,		17
	.EQU	CANFD_RXIMR5_IM16,		16
	.EQU	CANFD_RXIMR5_IM15,		15
	.EQU	CANFD_RXIMR5_IM14,		14
	.EQU	CANFD_RXIMR5_IM13,		13
	.EQU	CANFD_RXIMR5_IM12,		12
	.EQU	CANFD_RXIMR5_IM11,		11
	.EQU	CANFD_RXIMR5_IM10,		10
	.EQU	CANFD_RXIMR5_IM9,		9
	.EQU	CANFD_RXIMR5_IM8,		8
	.EQU	CANFD_RXIMR5_IM7,		7
	.EQU	CANFD_RXIMR5_IM6,		6
	.EQU	CANFD_RXIMR5_IM5,		5
	.EQU	CANFD_RXIMR5_IM4,		4
	.EQU	CANFD_RXIMR5_IM3,		3
	.EQU	CANFD_RXIMR5_IM2,		2
	.EQU	CANFD_RXIMR5_IM1,		1
	.EQU	CANFD_RXIMR5_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR6,	0x40004898
//  0x4000 4898  CANFD_RXIMR6   Bits-------------------------------------
	.EQU	CANFD_RXIMR6_IM31,		31
	.EQU	CANFD_RXIMR6_IM30,		30
	.EQU	CANFD_RXIMR6_IM29,		29
	.EQU	CANFD_RXIMR6_IM28,		28
	.EQU	CANFD_RXIMR6_IM27,		27
	.EQU	CANFD_RXIMR6_IM26,		26
	.EQU	CANFD_RXIMR6_IM25,		25
	.EQU	CANFD_RXIMR6_IM24,		24
	.EQU	CANFD_RXIMR6_IM23,		23
	.EQU	CANFD_RXIMR6_IM22,		22
	.EQU	CANFD_RXIMR6_IM21,		21
	.EQU	CANFD_RXIMR6_IM20,		20
	.EQU	CANFD_RXIMR6_IM19,		19
	.EQU	CANFD_RXIMR6_IM18,		18
	.EQU	CANFD_RXIMR6_IM17,		17
	.EQU	CANFD_RXIMR6_IM16,		16
	.EQU	CANFD_RXIMR6_IM15,		15
	.EQU	CANFD_RXIMR6_IM14,		14
	.EQU	CANFD_RXIMR6_IM13,		13
	.EQU	CANFD_RXIMR6_IM12,		12
	.EQU	CANFD_RXIMR6_IM11,		11
	.EQU	CANFD_RXIMR6_IM10,		10
	.EQU	CANFD_RXIMR6_IM9,		9
	.EQU	CANFD_RXIMR6_IM8,		8
	.EQU	CANFD_RXIMR6_IM7,		7
	.EQU	CANFD_RXIMR6_IM6,		6
	.EQU	CANFD_RXIMR6_IM5,		5
	.EQU	CANFD_RXIMR6_IM4,		4
	.EQU	CANFD_RXIMR6_IM3,		3
	.EQU	CANFD_RXIMR6_IM2,		2
	.EQU	CANFD_RXIMR6_IM1,		1
	.EQU	CANFD_RXIMR6_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR7,	0x4000489C
//  0x4000 489C  CANFD_RXIMR7   Bits-------------------------------------
	.EQU	CANFD_RXIMR7_IM31,		31
	.EQU	CANFD_RXIMR7_IM30,		30
	.EQU	CANFD_RXIMR7_IM29,		29
	.EQU	CANFD_RXIMR7_IM28,		28
	.EQU	CANFD_RXIMR7_IM27,		27
	.EQU	CANFD_RXIMR7_IM26,		26
	.EQU	CANFD_RXIMR7_IM25,		25
	.EQU	CANFD_RXIMR7_IM24,		24
	.EQU	CANFD_RXIMR7_IM23,		23
	.EQU	CANFD_RXIMR7_IM22,		22
	.EQU	CANFD_RXIMR7_IM21,		21
	.EQU	CANFD_RXIMR7_IM20,		20
	.EQU	CANFD_RXIMR7_IM19,		19
	.EQU	CANFD_RXIMR7_IM18,		18
	.EQU	CANFD_RXIMR7_IM17,		17
	.EQU	CANFD_RXIMR7_IM16,		16
	.EQU	CANFD_RXIMR7_IM15,		15
	.EQU	CANFD_RXIMR7_IM14,		14
	.EQU	CANFD_RXIMR7_IM13,		13
	.EQU	CANFD_RXIMR7_IM12,		12
	.EQU	CANFD_RXIMR7_IM11,		11
	.EQU	CANFD_RXIMR7_IM10,		10
	.EQU	CANFD_RXIMR7_IM9,		9
	.EQU	CANFD_RXIMR7_IM8,		8
	.EQU	CANFD_RXIMR7_IM7,		7
	.EQU	CANFD_RXIMR7_IM6,		6
	.EQU	CANFD_RXIMR7_IM5,		5
	.EQU	CANFD_RXIMR7_IM4,		4
	.EQU	CANFD_RXIMR7_IM3,		3
	.EQU	CANFD_RXIMR7_IM2,		2
	.EQU	CANFD_RXIMR7_IM1,		1
	.EQU	CANFD_RXIMR7_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR8,	0x400048A0
//  0x4000 48A0  CANFD_RXIMR8   Bits-------------------------------------
	.EQU	CANFD_RXIMR8_IM31,		31
	.EQU	CANFD_RXIMR8_IM30,		30
	.EQU	CANFD_RXIMR8_IM29,		29
	.EQU	CANFD_RXIMR8_IM28,		28
	.EQU	CANFD_RXIMR8_IM27,		27
	.EQU	CANFD_RXIMR8_IM26,		26
	.EQU	CANFD_RXIMR8_IM25,		25
	.EQU	CANFD_RXIMR8_IM24,		24
	.EQU	CANFD_RXIMR8_IM23,		23
	.EQU	CANFD_RXIMR8_IM22,		22
	.EQU	CANFD_RXIMR8_IM21,		21
	.EQU	CANFD_RXIMR8_IM20,		20
	.EQU	CANFD_RXIMR8_IM19,		19
	.EQU	CANFD_RXIMR8_IM18,		18
	.EQU	CANFD_RXIMR8_IM17,		17
	.EQU	CANFD_RXIMR8_IM16,		16
	.EQU	CANFD_RXIMR8_IM15,		15
	.EQU	CANFD_RXIMR8_IM14,		14
	.EQU	CANFD_RXIMR8_IM13,		13
	.EQU	CANFD_RXIMR8_IM12,		12
	.EQU	CANFD_RXIMR8_IM11,		11
	.EQU	CANFD_RXIMR8_IM10,		10
	.EQU	CANFD_RXIMR8_IM9,		9
	.EQU	CANFD_RXIMR8_IM8,		8
	.EQU	CANFD_RXIMR8_IM7,		7
	.EQU	CANFD_RXIMR8_IM6,		6
	.EQU	CANFD_RXIMR8_IM5,		5
	.EQU	CANFD_RXIMR8_IM4,		4
	.EQU	CANFD_RXIMR8_IM3,		3
	.EQU	CANFD_RXIMR8_IM2,		2
	.EQU	CANFD_RXIMR8_IM1,		1
	.EQU	CANFD_RXIMR8_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR9,	0x400048A4
//  0x4000 48A4  CANFD_RXIMR9   Bits-------------------------------------
	.EQU	CANFD_RXIMR9_IM31,		31
	.EQU	CANFD_RXIMR9_IM30,		30
	.EQU	CANFD_RXIMR9_IM29,		29
	.EQU	CANFD_RXIMR9_IM28,		28
	.EQU	CANFD_RXIMR9_IM27,		27
	.EQU	CANFD_RXIMR9_IM26,		26
	.EQU	CANFD_RXIMR9_IM25,		25
	.EQU	CANFD_RXIMR9_IM24,		24
	.EQU	CANFD_RXIMR9_IM23,		23
	.EQU	CANFD_RXIMR9_IM22,		22
	.EQU	CANFD_RXIMR9_IM21,		21
	.EQU	CANFD_RXIMR9_IM20,		20
	.EQU	CANFD_RXIMR9_IM19,		19
	.EQU	CANFD_RXIMR9_IM18,		18
	.EQU	CANFD_RXIMR9_IM17,		17
	.EQU	CANFD_RXIMR9_IM16,		16
	.EQU	CANFD_RXIMR9_IM15,		15
	.EQU	CANFD_RXIMR9_IM14,		14
	.EQU	CANFD_RXIMR9_IM13,		13
	.EQU	CANFD_RXIMR9_IM12,		12
	.EQU	CANFD_RXIMR9_IM11,		11
	.EQU	CANFD_RXIMR9_IM10,		10
	.EQU	CANFD_RXIMR9_IM9,		9
	.EQU	CANFD_RXIMR9_IM8,		8
	.EQU	CANFD_RXIMR9_IM7,		7
	.EQU	CANFD_RXIMR9_IM6,		6
	.EQU	CANFD_RXIMR9_IM5,		5
	.EQU	CANFD_RXIMR9_IM4,		4
	.EQU	CANFD_RXIMR9_IM3,		3
	.EQU	CANFD_RXIMR9_IM2,		2
	.EQU	CANFD_RXIMR9_IM1,		1
	.EQU	CANFD_RXIMR9_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR10,	0x400048A8
//  0x4000 48A8  CANFD_RXIMR10   Bits-------------------------------------
	.EQU	CANFD_RXIMR10_IM31,		31
	.EQU	CANFD_RXIMR10_IM30,		30
	.EQU	CANFD_RXIMR10_IM29,		29
	.EQU	CANFD_RXIMR10_IM28,		28
	.EQU	CANFD_RXIMR10_IM27,		27
	.EQU	CANFD_RXIMR10_IM26,		26
	.EQU	CANFD_RXIMR10_IM25,		25
	.EQU	CANFD_RXIMR10_IM24,		24
	.EQU	CANFD_RXIMR10_IM23,		23
	.EQU	CANFD_RXIMR10_IM22,		22
	.EQU	CANFD_RXIMR10_IM21,		21
	.EQU	CANFD_RXIMR10_IM20,		20
	.EQU	CANFD_RXIMR10_IM19,		19
	.EQU	CANFD_RXIMR10_IM18,		18
	.EQU	CANFD_RXIMR10_IM17,		17
	.EQU	CANFD_RXIMR10_IM16,		16
	.EQU	CANFD_RXIMR10_IM15,		15
	.EQU	CANFD_RXIMR10_IM14,		14
	.EQU	CANFD_RXIMR10_IM13,		13
	.EQU	CANFD_RXIMR10_IM12,		12
	.EQU	CANFD_RXIMR10_IM11,		11
	.EQU	CANFD_RXIMR10_IM10,		10
	.EQU	CANFD_RXIMR10_IM9,		9
	.EQU	CANFD_RXIMR10_IM8,		8
	.EQU	CANFD_RXIMR10_IM7,		7
	.EQU	CANFD_RXIMR10_IM6,		6
	.EQU	CANFD_RXIMR10_IM5,		5
	.EQU	CANFD_RXIMR10_IM4,		4
	.EQU	CANFD_RXIMR10_IM3,		3
	.EQU	CANFD_RXIMR10_IM2,		2
	.EQU	CANFD_RXIMR10_IM1,		1
	.EQU	CANFD_RXIMR10_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR11,	0x400048AC
//  0x4000 48AC  CANFD_RXIMR11   Bits-------------------------------------
	.EQU	CANFD_RXIMR11_IM31,		31
	.EQU	CANFD_RXIMR11_IM30,		30
	.EQU	CANFD_RXIMR11_IM29,		29
	.EQU	CANFD_RXIMR11_IM28,		28
	.EQU	CANFD_RXIMR11_IM27,		27
	.EQU	CANFD_RXIMR11_IM26,		26
	.EQU	CANFD_RXIMR11_IM25,		25
	.EQU	CANFD_RXIMR11_IM24,		24
	.EQU	CANFD_RXIMR11_IM23,		23
	.EQU	CANFD_RXIMR11_IM22,		22
	.EQU	CANFD_RXIMR11_IM21,		21
	.EQU	CANFD_RXIMR11_IM20,		20
	.EQU	CANFD_RXIMR11_IM19,		19
	.EQU	CANFD_RXIMR11_IM18,		18
	.EQU	CANFD_RXIMR11_IM17,		17
	.EQU	CANFD_RXIMR11_IM16,		16
	.EQU	CANFD_RXIMR11_IM15,		15
	.EQU	CANFD_RXIMR11_IM14,		14
	.EQU	CANFD_RXIMR11_IM13,		13
	.EQU	CANFD_RXIMR11_IM12,		12
	.EQU	CANFD_RXIMR11_IM11,		11
	.EQU	CANFD_RXIMR11_IM10,		10
	.EQU	CANFD_RXIMR11_IM9,		9
	.EQU	CANFD_RXIMR11_IM8,		8
	.EQU	CANFD_RXIMR11_IM7,		7
	.EQU	CANFD_RXIMR11_IM6,		6
	.EQU	CANFD_RXIMR11_IM5,		5
	.EQU	CANFD_RXIMR11_IM4,		4
	.EQU	CANFD_RXIMR11_IM3,		3
	.EQU	CANFD_RXIMR11_IM2,		2
	.EQU	CANFD_RXIMR11_IM1,		1
	.EQU	CANFD_RXIMR11_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR12,	0x400048B0
//  0x4000 48B0  CANFD_RXIMR12   Bits-------------------------------------
	.EQU	CANFD_RXIMR12_IM31,		31
	.EQU	CANFD_RXIMR12_IM30,		30
	.EQU	CANFD_RXIMR12_IM29,		29
	.EQU	CANFD_RXIMR12_IM28,		28
	.EQU	CANFD_RXIMR12_IM27,		27
	.EQU	CANFD_RXIMR12_IM26,		26
	.EQU	CANFD_RXIMR12_IM25,		25
	.EQU	CANFD_RXIMR12_IM24,		24
	.EQU	CANFD_RXIMR12_IM23,		23
	.EQU	CANFD_RXIMR12_IM22,		22
	.EQU	CANFD_RXIMR12_IM21,		21
	.EQU	CANFD_RXIMR12_IM20,		20
	.EQU	CANFD_RXIMR12_IM19,		19
	.EQU	CANFD_RXIMR12_IM18,		18
	.EQU	CANFD_RXIMR12_IM17,		17
	.EQU	CANFD_RXIMR12_IM16,		16
	.EQU	CANFD_RXIMR12_IM15,		15
	.EQU	CANFD_RXIMR12_IM14,		14
	.EQU	CANFD_RXIMR12_IM13,		13
	.EQU	CANFD_RXIMR12_IM12,		12
	.EQU	CANFD_RXIMR12_IM11,		11
	.EQU	CANFD_RXIMR12_IM10,		10
	.EQU	CANFD_RXIMR12_IM9,		9
	.EQU	CANFD_RXIMR12_IM8,		8
	.EQU	CANFD_RXIMR12_IM7,		7
	.EQU	CANFD_RXIMR12_IM6,		6
	.EQU	CANFD_RXIMR12_IM5,		5
	.EQU	CANFD_RXIMR12_IM4,		4
	.EQU	CANFD_RXIMR12_IM3,		3
	.EQU	CANFD_RXIMR12_IM2,		2
	.EQU	CANFD_RXIMR12_IM1,		1
	.EQU	CANFD_RXIMR12_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR13,	0x400048B4
//  0x4000 48B4  CANFD_RXIMR13   Bits-------------------------------------
	.EQU	CANFD_RXIMR13_IM31,		31
	.EQU	CANFD_RXIMR13_IM30,		30
	.EQU	CANFD_RXIMR13_IM29,		29
	.EQU	CANFD_RXIMR13_IM28,		28
	.EQU	CANFD_RXIMR13_IM27,		27
	.EQU	CANFD_RXIMR13_IM26,		26
	.EQU	CANFD_RXIMR13_IM25,		25
	.EQU	CANFD_RXIMR13_IM24,		24
	.EQU	CANFD_RXIMR13_IM23,		23
	.EQU	CANFD_RXIMR13_IM22,		22
	.EQU	CANFD_RXIMR13_IM21,		21
	.EQU	CANFD_RXIMR13_IM20,		20
	.EQU	CANFD_RXIMR13_IM19,		19
	.EQU	CANFD_RXIMR13_IM18,		18
	.EQU	CANFD_RXIMR13_IM17,		17
	.EQU	CANFD_RXIMR13_IM16,		16
	.EQU	CANFD_RXIMR13_IM15,		15
	.EQU	CANFD_RXIMR13_IM14,		14
	.EQU	CANFD_RXIMR13_IM13,		13
	.EQU	CANFD_RXIMR13_IM12,		12
	.EQU	CANFD_RXIMR13_IM11,		11
	.EQU	CANFD_RXIMR13_IM10,		10
	.EQU	CANFD_RXIMR13_IM9,		9
	.EQU	CANFD_RXIMR13_IM8,		8
	.EQU	CANFD_RXIMR13_IM7,		7
	.EQU	CANFD_RXIMR13_IM6,		6
	.EQU	CANFD_RXIMR13_IM5,		5
	.EQU	CANFD_RXIMR13_IM4,		4
	.EQU	CANFD_RXIMR13_IM3,		3
	.EQU	CANFD_RXIMR13_IM2,		2
	.EQU	CANFD_RXIMR13_IM1,		1
	.EQU	CANFD_RXIMR13_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR14,	0x400048B8
//  0x4000 48B8  CANFD_RXIMR14   Bits-------------------------------------
	.EQU	CANFD_RXIMR14_IM31,		31
	.EQU	CANFD_RXIMR14_IM30,		30
	.EQU	CANFD_RXIMR14_IM29,		29
	.EQU	CANFD_RXIMR14_IM28,		28
	.EQU	CANFD_RXIMR14_IM27,		27
	.EQU	CANFD_RXIMR14_IM26,		26
	.EQU	CANFD_RXIMR14_IM25,		25
	.EQU	CANFD_RXIMR14_IM24,		24
	.EQU	CANFD_RXIMR14_IM23,		23
	.EQU	CANFD_RXIMR14_IM22,		22
	.EQU	CANFD_RXIMR14_IM21,		21
	.EQU	CANFD_RXIMR14_IM20,		20
	.EQU	CANFD_RXIMR14_IM19,		19
	.EQU	CANFD_RXIMR14_IM18,		18
	.EQU	CANFD_RXIMR14_IM17,		17
	.EQU	CANFD_RXIMR14_IM16,		16
	.EQU	CANFD_RXIMR14_IM15,		15
	.EQU	CANFD_RXIMR14_IM14,		14
	.EQU	CANFD_RXIMR14_IM13,		13
	.EQU	CANFD_RXIMR14_IM12,		12
	.EQU	CANFD_RXIMR14_IM11,		11
	.EQU	CANFD_RXIMR14_IM10,		10
	.EQU	CANFD_RXIMR14_IM9,		9
	.EQU	CANFD_RXIMR14_IM8,		8
	.EQU	CANFD_RXIMR14_IM7,		7
	.EQU	CANFD_RXIMR14_IM6,		6
	.EQU	CANFD_RXIMR14_IM5,		5
	.EQU	CANFD_RXIMR14_IM4,		4
	.EQU	CANFD_RXIMR14_IM3,		3
	.EQU	CANFD_RXIMR14_IM2,		2
	.EQU	CANFD_RXIMR14_IM1,		1
	.EQU	CANFD_RXIMR14_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR15,	0x400048BC
//  0x4000 48BC  CANFD_RXIMR15   Bits-------------------------------------
	.EQU	CANFD_RXIMR15_IM31,		31
	.EQU	CANFD_RXIMR15_IM30,		30
	.EQU	CANFD_RXIMR15_IM29,		29
	.EQU	CANFD_RXIMR15_IM28,		28
	.EQU	CANFD_RXIMR15_IM27,		27
	.EQU	CANFD_RXIMR15_IM26,		26
	.EQU	CANFD_RXIMR15_IM25,		25
	.EQU	CANFD_RXIMR15_IM24,		24
	.EQU	CANFD_RXIMR15_IM23,		23
	.EQU	CANFD_RXIMR15_IM22,		22
	.EQU	CANFD_RXIMR15_IM21,		21
	.EQU	CANFD_RXIMR15_IM20,		20
	.EQU	CANFD_RXIMR15_IM19,		19
	.EQU	CANFD_RXIMR15_IM18,		18
	.EQU	CANFD_RXIMR15_IM17,		17
	.EQU	CANFD_RXIMR15_IM16,		16
	.EQU	CANFD_RXIMR15_IM15,		15
	.EQU	CANFD_RXIMR15_IM14,		14
	.EQU	CANFD_RXIMR15_IM13,		13
	.EQU	CANFD_RXIMR15_IM12,		12
	.EQU	CANFD_RXIMR15_IM11,		11
	.EQU	CANFD_RXIMR15_IM10,		10
	.EQU	CANFD_RXIMR15_IM9,		9
	.EQU	CANFD_RXIMR15_IM8,		8
	.EQU	CANFD_RXIMR15_IM7,		7
	.EQU	CANFD_RXIMR15_IM6,		6
	.EQU	CANFD_RXIMR15_IM5,		5
	.EQU	CANFD_RXIMR15_IM4,		4
	.EQU	CANFD_RXIMR15_IM3,		3
	.EQU	CANFD_RXIMR15_IM2,		2
	.EQU	CANFD_RXIMR15_IM1,		1
	.EQU	CANFD_RXIMR15_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR16,	0x400048C0
//  0x4000 48C0  CANFD_RXIMR16   Bits-------------------------------------
	.EQU	CANFD_RXIMR16_IM31,		31
	.EQU	CANFD_RXIMR16_IM30,		30
	.EQU	CANFD_RXIMR16_IM29,		29
	.EQU	CANFD_RXIMR16_IM28,		28
	.EQU	CANFD_RXIMR16_IM27,		27
	.EQU	CANFD_RXIMR16_IM26,		26
	.EQU	CANFD_RXIMR16_IM25,		25
	.EQU	CANFD_RXIMR16_IM24,		24
	.EQU	CANFD_RXIMR16_IM23,		23
	.EQU	CANFD_RXIMR16_IM22,		22
	.EQU	CANFD_RXIMR16_IM21,		21
	.EQU	CANFD_RXIMR16_IM20,		20
	.EQU	CANFD_RXIMR16_IM19,		19
	.EQU	CANFD_RXIMR16_IM18,		18
	.EQU	CANFD_RXIMR16_IM17,		17
	.EQU	CANFD_RXIMR16_IM16,		16
	.EQU	CANFD_RXIMR16_IM15,		15
	.EQU	CANFD_RXIMR16_IM14,		14
	.EQU	CANFD_RXIMR16_IM13,		13
	.EQU	CANFD_RXIMR16_IM12,		12
	.EQU	CANFD_RXIMR16_IM11,		11
	.EQU	CANFD_RXIMR16_IM10,		10
	.EQU	CANFD_RXIMR16_IM9,		9
	.EQU	CANFD_RXIMR16_IM8,		8
	.EQU	CANFD_RXIMR16_IM7,		7
	.EQU	CANFD_RXIMR16_IM6,		6
	.EQU	CANFD_RXIMR16_IM5,		5
	.EQU	CANFD_RXIMR16_IM4,		4
	.EQU	CANFD_RXIMR16_IM3,		3
	.EQU	CANFD_RXIMR16_IM2,		2
	.EQU	CANFD_RXIMR16_IM1,		1
	.EQU	CANFD_RXIMR16_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR17,	0x400048C4
//  0x4000 48C4  CANFD_RXIMR17   Bits-------------------------------------
	.EQU	CANFD_RXIMR17_IM31,		31
	.EQU	CANFD_RXIMR17_IM30,		30
	.EQU	CANFD_RXIMR17_IM29,		29
	.EQU	CANFD_RXIMR17_IM28,		28
	.EQU	CANFD_RXIMR17_IM27,		27
	.EQU	CANFD_RXIMR17_IM26,		26
	.EQU	CANFD_RXIMR17_IM25,		25
	.EQU	CANFD_RXIMR17_IM24,		24
	.EQU	CANFD_RXIMR17_IM23,		23
	.EQU	CANFD_RXIMR17_IM22,		22
	.EQU	CANFD_RXIMR17_IM21,		21
	.EQU	CANFD_RXIMR17_IM20,		20
	.EQU	CANFD_RXIMR17_IM19,		19
	.EQU	CANFD_RXIMR17_IM18,		18
	.EQU	CANFD_RXIMR17_IM17,		17
	.EQU	CANFD_RXIMR17_IM16,		16
	.EQU	CANFD_RXIMR17_IM15,		15
	.EQU	CANFD_RXIMR17_IM14,		14
	.EQU	CANFD_RXIMR17_IM13,		13
	.EQU	CANFD_RXIMR17_IM12,		12
	.EQU	CANFD_RXIMR17_IM11,		11
	.EQU	CANFD_RXIMR17_IM10,		10
	.EQU	CANFD_RXIMR17_IM9,		9
	.EQU	CANFD_RXIMR17_IM8,		8
	.EQU	CANFD_RXIMR17_IM7,		7
	.EQU	CANFD_RXIMR17_IM6,		6
	.EQU	CANFD_RXIMR17_IM5,		5
	.EQU	CANFD_RXIMR17_IM4,		4
	.EQU	CANFD_RXIMR17_IM3,		3
	.EQU	CANFD_RXIMR17_IM2,		2
	.EQU	CANFD_RXIMR17_IM1,		1
	.EQU	CANFD_RXIMR17_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR18,	0x400048C8
//  0x4000 48C8  CANFD_RXIMR18   Bits-------------------------------------
	.EQU	CANFD_RXIMR18_IM31,		31
	.EQU	CANFD_RXIMR18_IM30,		30
	.EQU	CANFD_RXIMR18_IM29,		29
	.EQU	CANFD_RXIMR18_IM28,		28
	.EQU	CANFD_RXIMR18_IM27,		27
	.EQU	CANFD_RXIMR18_IM26,		26
	.EQU	CANFD_RXIMR18_IM25,		25
	.EQU	CANFD_RXIMR18_IM24,		24
	.EQU	CANFD_RXIMR18_IM23,		23
	.EQU	CANFD_RXIMR18_IM22,		22
	.EQU	CANFD_RXIMR18_IM21,		21
	.EQU	CANFD_RXIMR18_IM20,		20
	.EQU	CANFD_RXIMR18_IM19,		19
	.EQU	CANFD_RXIMR18_IM18,		18
	.EQU	CANFD_RXIMR18_IM17,		17
	.EQU	CANFD_RXIMR18_IM16,		16
	.EQU	CANFD_RXIMR18_IM15,		15
	.EQU	CANFD_RXIMR18_IM14,		14
	.EQU	CANFD_RXIMR18_IM13,		13
	.EQU	CANFD_RXIMR18_IM12,		12
	.EQU	CANFD_RXIMR18_IM11,		11
	.EQU	CANFD_RXIMR18_IM10,		10
	.EQU	CANFD_RXIMR18_IM9,		9
	.EQU	CANFD_RXIMR18_IM8,		8
	.EQU	CANFD_RXIMR18_IM7,		7
	.EQU	CANFD_RXIMR18_IM6,		6
	.EQU	CANFD_RXIMR18_IM5,		5
	.EQU	CANFD_RXIMR18_IM4,		4
	.EQU	CANFD_RXIMR18_IM3,		3
	.EQU	CANFD_RXIMR18_IM2,		2
	.EQU	CANFD_RXIMR18_IM1,		1
	.EQU	CANFD_RXIMR18_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR19,	0x400048CC
//  0x4000 48CC  CANFD_RXIMR19   Bits-------------------------------------
	.EQU	CANFD_RXIMR19_IM31,		31
	.EQU	CANFD_RXIMR19_IM30,		30
	.EQU	CANFD_RXIMR19_IM29,		29
	.EQU	CANFD_RXIMR19_IM28,		28
	.EQU	CANFD_RXIMR19_IM27,		27
	.EQU	CANFD_RXIMR19_IM26,		26
	.EQU	CANFD_RXIMR19_IM25,		25
	.EQU	CANFD_RXIMR19_IM24,		24
	.EQU	CANFD_RXIMR19_IM23,		23
	.EQU	CANFD_RXIMR19_IM22,		22
	.EQU	CANFD_RXIMR19_IM21,		21
	.EQU	CANFD_RXIMR19_IM20,		20
	.EQU	CANFD_RXIMR19_IM19,		19
	.EQU	CANFD_RXIMR19_IM18,		18
	.EQU	CANFD_RXIMR19_IM17,		17
	.EQU	CANFD_RXIMR19_IM16,		16
	.EQU	CANFD_RXIMR19_IM15,		15
	.EQU	CANFD_RXIMR19_IM14,		14
	.EQU	CANFD_RXIMR19_IM13,		13
	.EQU	CANFD_RXIMR19_IM12,		12
	.EQU	CANFD_RXIMR19_IM11,		11
	.EQU	CANFD_RXIMR19_IM10,		10
	.EQU	CANFD_RXIMR19_IM9,		9
	.EQU	CANFD_RXIMR19_IM8,		8
	.EQU	CANFD_RXIMR19_IM7,		7
	.EQU	CANFD_RXIMR19_IM6,		6
	.EQU	CANFD_RXIMR19_IM5,		5
	.EQU	CANFD_RXIMR19_IM4,		4
	.EQU	CANFD_RXIMR19_IM3,		3
	.EQU	CANFD_RXIMR19_IM2,		2
	.EQU	CANFD_RXIMR19_IM1,		1
	.EQU	CANFD_RXIMR19_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR20,	0x400048D0
//  0x4000 48D0  CANFD_RXIMR20   Bits-------------------------------------
	.EQU	CANFD_RXIMR20_IM31,		31
	.EQU	CANFD_RXIMR20_IM30,		30
	.EQU	CANFD_RXIMR20_IM29,		29
	.EQU	CANFD_RXIMR20_IM28,		28
	.EQU	CANFD_RXIMR20_IM27,		27
	.EQU	CANFD_RXIMR20_IM26,		26
	.EQU	CANFD_RXIMR20_IM25,		25
	.EQU	CANFD_RXIMR20_IM24,		24
	.EQU	CANFD_RXIMR20_IM23,		23
	.EQU	CANFD_RXIMR20_IM22,		22
	.EQU	CANFD_RXIMR20_IM21,		21
	.EQU	CANFD_RXIMR20_IM20,		20
	.EQU	CANFD_RXIMR20_IM19,		19
	.EQU	CANFD_RXIMR20_IM18,		18
	.EQU	CANFD_RXIMR20_IM17,		17
	.EQU	CANFD_RXIMR20_IM16,		16
	.EQU	CANFD_RXIMR20_IM15,		15
	.EQU	CANFD_RXIMR20_IM14,		14
	.EQU	CANFD_RXIMR20_IM13,		13
	.EQU	CANFD_RXIMR20_IM12,		12
	.EQU	CANFD_RXIMR20_IM11,		11
	.EQU	CANFD_RXIMR20_IM10,		10
	.EQU	CANFD_RXIMR20_IM9,		9
	.EQU	CANFD_RXIMR20_IM8,		8
	.EQU	CANFD_RXIMR20_IM7,		7
	.EQU	CANFD_RXIMR20_IM6,		6
	.EQU	CANFD_RXIMR20_IM5,		5
	.EQU	CANFD_RXIMR20_IM4,		4
	.EQU	CANFD_RXIMR20_IM3,		3
	.EQU	CANFD_RXIMR20_IM2,		2
	.EQU	CANFD_RXIMR20_IM1,		1
	.EQU	CANFD_RXIMR20_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR21,	0x400048D4
//  0x4000 48D4  CANFD_RXIMR21   Bits-------------------------------------
	.EQU	CANFD_RXIMR21_IM31,		31
	.EQU	CANFD_RXIMR21_IM30,		30
	.EQU	CANFD_RXIMR21_IM29,		29
	.EQU	CANFD_RXIMR21_IM28,		28
	.EQU	CANFD_RXIMR21_IM27,		27
	.EQU	CANFD_RXIMR21_IM26,		26
	.EQU	CANFD_RXIMR21_IM25,		25
	.EQU	CANFD_RXIMR21_IM24,		24
	.EQU	CANFD_RXIMR21_IM23,		23
	.EQU	CANFD_RXIMR21_IM22,		22
	.EQU	CANFD_RXIMR21_IM21,		21
	.EQU	CANFD_RXIMR21_IM20,		20
	.EQU	CANFD_RXIMR21_IM19,		19
	.EQU	CANFD_RXIMR21_IM18,		18
	.EQU	CANFD_RXIMR21_IM17,		17
	.EQU	CANFD_RXIMR21_IM16,		16
	.EQU	CANFD_RXIMR21_IM15,		15
	.EQU	CANFD_RXIMR21_IM14,		14
	.EQU	CANFD_RXIMR21_IM13,		13
	.EQU	CANFD_RXIMR21_IM12,		12
	.EQU	CANFD_RXIMR21_IM11,		11
	.EQU	CANFD_RXIMR21_IM10,		10
	.EQU	CANFD_RXIMR21_IM9,		9
	.EQU	CANFD_RXIMR21_IM8,		8
	.EQU	CANFD_RXIMR21_IM7,		7
	.EQU	CANFD_RXIMR21_IM6,		6
	.EQU	CANFD_RXIMR21_IM5,		5
	.EQU	CANFD_RXIMR21_IM4,		4
	.EQU	CANFD_RXIMR21_IM3,		3
	.EQU	CANFD_RXIMR21_IM2,		2
	.EQU	CANFD_RXIMR21_IM1,		1
	.EQU	CANFD_RXIMR21_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR22,	0x400048D8
//  0x4000 48D8  CANFD_RXIMR22   Bits-------------------------------------
	.EQU	CANFD_RXIMR22_IM31,		31
	.EQU	CANFD_RXIMR22_IM30,		30
	.EQU	CANFD_RXIMR22_IM29,		29
	.EQU	CANFD_RXIMR22_IM28,		28
	.EQU	CANFD_RXIMR22_IM27,		27
	.EQU	CANFD_RXIMR22_IM26,		26
	.EQU	CANFD_RXIMR22_IM25,		25
	.EQU	CANFD_RXIMR22_IM24,		24
	.EQU	CANFD_RXIMR22_IM23,		23
	.EQU	CANFD_RXIMR22_IM22,		22
	.EQU	CANFD_RXIMR22_IM21,		21
	.EQU	CANFD_RXIMR22_IM20,		20
	.EQU	CANFD_RXIMR22_IM19,		19
	.EQU	CANFD_RXIMR22_IM18,		18
	.EQU	CANFD_RXIMR22_IM17,		17
	.EQU	CANFD_RXIMR22_IM16,		16
	.EQU	CANFD_RXIMR22_IM15,		15
	.EQU	CANFD_RXIMR22_IM14,		14
	.EQU	CANFD_RXIMR22_IM13,		13
	.EQU	CANFD_RXIMR22_IM12,		12
	.EQU	CANFD_RXIMR22_IM11,		11
	.EQU	CANFD_RXIMR22_IM10,		10
	.EQU	CANFD_RXIMR22_IM9,		9
	.EQU	CANFD_RXIMR22_IM8,		8
	.EQU	CANFD_RXIMR22_IM7,		7
	.EQU	CANFD_RXIMR22_IM6,		6
	.EQU	CANFD_RXIMR22_IM5,		5
	.EQU	CANFD_RXIMR22_IM4,		4
	.EQU	CANFD_RXIMR22_IM3,		3
	.EQU	CANFD_RXIMR22_IM2,		2
	.EQU	CANFD_RXIMR22_IM1,		1
	.EQU	CANFD_RXIMR22_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR23,	0x400048DC
//  0x4000 48DC  CANFD_RXIMR23   Bits-------------------------------------
	.EQU	CANFD_RXIMR23_IM31,		31
	.EQU	CANFD_RXIMR23_IM30,		30
	.EQU	CANFD_RXIMR23_IM29,		29
	.EQU	CANFD_RXIMR23_IM28,		28
	.EQU	CANFD_RXIMR23_IM27,		27
	.EQU	CANFD_RXIMR23_IM26,		26
	.EQU	CANFD_RXIMR23_IM25,		25
	.EQU	CANFD_RXIMR23_IM24,		24
	.EQU	CANFD_RXIMR23_IM23,		23
	.EQU	CANFD_RXIMR23_IM22,		22
	.EQU	CANFD_RXIMR23_IM21,		21
	.EQU	CANFD_RXIMR23_IM20,		20
	.EQU	CANFD_RXIMR23_IM19,		19
	.EQU	CANFD_RXIMR23_IM18,		18
	.EQU	CANFD_RXIMR23_IM17,		17
	.EQU	CANFD_RXIMR23_IM16,		16
	.EQU	CANFD_RXIMR23_IM15,		15
	.EQU	CANFD_RXIMR23_IM14,		14
	.EQU	CANFD_RXIMR23_IM13,		13
	.EQU	CANFD_RXIMR23_IM12,		12
	.EQU	CANFD_RXIMR23_IM11,		11
	.EQU	CANFD_RXIMR23_IM10,		10
	.EQU	CANFD_RXIMR23_IM9,		9
	.EQU	CANFD_RXIMR23_IM8,		8
	.EQU	CANFD_RXIMR23_IM7,		7
	.EQU	CANFD_RXIMR23_IM6,		6
	.EQU	CANFD_RXIMR23_IM5,		5
	.EQU	CANFD_RXIMR23_IM4,		4
	.EQU	CANFD_RXIMR23_IM3,		3
	.EQU	CANFD_RXIMR23_IM2,		2
	.EQU	CANFD_RXIMR23_IM1,		1
	.EQU	CANFD_RXIMR23_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR24,	0x400048E0
//  0x4000 48E0  CANFD_RXIMR24   Bits-------------------------------------
	.EQU	CANFD_RXIMR24_IM31,		31
	.EQU	CANFD_RXIMR24_IM30,		30
	.EQU	CANFD_RXIMR24_IM29,		29
	.EQU	CANFD_RXIMR24_IM28,		28
	.EQU	CANFD_RXIMR24_IM27,		27
	.EQU	CANFD_RXIMR24_IM26,		26
	.EQU	CANFD_RXIMR24_IM25,		25
	.EQU	CANFD_RXIMR24_IM24,		24
	.EQU	CANFD_RXIMR24_IM23,		23
	.EQU	CANFD_RXIMR24_IM22,		22
	.EQU	CANFD_RXIMR24_IM21,		21
	.EQU	CANFD_RXIMR24_IM20,		20
	.EQU	CANFD_RXIMR24_IM19,		19
	.EQU	CANFD_RXIMR24_IM18,		18
	.EQU	CANFD_RXIMR24_IM17,		17
	.EQU	CANFD_RXIMR24_IM16,		16
	.EQU	CANFD_RXIMR24_IM15,		15
	.EQU	CANFD_RXIMR24_IM14,		14
	.EQU	CANFD_RXIMR24_IM13,		13
	.EQU	CANFD_RXIMR24_IM12,		12
	.EQU	CANFD_RXIMR24_IM11,		11
	.EQU	CANFD_RXIMR24_IM10,		10
	.EQU	CANFD_RXIMR24_IM9,		9
	.EQU	CANFD_RXIMR24_IM8,		8
	.EQU	CANFD_RXIMR24_IM7,		7
	.EQU	CANFD_RXIMR24_IM6,		6
	.EQU	CANFD_RXIMR24_IM5,		5
	.EQU	CANFD_RXIMR24_IM4,		4
	.EQU	CANFD_RXIMR24_IM3,		3
	.EQU	CANFD_RXIMR24_IM2,		2
	.EQU	CANFD_RXIMR24_IM1,		1
	.EQU	CANFD_RXIMR24_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR25,	0x400048E4
//  0x4000 48E4  CANFD_RXIMR25   Bits-------------------------------------
	.EQU	CANFD_RXIMR25_IM31,		31
	.EQU	CANFD_RXIMR25_IM30,		30
	.EQU	CANFD_RXIMR25_IM29,		29
	.EQU	CANFD_RXIMR25_IM28,		28
	.EQU	CANFD_RXIMR25_IM27,		27
	.EQU	CANFD_RXIMR25_IM26,		26
	.EQU	CANFD_RXIMR25_IM25,		25
	.EQU	CANFD_RXIMR25_IM24,		24
	.EQU	CANFD_RXIMR25_IM23,		23
	.EQU	CANFD_RXIMR25_IM22,		22
	.EQU	CANFD_RXIMR25_IM21,		21
	.EQU	CANFD_RXIMR25_IM20,		20
	.EQU	CANFD_RXIMR25_IM19,		19
	.EQU	CANFD_RXIMR25_IM18,		18
	.EQU	CANFD_RXIMR25_IM17,		17
	.EQU	CANFD_RXIMR25_IM16,		16
	.EQU	CANFD_RXIMR25_IM15,		15
	.EQU	CANFD_RXIMR25_IM14,		14
	.EQU	CANFD_RXIMR25_IM13,		13
	.EQU	CANFD_RXIMR25_IM12,		12
	.EQU	CANFD_RXIMR25_IM11,		11
	.EQU	CANFD_RXIMR25_IM10,		10
	.EQU	CANFD_RXIMR25_IM9,		9
	.EQU	CANFD_RXIMR25_IM8,		8
	.EQU	CANFD_RXIMR25_IM7,		7
	.EQU	CANFD_RXIMR25_IM6,		6
	.EQU	CANFD_RXIMR25_IM5,		5
	.EQU	CANFD_RXIMR25_IM4,		4
	.EQU	CANFD_RXIMR25_IM3,		3
	.EQU	CANFD_RXIMR25_IM2,		2
	.EQU	CANFD_RXIMR25_IM1,		1
	.EQU	CANFD_RXIMR25_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR26,	0x400048E8
//  0x4000 48E8  CANFD_RXIMR26   Bits-------------------------------------
	.EQU	CANFD_RXIMR26_IM31,		31
	.EQU	CANFD_RXIMR26_IM30,		30
	.EQU	CANFD_RXIMR26_IM29,		29
	.EQU	CANFD_RXIMR26_IM28,		28
	.EQU	CANFD_RXIMR26_IM27,		27
	.EQU	CANFD_RXIMR26_IM26,		26
	.EQU	CANFD_RXIMR26_IM25,		25
	.EQU	CANFD_RXIMR26_IM24,		24
	.EQU	CANFD_RXIMR26_IM23,		23
	.EQU	CANFD_RXIMR26_IM22,		22
	.EQU	CANFD_RXIMR26_IM21,		21
	.EQU	CANFD_RXIMR26_IM20,		20
	.EQU	CANFD_RXIMR26_IM19,		19
	.EQU	CANFD_RXIMR26_IM18,		18
	.EQU	CANFD_RXIMR26_IM17,		17
	.EQU	CANFD_RXIMR26_IM16,		16
	.EQU	CANFD_RXIMR26_IM15,		15
	.EQU	CANFD_RXIMR26_IM14,		14
	.EQU	CANFD_RXIMR26_IM13,		13
	.EQU	CANFD_RXIMR26_IM12,		12
	.EQU	CANFD_RXIMR26_IM11,		11
	.EQU	CANFD_RXIMR26_IM10,		10
	.EQU	CANFD_RXIMR26_IM9,		9
	.EQU	CANFD_RXIMR26_IM8,		8
	.EQU	CANFD_RXIMR26_IM7,		7
	.EQU	CANFD_RXIMR26_IM6,		6
	.EQU	CANFD_RXIMR26_IM5,		5
	.EQU	CANFD_RXIMR26_IM4,		4
	.EQU	CANFD_RXIMR26_IM3,		3
	.EQU	CANFD_RXIMR26_IM2,		2
	.EQU	CANFD_RXIMR26_IM1,		1
	.EQU	CANFD_RXIMR26_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR27,	0x400048EC
//  0x4000 48EC  CANFD_RXIMR27   Bits-------------------------------------
	.EQU	CANFD_RXIMR27_IM31,		31
	.EQU	CANFD_RXIMR27_IM30,		30
	.EQU	CANFD_RXIMR27_IM29,		29
	.EQU	CANFD_RXIMR27_IM28,		28
	.EQU	CANFD_RXIMR27_IM27,		27
	.EQU	CANFD_RXIMR27_IM26,		26
	.EQU	CANFD_RXIMR27_IM25,		25
	.EQU	CANFD_RXIMR27_IM24,		24
	.EQU	CANFD_RXIMR27_IM23,		23
	.EQU	CANFD_RXIMR27_IM22,		22
	.EQU	CANFD_RXIMR27_IM21,		21
	.EQU	CANFD_RXIMR27_IM20,		20
	.EQU	CANFD_RXIMR27_IM19,		19
	.EQU	CANFD_RXIMR27_IM18,		18
	.EQU	CANFD_RXIMR27_IM17,		17
	.EQU	CANFD_RXIMR27_IM16,		16
	.EQU	CANFD_RXIMR27_IM15,		15
	.EQU	CANFD_RXIMR27_IM14,		14
	.EQU	CANFD_RXIMR27_IM13,		13
	.EQU	CANFD_RXIMR27_IM12,		12
	.EQU	CANFD_RXIMR27_IM11,		11
	.EQU	CANFD_RXIMR27_IM10,		10
	.EQU	CANFD_RXIMR27_IM9,		9
	.EQU	CANFD_RXIMR27_IM8,		8
	.EQU	CANFD_RXIMR27_IM7,		7
	.EQU	CANFD_RXIMR27_IM6,		6
	.EQU	CANFD_RXIMR27_IM5,		5
	.EQU	CANFD_RXIMR27_IM4,		4
	.EQU	CANFD_RXIMR27_IM3,		3
	.EQU	CANFD_RXIMR27_IM2,		2
	.EQU	CANFD_RXIMR27_IM1,		1
	.EQU	CANFD_RXIMR27_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR28,	0x400048F0
//  0x4000 48F0  CANFD_RXIMR28   Bits-------------------------------------
	.EQU	CANFD_RXIMR28_IM31,		31
	.EQU	CANFD_RXIMR28_IM30,		30
	.EQU	CANFD_RXIMR28_IM29,		29
	.EQU	CANFD_RXIMR28_IM28,		28
	.EQU	CANFD_RXIMR28_IM27,		27
	.EQU	CANFD_RXIMR28_IM26,		26
	.EQU	CANFD_RXIMR28_IM25,		25
	.EQU	CANFD_RXIMR28_IM24,		24
	.EQU	CANFD_RXIMR28_IM23,		23
	.EQU	CANFD_RXIMR28_IM22,		22
	.EQU	CANFD_RXIMR28_IM21,		21
	.EQU	CANFD_RXIMR28_IM20,		20
	.EQU	CANFD_RXIMR28_IM19,		19
	.EQU	CANFD_RXIMR28_IM18,		18
	.EQU	CANFD_RXIMR28_IM17,		17
	.EQU	CANFD_RXIMR28_IM16,		16
	.EQU	CANFD_RXIMR28_IM15,		15
	.EQU	CANFD_RXIMR28_IM14,		14
	.EQU	CANFD_RXIMR28_IM13,		13
	.EQU	CANFD_RXIMR28_IM12,		12
	.EQU	CANFD_RXIMR28_IM11,		11
	.EQU	CANFD_RXIMR28_IM10,		10
	.EQU	CANFD_RXIMR28_IM9,		9
	.EQU	CANFD_RXIMR28_IM8,		8
	.EQU	CANFD_RXIMR28_IM7,		7
	.EQU	CANFD_RXIMR28_IM6,		6
	.EQU	CANFD_RXIMR28_IM5,		5
	.EQU	CANFD_RXIMR28_IM4,		4
	.EQU	CANFD_RXIMR28_IM3,		3
	.EQU	CANFD_RXIMR28_IM2,		2
	.EQU	CANFD_RXIMR28_IM1,		1
	.EQU	CANFD_RXIMR28_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR29,	0x400048F4
//  0x4000 48F4  CANFD_RXIMR29   Bits-------------------------------------
	.EQU	CANFD_RXIMR29_IM31,		31
	.EQU	CANFD_RXIMR29_IM30,		30
	.EQU	CANFD_RXIMR29_IM29,		29
	.EQU	CANFD_RXIMR29_IM28,		28
	.EQU	CANFD_RXIMR29_IM27,		27
	.EQU	CANFD_RXIMR29_IM26,		26
	.EQU	CANFD_RXIMR29_IM25,		25
	.EQU	CANFD_RXIMR29_IM24,		24
	.EQU	CANFD_RXIMR29_IM23,		23
	.EQU	CANFD_RXIMR29_IM22,		22
	.EQU	CANFD_RXIMR29_IM21,		21
	.EQU	CANFD_RXIMR29_IM20,		20
	.EQU	CANFD_RXIMR29_IM19,		19
	.EQU	CANFD_RXIMR29_IM18,		18
	.EQU	CANFD_RXIMR29_IM17,		17
	.EQU	CANFD_RXIMR29_IM16,		16
	.EQU	CANFD_RXIMR29_IM15,		15
	.EQU	CANFD_RXIMR29_IM14,		14
	.EQU	CANFD_RXIMR29_IM13,		13
	.EQU	CANFD_RXIMR29_IM12,		12
	.EQU	CANFD_RXIMR29_IM11,		11
	.EQU	CANFD_RXIMR29_IM10,		10
	.EQU	CANFD_RXIMR29_IM9,		9
	.EQU	CANFD_RXIMR29_IM8,		8
	.EQU	CANFD_RXIMR29_IM7,		7
	.EQU	CANFD_RXIMR29_IM6,		6
	.EQU	CANFD_RXIMR29_IM5,		5
	.EQU	CANFD_RXIMR29_IM4,		4
	.EQU	CANFD_RXIMR29_IM3,		3
	.EQU	CANFD_RXIMR29_IM2,		2
	.EQU	CANFD_RXIMR29_IM1,		1
	.EQU	CANFD_RXIMR29_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR30,	0x400048F8
//  0x4000 48F8  CANFD_RXIMR30   Bits-------------------------------------
	.EQU	CANFD_RXIMR30_IM31,		31
	.EQU	CANFD_RXIMR30_IM30,		30
	.EQU	CANFD_RXIMR30_IM29,		29
	.EQU	CANFD_RXIMR30_IM28,		28
	.EQU	CANFD_RXIMR30_IM27,		27
	.EQU	CANFD_RXIMR30_IM26,		26
	.EQU	CANFD_RXIMR30_IM25,		25
	.EQU	CANFD_RXIMR30_IM24,		24
	.EQU	CANFD_RXIMR30_IM23,		23
	.EQU	CANFD_RXIMR30_IM22,		22
	.EQU	CANFD_RXIMR30_IM21,		21
	.EQU	CANFD_RXIMR30_IM20,		20
	.EQU	CANFD_RXIMR30_IM19,		19
	.EQU	CANFD_RXIMR30_IM18,		18
	.EQU	CANFD_RXIMR30_IM17,		17
	.EQU	CANFD_RXIMR30_IM16,		16
	.EQU	CANFD_RXIMR30_IM15,		15
	.EQU	CANFD_RXIMR30_IM14,		14
	.EQU	CANFD_RXIMR30_IM13,		13
	.EQU	CANFD_RXIMR30_IM12,		12
	.EQU	CANFD_RXIMR30_IM11,		11
	.EQU	CANFD_RXIMR30_IM10,		10
	.EQU	CANFD_RXIMR30_IM9,		9
	.EQU	CANFD_RXIMR30_IM8,		8
	.EQU	CANFD_RXIMR30_IM7,		7
	.EQU	CANFD_RXIMR30_IM6,		6
	.EQU	CANFD_RXIMR30_IM5,		5
	.EQU	CANFD_RXIMR30_IM4,		4
	.EQU	CANFD_RXIMR30_IM3,		3
	.EQU	CANFD_RXIMR30_IM2,		2
	.EQU	CANFD_RXIMR30_IM1,		1
	.EQU	CANFD_RXIMR30_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR31,	0x400048FC
//  0x4000 48FC  CANFD_RXIMR31   Bits-------------------------------------
	.EQU	CANFD_RXIMR31_IM31,		31
	.EQU	CANFD_RXIMR31_IM30,		30
	.EQU	CANFD_RXIMR31_IM29,		29
	.EQU	CANFD_RXIMR31_IM28,		28
	.EQU	CANFD_RXIMR31_IM27,		27
	.EQU	CANFD_RXIMR31_IM26,		26
	.EQU	CANFD_RXIMR31_IM25,		25
	.EQU	CANFD_RXIMR31_IM24,		24
	.EQU	CANFD_RXIMR31_IM23,		23
	.EQU	CANFD_RXIMR31_IM22,		22
	.EQU	CANFD_RXIMR31_IM21,		21
	.EQU	CANFD_RXIMR31_IM20,		20
	.EQU	CANFD_RXIMR31_IM19,		19
	.EQU	CANFD_RXIMR31_IM18,		18
	.EQU	CANFD_RXIMR31_IM17,		17
	.EQU	CANFD_RXIMR31_IM16,		16
	.EQU	CANFD_RXIMR31_IM15,		15
	.EQU	CANFD_RXIMR31_IM14,		14
	.EQU	CANFD_RXIMR31_IM13,		13
	.EQU	CANFD_RXIMR31_IM12,		12
	.EQU	CANFD_RXIMR31_IM11,		11
	.EQU	CANFD_RXIMR31_IM10,		10
	.EQU	CANFD_RXIMR31_IM9,		9
	.EQU	CANFD_RXIMR31_IM8,		8
	.EQU	CANFD_RXIMR31_IM7,		7
	.EQU	CANFD_RXIMR31_IM6,		6
	.EQU	CANFD_RXIMR31_IM5,		5
	.EQU	CANFD_RXIMR31_IM4,		4
	.EQU	CANFD_RXIMR31_IM3,		3
	.EQU	CANFD_RXIMR31_IM2,		2
	.EQU	CANFD_RXIMR31_IM1,		1
	.EQU	CANFD_RXIMR31_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR32,	0x40004900
//  0x4000 4900  CANFD_RXIMR32   Bits-------------------------------------
	.EQU	CANFD_RXIMR32_IM31,		31
	.EQU	CANFD_RXIMR32_IM30,		30
	.EQU	CANFD_RXIMR32_IM29,		29
	.EQU	CANFD_RXIMR32_IM28,		28
	.EQU	CANFD_RXIMR32_IM27,		27
	.EQU	CANFD_RXIMR32_IM26,		26
	.EQU	CANFD_RXIMR32_IM25,		25
	.EQU	CANFD_RXIMR32_IM24,		24
	.EQU	CANFD_RXIMR32_IM23,		23
	.EQU	CANFD_RXIMR32_IM22,		22
	.EQU	CANFD_RXIMR32_IM21,		21
	.EQU	CANFD_RXIMR32_IM20,		20
	.EQU	CANFD_RXIMR32_IM19,		19
	.EQU	CANFD_RXIMR32_IM18,		18
	.EQU	CANFD_RXIMR32_IM17,		17
	.EQU	CANFD_RXIMR32_IM16,		16
	.EQU	CANFD_RXIMR32_IM15,		15
	.EQU	CANFD_RXIMR32_IM14,		14
	.EQU	CANFD_RXIMR32_IM13,		13
	.EQU	CANFD_RXIMR32_IM12,		12
	.EQU	CANFD_RXIMR32_IM11,		11
	.EQU	CANFD_RXIMR32_IM10,		10
	.EQU	CANFD_RXIMR32_IM9,		9
	.EQU	CANFD_RXIMR32_IM8,		8
	.EQU	CANFD_RXIMR32_IM7,		7
	.EQU	CANFD_RXIMR32_IM6,		6
	.EQU	CANFD_RXIMR32_IM5,		5
	.EQU	CANFD_RXIMR32_IM4,		4
	.EQU	CANFD_RXIMR32_IM3,		3
	.EQU	CANFD_RXIMR32_IM2,		2
	.EQU	CANFD_RXIMR32_IM1,		1
	.EQU	CANFD_RXIMR32_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR33,	0x40004904
//  0x4000 4904  CANFD_RXIMR33   Bits-------------------------------------
	.EQU	CANFD_RXIMR33_IM31,		31
	.EQU	CANFD_RXIMR33_IM30,		30
	.EQU	CANFD_RXIMR33_IM29,		29
	.EQU	CANFD_RXIMR33_IM28,		28
	.EQU	CANFD_RXIMR33_IM27,		27
	.EQU	CANFD_RXIMR33_IM26,		26
	.EQU	CANFD_RXIMR33_IM25,		25
	.EQU	CANFD_RXIMR33_IM24,		24
	.EQU	CANFD_RXIMR33_IM23,		23
	.EQU	CANFD_RXIMR33_IM22,		22
	.EQU	CANFD_RXIMR33_IM21,		21
	.EQU	CANFD_RXIMR33_IM20,		20
	.EQU	CANFD_RXIMR33_IM19,		19
	.EQU	CANFD_RXIMR33_IM18,		18
	.EQU	CANFD_RXIMR33_IM17,		17
	.EQU	CANFD_RXIMR33_IM16,		16
	.EQU	CANFD_RXIMR33_IM15,		15
	.EQU	CANFD_RXIMR33_IM14,		14
	.EQU	CANFD_RXIMR33_IM13,		13
	.EQU	CANFD_RXIMR33_IM12,		12
	.EQU	CANFD_RXIMR33_IM11,		11
	.EQU	CANFD_RXIMR33_IM10,		10
	.EQU	CANFD_RXIMR33_IM9,		9
	.EQU	CANFD_RXIMR33_IM8,		8
	.EQU	CANFD_RXIMR33_IM7,		7
	.EQU	CANFD_RXIMR33_IM6,		6
	.EQU	CANFD_RXIMR33_IM5,		5
	.EQU	CANFD_RXIMR33_IM4,		4
	.EQU	CANFD_RXIMR33_IM3,		3
	.EQU	CANFD_RXIMR33_IM2,		2
	.EQU	CANFD_RXIMR33_IM1,		1
	.EQU	CANFD_RXIMR33_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR34,	0x40004908
//  0x4000 4908  CANFD_RXIMR34   Bits-------------------------------------
	.EQU	CANFD_RXIMR34_IM31,		31
	.EQU	CANFD_RXIMR34_IM30,		30
	.EQU	CANFD_RXIMR34_IM29,		29
	.EQU	CANFD_RXIMR34_IM28,		28
	.EQU	CANFD_RXIMR34_IM27,		27
	.EQU	CANFD_RXIMR34_IM26,		26
	.EQU	CANFD_RXIMR34_IM25,		25
	.EQU	CANFD_RXIMR34_IM24,		24
	.EQU	CANFD_RXIMR34_IM23,		23
	.EQU	CANFD_RXIMR34_IM22,		22
	.EQU	CANFD_RXIMR34_IM21,		21
	.EQU	CANFD_RXIMR34_IM20,		20
	.EQU	CANFD_RXIMR34_IM19,		19
	.EQU	CANFD_RXIMR34_IM18,		18
	.EQU	CANFD_RXIMR34_IM17,		17
	.EQU	CANFD_RXIMR34_IM16,		16
	.EQU	CANFD_RXIMR34_IM15,		15
	.EQU	CANFD_RXIMR34_IM14,		14
	.EQU	CANFD_RXIMR34_IM13,		13
	.EQU	CANFD_RXIMR34_IM12,		12
	.EQU	CANFD_RXIMR34_IM11,		11
	.EQU	CANFD_RXIMR34_IM10,		10
	.EQU	CANFD_RXIMR34_IM9,		9
	.EQU	CANFD_RXIMR34_IM8,		8
	.EQU	CANFD_RXIMR34_IM7,		7
	.EQU	CANFD_RXIMR34_IM6,		6
	.EQU	CANFD_RXIMR34_IM5,		5
	.EQU	CANFD_RXIMR34_IM4,		4
	.EQU	CANFD_RXIMR34_IM3,		3
	.EQU	CANFD_RXIMR34_IM2,		2
	.EQU	CANFD_RXIMR34_IM1,		1
	.EQU	CANFD_RXIMR34_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR35,	0x4000490C
//  0x4000 490C  CANFD_RXIMR35   Bits-------------------------------------
	.EQU	CANFD_RXIMR35_IM31,		31
	.EQU	CANFD_RXIMR35_IM30,		30
	.EQU	CANFD_RXIMR35_IM29,		29
	.EQU	CANFD_RXIMR35_IM28,		28
	.EQU	CANFD_RXIMR35_IM27,		27
	.EQU	CANFD_RXIMR35_IM26,		26
	.EQU	CANFD_RXIMR35_IM25,		25
	.EQU	CANFD_RXIMR35_IM24,		24
	.EQU	CANFD_RXIMR35_IM23,		23
	.EQU	CANFD_RXIMR35_IM22,		22
	.EQU	CANFD_RXIMR35_IM21,		21
	.EQU	CANFD_RXIMR35_IM20,		20
	.EQU	CANFD_RXIMR35_IM19,		19
	.EQU	CANFD_RXIMR35_IM18,		18
	.EQU	CANFD_RXIMR35_IM17,		17
	.EQU	CANFD_RXIMR35_IM16,		16
	.EQU	CANFD_RXIMR35_IM15,		15
	.EQU	CANFD_RXIMR35_IM14,		14
	.EQU	CANFD_RXIMR35_IM13,		13
	.EQU	CANFD_RXIMR35_IM12,		12
	.EQU	CANFD_RXIMR35_IM11,		11
	.EQU	CANFD_RXIMR35_IM10,		10
	.EQU	CANFD_RXIMR35_IM9,		9
	.EQU	CANFD_RXIMR35_IM8,		8
	.EQU	CANFD_RXIMR35_IM7,		7
	.EQU	CANFD_RXIMR35_IM6,		6
	.EQU	CANFD_RXIMR35_IM5,		5
	.EQU	CANFD_RXIMR35_IM4,		4
	.EQU	CANFD_RXIMR35_IM3,		3
	.EQU	CANFD_RXIMR35_IM2,		2
	.EQU	CANFD_RXIMR35_IM1,		1
	.EQU	CANFD_RXIMR35_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR36,	0x40004910
//  0x4000 4910  CANFD_RXIMR36   Bits-------------------------------------
	.EQU	CANFD_RXIMR36_IM31,		31
	.EQU	CANFD_RXIMR36_IM30,		30
	.EQU	CANFD_RXIMR36_IM29,		29
	.EQU	CANFD_RXIMR36_IM28,		28
	.EQU	CANFD_RXIMR36_IM27,		27
	.EQU	CANFD_RXIMR36_IM26,		26
	.EQU	CANFD_RXIMR36_IM25,		25
	.EQU	CANFD_RXIMR36_IM24,		24
	.EQU	CANFD_RXIMR36_IM23,		23
	.EQU	CANFD_RXIMR36_IM22,		22
	.EQU	CANFD_RXIMR36_IM21,		21
	.EQU	CANFD_RXIMR36_IM20,		20
	.EQU	CANFD_RXIMR36_IM19,		19
	.EQU	CANFD_RXIMR36_IM18,		18
	.EQU	CANFD_RXIMR36_IM17,		17
	.EQU	CANFD_RXIMR36_IM16,		16
	.EQU	CANFD_RXIMR36_IM15,		15
	.EQU	CANFD_RXIMR36_IM14,		14
	.EQU	CANFD_RXIMR36_IM13,		13
	.EQU	CANFD_RXIMR36_IM12,		12
	.EQU	CANFD_RXIMR36_IM11,		11
	.EQU	CANFD_RXIMR36_IM10,		10
	.EQU	CANFD_RXIMR36_IM9,		9
	.EQU	CANFD_RXIMR36_IM8,		8
	.EQU	CANFD_RXIMR36_IM7,		7
	.EQU	CANFD_RXIMR36_IM6,		6
	.EQU	CANFD_RXIMR36_IM5,		5
	.EQU	CANFD_RXIMR36_IM4,		4
	.EQU	CANFD_RXIMR36_IM3,		3
	.EQU	CANFD_RXIMR36_IM2,		2
	.EQU	CANFD_RXIMR36_IM1,		1
	.EQU	CANFD_RXIMR36_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR37,	0x40004914
//  0x4000 4914  CANFD_RXIMR37   Bits-------------------------------------
	.EQU	CANFD_RXIMR37_IM31,		31
	.EQU	CANFD_RXIMR37_IM30,		30
	.EQU	CANFD_RXIMR37_IM29,		29
	.EQU	CANFD_RXIMR37_IM28,		28
	.EQU	CANFD_RXIMR37_IM27,		27
	.EQU	CANFD_RXIMR37_IM26,		26
	.EQU	CANFD_RXIMR37_IM25,		25
	.EQU	CANFD_RXIMR37_IM24,		24
	.EQU	CANFD_RXIMR37_IM23,		23
	.EQU	CANFD_RXIMR37_IM22,		22
	.EQU	CANFD_RXIMR37_IM21,		21
	.EQU	CANFD_RXIMR37_IM20,		20
	.EQU	CANFD_RXIMR37_IM19,		19
	.EQU	CANFD_RXIMR37_IM18,		18
	.EQU	CANFD_RXIMR37_IM17,		17
	.EQU	CANFD_RXIMR37_IM16,		16
	.EQU	CANFD_RXIMR37_IM15,		15
	.EQU	CANFD_RXIMR37_IM14,		14
	.EQU	CANFD_RXIMR37_IM13,		13
	.EQU	CANFD_RXIMR37_IM12,		12
	.EQU	CANFD_RXIMR37_IM11,		11
	.EQU	CANFD_RXIMR37_IM10,		10
	.EQU	CANFD_RXIMR37_IM9,		9
	.EQU	CANFD_RXIMR37_IM8,		8
	.EQU	CANFD_RXIMR37_IM7,		7
	.EQU	CANFD_RXIMR37_IM6,		6
	.EQU	CANFD_RXIMR37_IM5,		5
	.EQU	CANFD_RXIMR37_IM4,		4
	.EQU	CANFD_RXIMR37_IM3,		3
	.EQU	CANFD_RXIMR37_IM2,		2
	.EQU	CANFD_RXIMR37_IM1,		1
	.EQU	CANFD_RXIMR37_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR38,	0x40004918
//  0x4000 4918  CANFD_RXIMR38   Bits-------------------------------------
	.EQU	CANFD_RXIMR38_IM31,		31
	.EQU	CANFD_RXIMR38_IM30,		30
	.EQU	CANFD_RXIMR38_IM29,		29
	.EQU	CANFD_RXIMR38_IM28,		28
	.EQU	CANFD_RXIMR38_IM27,		27
	.EQU	CANFD_RXIMR38_IM26,		26
	.EQU	CANFD_RXIMR38_IM25,		25
	.EQU	CANFD_RXIMR38_IM24,		24
	.EQU	CANFD_RXIMR38_IM23,		23
	.EQU	CANFD_RXIMR38_IM22,		22
	.EQU	CANFD_RXIMR38_IM21,		21
	.EQU	CANFD_RXIMR38_IM20,		20
	.EQU	CANFD_RXIMR38_IM19,		19
	.EQU	CANFD_RXIMR38_IM18,		18
	.EQU	CANFD_RXIMR38_IM17,		17
	.EQU	CANFD_RXIMR38_IM16,		16
	.EQU	CANFD_RXIMR38_IM15,		15
	.EQU	CANFD_RXIMR38_IM14,		14
	.EQU	CANFD_RXIMR38_IM13,		13
	.EQU	CANFD_RXIMR38_IM12,		12
	.EQU	CANFD_RXIMR38_IM11,		11
	.EQU	CANFD_RXIMR38_IM10,		10
	.EQU	CANFD_RXIMR38_IM9,		9
	.EQU	CANFD_RXIMR38_IM8,		8
	.EQU	CANFD_RXIMR38_IM7,		7
	.EQU	CANFD_RXIMR38_IM6,		6
	.EQU	CANFD_RXIMR38_IM5,		5
	.EQU	CANFD_RXIMR38_IM4,		4
	.EQU	CANFD_RXIMR38_IM3,		3
	.EQU	CANFD_RXIMR38_IM2,		2
	.EQU	CANFD_RXIMR38_IM1,		1
	.EQU	CANFD_RXIMR38_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR39,	0x4000491C
//  0x4000 491C  CANFD_RXIMR39   Bits-------------------------------------
	.EQU	CANFD_RXIMR39_IM31,		31
	.EQU	CANFD_RXIMR39_IM30,		30
	.EQU	CANFD_RXIMR39_IM29,		29
	.EQU	CANFD_RXIMR39_IM28,		28
	.EQU	CANFD_RXIMR39_IM27,		27
	.EQU	CANFD_RXIMR39_IM26,		26
	.EQU	CANFD_RXIMR39_IM25,		25
	.EQU	CANFD_RXIMR39_IM24,		24
	.EQU	CANFD_RXIMR39_IM23,		23
	.EQU	CANFD_RXIMR39_IM22,		22
	.EQU	CANFD_RXIMR39_IM21,		21
	.EQU	CANFD_RXIMR39_IM20,		20
	.EQU	CANFD_RXIMR39_IM19,		19
	.EQU	CANFD_RXIMR39_IM18,		18
	.EQU	CANFD_RXIMR39_IM17,		17
	.EQU	CANFD_RXIMR39_IM16,		16
	.EQU	CANFD_RXIMR39_IM15,		15
	.EQU	CANFD_RXIMR39_IM14,		14
	.EQU	CANFD_RXIMR39_IM13,		13
	.EQU	CANFD_RXIMR39_IM12,		12
	.EQU	CANFD_RXIMR39_IM11,		11
	.EQU	CANFD_RXIMR39_IM10,		10
	.EQU	CANFD_RXIMR39_IM9,		9
	.EQU	CANFD_RXIMR39_IM8,		8
	.EQU	CANFD_RXIMR39_IM7,		7
	.EQU	CANFD_RXIMR39_IM6,		6
	.EQU	CANFD_RXIMR39_IM5,		5
	.EQU	CANFD_RXIMR39_IM4,		4
	.EQU	CANFD_RXIMR39_IM3,		3
	.EQU	CANFD_RXIMR39_IM2,		2
	.EQU	CANFD_RXIMR39_IM1,		1
	.EQU	CANFD_RXIMR39_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR40,	0x40004920
//  0x4000 4920  CANFD_RXIMR40   Bits-------------------------------------
	.EQU	CANFD_RXIMR40_IM31,		31
	.EQU	CANFD_RXIMR40_IM30,		30
	.EQU	CANFD_RXIMR40_IM29,		29
	.EQU	CANFD_RXIMR40_IM28,		28
	.EQU	CANFD_RXIMR40_IM27,		27
	.EQU	CANFD_RXIMR40_IM26,		26
	.EQU	CANFD_RXIMR40_IM25,		25
	.EQU	CANFD_RXIMR40_IM24,		24
	.EQU	CANFD_RXIMR40_IM23,		23
	.EQU	CANFD_RXIMR40_IM22,		22
	.EQU	CANFD_RXIMR40_IM21,		21
	.EQU	CANFD_RXIMR40_IM20,		20
	.EQU	CANFD_RXIMR40_IM19,		19
	.EQU	CANFD_RXIMR40_IM18,		18
	.EQU	CANFD_RXIMR40_IM17,		17
	.EQU	CANFD_RXIMR40_IM16,		16
	.EQU	CANFD_RXIMR40_IM15,		15
	.EQU	CANFD_RXIMR40_IM14,		14
	.EQU	CANFD_RXIMR40_IM13,		13
	.EQU	CANFD_RXIMR40_IM12,		12
	.EQU	CANFD_RXIMR40_IM11,		11
	.EQU	CANFD_RXIMR40_IM10,		10
	.EQU	CANFD_RXIMR40_IM9,		9
	.EQU	CANFD_RXIMR40_IM8,		8
	.EQU	CANFD_RXIMR40_IM7,		7
	.EQU	CANFD_RXIMR40_IM6,		6
	.EQU	CANFD_RXIMR40_IM5,		5
	.EQU	CANFD_RXIMR40_IM4,		4
	.EQU	CANFD_RXIMR40_IM3,		3
	.EQU	CANFD_RXIMR40_IM2,		2
	.EQU	CANFD_RXIMR40_IM1,		1
	.EQU	CANFD_RXIMR40_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR41,	0x40004924
//  0x4000 4924  CANFD_RXIMR41   Bits-------------------------------------
	.EQU	CANFD_RXIMR41_IM31,		31
	.EQU	CANFD_RXIMR41_IM30,		30
	.EQU	CANFD_RXIMR41_IM29,		29
	.EQU	CANFD_RXIMR41_IM28,		28
	.EQU	CANFD_RXIMR41_IM27,		27
	.EQU	CANFD_RXIMR41_IM26,		26
	.EQU	CANFD_RXIMR41_IM25,		25
	.EQU	CANFD_RXIMR41_IM24,		24
	.EQU	CANFD_RXIMR41_IM23,		23
	.EQU	CANFD_RXIMR41_IM22,		22
	.EQU	CANFD_RXIMR41_IM21,		21
	.EQU	CANFD_RXIMR41_IM20,		20
	.EQU	CANFD_RXIMR41_IM19,		19
	.EQU	CANFD_RXIMR41_IM18,		18
	.EQU	CANFD_RXIMR41_IM17,		17
	.EQU	CANFD_RXIMR41_IM16,		16
	.EQU	CANFD_RXIMR41_IM15,		15
	.EQU	CANFD_RXIMR41_IM14,		14
	.EQU	CANFD_RXIMR41_IM13,		13
	.EQU	CANFD_RXIMR41_IM12,		12
	.EQU	CANFD_RXIMR41_IM11,		11
	.EQU	CANFD_RXIMR41_IM10,		10
	.EQU	CANFD_RXIMR41_IM9,		9
	.EQU	CANFD_RXIMR41_IM8,		8
	.EQU	CANFD_RXIMR41_IM7,		7
	.EQU	CANFD_RXIMR41_IM6,		6
	.EQU	CANFD_RXIMR41_IM5,		5
	.EQU	CANFD_RXIMR41_IM4,		4
	.EQU	CANFD_RXIMR41_IM3,		3
	.EQU	CANFD_RXIMR41_IM2,		2
	.EQU	CANFD_RXIMR41_IM1,		1
	.EQU	CANFD_RXIMR41_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR42,	0x40004928
//  0x4000 4928  CANFD_RXIMR42   Bits-------------------------------------
	.EQU	CANFD_RXIMR42_IM31,		31
	.EQU	CANFD_RXIMR42_IM30,		30
	.EQU	CANFD_RXIMR42_IM29,		29
	.EQU	CANFD_RXIMR42_IM28,		28
	.EQU	CANFD_RXIMR42_IM27,		27
	.EQU	CANFD_RXIMR42_IM26,		26
	.EQU	CANFD_RXIMR42_IM25,		25
	.EQU	CANFD_RXIMR42_IM24,		24
	.EQU	CANFD_RXIMR42_IM23,		23
	.EQU	CANFD_RXIMR42_IM22,		22
	.EQU	CANFD_RXIMR42_IM21,		21
	.EQU	CANFD_RXIMR42_IM20,		20
	.EQU	CANFD_RXIMR42_IM19,		19
	.EQU	CANFD_RXIMR42_IM18,		18
	.EQU	CANFD_RXIMR42_IM17,		17
	.EQU	CANFD_RXIMR42_IM16,		16
	.EQU	CANFD_RXIMR42_IM15,		15
	.EQU	CANFD_RXIMR42_IM14,		14
	.EQU	CANFD_RXIMR42_IM13,		13
	.EQU	CANFD_RXIMR42_IM12,		12
	.EQU	CANFD_RXIMR42_IM11,		11
	.EQU	CANFD_RXIMR42_IM10,		10
	.EQU	CANFD_RXIMR42_IM9,		9
	.EQU	CANFD_RXIMR42_IM8,		8
	.EQU	CANFD_RXIMR42_IM7,		7
	.EQU	CANFD_RXIMR42_IM6,		6
	.EQU	CANFD_RXIMR42_IM5,		5
	.EQU	CANFD_RXIMR42_IM4,		4
	.EQU	CANFD_RXIMR42_IM3,		3
	.EQU	CANFD_RXIMR42_IM2,		2
	.EQU	CANFD_RXIMR42_IM1,		1
	.EQU	CANFD_RXIMR42_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR43,	0x4000492C
//  0x4000 492C  CANFD_RXIMR43   Bits-------------------------------------
	.EQU	CANFD_RXIMR43_IM31,		31
	.EQU	CANFD_RXIMR43_IM30,		30
	.EQU	CANFD_RXIMR43_IM29,		29
	.EQU	CANFD_RXIMR43_IM28,		28
	.EQU	CANFD_RXIMR43_IM27,		27
	.EQU	CANFD_RXIMR43_IM26,		26
	.EQU	CANFD_RXIMR43_IM25,		25
	.EQU	CANFD_RXIMR43_IM24,		24
	.EQU	CANFD_RXIMR43_IM23,		23
	.EQU	CANFD_RXIMR43_IM22,		22
	.EQU	CANFD_RXIMR43_IM21,		21
	.EQU	CANFD_RXIMR43_IM20,		20
	.EQU	CANFD_RXIMR43_IM19,		19
	.EQU	CANFD_RXIMR43_IM18,		18
	.EQU	CANFD_RXIMR43_IM17,		17
	.EQU	CANFD_RXIMR43_IM16,		16
	.EQU	CANFD_RXIMR43_IM15,		15
	.EQU	CANFD_RXIMR43_IM14,		14
	.EQU	CANFD_RXIMR43_IM13,		13
	.EQU	CANFD_RXIMR43_IM12,		12
	.EQU	CANFD_RXIMR43_IM11,		11
	.EQU	CANFD_RXIMR43_IM10,		10
	.EQU	CANFD_RXIMR43_IM9,		9
	.EQU	CANFD_RXIMR43_IM8,		8
	.EQU	CANFD_RXIMR43_IM7,		7
	.EQU	CANFD_RXIMR43_IM6,		6
	.EQU	CANFD_RXIMR43_IM5,		5
	.EQU	CANFD_RXIMR43_IM4,		4
	.EQU	CANFD_RXIMR43_IM3,		3
	.EQU	CANFD_RXIMR43_IM2,		2
	.EQU	CANFD_RXIMR43_IM1,		1
	.EQU	CANFD_RXIMR43_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR44,	0x40004930
//  0x4000 4930  CANFD_RXIMR44   Bits-------------------------------------
	.EQU	CANFD_RXIMR44_IM31,		31
	.EQU	CANFD_RXIMR44_IM30,		30
	.EQU	CANFD_RXIMR44_IM29,		29
	.EQU	CANFD_RXIMR44_IM28,		28
	.EQU	CANFD_RXIMR44_IM27,		27
	.EQU	CANFD_RXIMR44_IM26,		26
	.EQU	CANFD_RXIMR44_IM25,		25
	.EQU	CANFD_RXIMR44_IM24,		24
	.EQU	CANFD_RXIMR44_IM23,		23
	.EQU	CANFD_RXIMR44_IM22,		22
	.EQU	CANFD_RXIMR44_IM21,		21
	.EQU	CANFD_RXIMR44_IM20,		20
	.EQU	CANFD_RXIMR44_IM19,		19
	.EQU	CANFD_RXIMR44_IM18,		18
	.EQU	CANFD_RXIMR44_IM17,		17
	.EQU	CANFD_RXIMR44_IM16,		16
	.EQU	CANFD_RXIMR44_IM15,		15
	.EQU	CANFD_RXIMR44_IM14,		14
	.EQU	CANFD_RXIMR44_IM13,		13
	.EQU	CANFD_RXIMR44_IM12,		12
	.EQU	CANFD_RXIMR44_IM11,		11
	.EQU	CANFD_RXIMR44_IM10,		10
	.EQU	CANFD_RXIMR44_IM9,		9
	.EQU	CANFD_RXIMR44_IM8,		8
	.EQU	CANFD_RXIMR44_IM7,		7
	.EQU	CANFD_RXIMR44_IM6,		6
	.EQU	CANFD_RXIMR44_IM5,		5
	.EQU	CANFD_RXIMR44_IM4,		4
	.EQU	CANFD_RXIMR44_IM3,		3
	.EQU	CANFD_RXIMR44_IM2,		2
	.EQU	CANFD_RXIMR44_IM1,		1
	.EQU	CANFD_RXIMR44_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR45,	0x40004934
//  0x4000 4934  CANFD_RXIMR45   Bits-------------------------------------
	.EQU	CANFD_RXIMR45_IM31,		31
	.EQU	CANFD_RXIMR45_IM30,		30
	.EQU	CANFD_RXIMR45_IM29,		29
	.EQU	CANFD_RXIMR45_IM28,		28
	.EQU	CANFD_RXIMR45_IM27,		27
	.EQU	CANFD_RXIMR45_IM26,		26
	.EQU	CANFD_RXIMR45_IM25,		25
	.EQU	CANFD_RXIMR45_IM24,		24
	.EQU	CANFD_RXIMR45_IM23,		23
	.EQU	CANFD_RXIMR45_IM22,		22
	.EQU	CANFD_RXIMR45_IM21,		21
	.EQU	CANFD_RXIMR45_IM20,		20
	.EQU	CANFD_RXIMR45_IM19,		19
	.EQU	CANFD_RXIMR45_IM18,		18
	.EQU	CANFD_RXIMR45_IM17,		17
	.EQU	CANFD_RXIMR45_IM16,		16
	.EQU	CANFD_RXIMR45_IM15,		15
	.EQU	CANFD_RXIMR45_IM14,		14
	.EQU	CANFD_RXIMR45_IM13,		13
	.EQU	CANFD_RXIMR45_IM12,		12
	.EQU	CANFD_RXIMR45_IM11,		11
	.EQU	CANFD_RXIMR45_IM10,		10
	.EQU	CANFD_RXIMR45_IM9,		9
	.EQU	CANFD_RXIMR45_IM8,		8
	.EQU	CANFD_RXIMR45_IM7,		7
	.EQU	CANFD_RXIMR45_IM6,		6
	.EQU	CANFD_RXIMR45_IM5,		5
	.EQU	CANFD_RXIMR45_IM4,		4
	.EQU	CANFD_RXIMR45_IM3,		3
	.EQU	CANFD_RXIMR45_IM2,		2
	.EQU	CANFD_RXIMR45_IM1,		1
	.EQU	CANFD_RXIMR45_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR46,	0x40004938
//  0x4000 4938  CANFD_RXIMR46   Bits-------------------------------------
	.EQU	CANFD_RXIMR46_IM31,		31
	.EQU	CANFD_RXIMR46_IM30,		30
	.EQU	CANFD_RXIMR46_IM29,		29
	.EQU	CANFD_RXIMR46_IM28,		28
	.EQU	CANFD_RXIMR46_IM27,		27
	.EQU	CANFD_RXIMR46_IM26,		26
	.EQU	CANFD_RXIMR46_IM25,		25
	.EQU	CANFD_RXIMR46_IM24,		24
	.EQU	CANFD_RXIMR46_IM23,		23
	.EQU	CANFD_RXIMR46_IM22,		22
	.EQU	CANFD_RXIMR46_IM21,		21
	.EQU	CANFD_RXIMR46_IM20,		20
	.EQU	CANFD_RXIMR46_IM19,		19
	.EQU	CANFD_RXIMR46_IM18,		18
	.EQU	CANFD_RXIMR46_IM17,		17
	.EQU	CANFD_RXIMR46_IM16,		16
	.EQU	CANFD_RXIMR46_IM15,		15
	.EQU	CANFD_RXIMR46_IM14,		14
	.EQU	CANFD_RXIMR46_IM13,		13
	.EQU	CANFD_RXIMR46_IM12,		12
	.EQU	CANFD_RXIMR46_IM11,		11
	.EQU	CANFD_RXIMR46_IM10,		10
	.EQU	CANFD_RXIMR46_IM9,		9
	.EQU	CANFD_RXIMR46_IM8,		8
	.EQU	CANFD_RXIMR46_IM7,		7
	.EQU	CANFD_RXIMR46_IM6,		6
	.EQU	CANFD_RXIMR46_IM5,		5
	.EQU	CANFD_RXIMR46_IM4,		4
	.EQU	CANFD_RXIMR46_IM3,		3
	.EQU	CANFD_RXIMR46_IM2,		2
	.EQU	CANFD_RXIMR46_IM1,		1
	.EQU	CANFD_RXIMR46_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR47,	0x4000493C
//  0x4000 493C  CANFD_RXIMR47   Bits-------------------------------------
	.EQU	CANFD_RXIMR47_IM31,		31
	.EQU	CANFD_RXIMR47_IM30,		30
	.EQU	CANFD_RXIMR47_IM29,		29
	.EQU	CANFD_RXIMR47_IM28,		28
	.EQU	CANFD_RXIMR47_IM27,		27
	.EQU	CANFD_RXIMR47_IM26,		26
	.EQU	CANFD_RXIMR47_IM25,		25
	.EQU	CANFD_RXIMR47_IM24,		24
	.EQU	CANFD_RXIMR47_IM23,		23
	.EQU	CANFD_RXIMR47_IM22,		22
	.EQU	CANFD_RXIMR47_IM21,		21
	.EQU	CANFD_RXIMR47_IM20,		20
	.EQU	CANFD_RXIMR47_IM19,		19
	.EQU	CANFD_RXIMR47_IM18,		18
	.EQU	CANFD_RXIMR47_IM17,		17
	.EQU	CANFD_RXIMR47_IM16,		16
	.EQU	CANFD_RXIMR47_IM15,		15
	.EQU	CANFD_RXIMR47_IM14,		14
	.EQU	CANFD_RXIMR47_IM13,		13
	.EQU	CANFD_RXIMR47_IM12,		12
	.EQU	CANFD_RXIMR47_IM11,		11
	.EQU	CANFD_RXIMR47_IM10,		10
	.EQU	CANFD_RXIMR47_IM9,		9
	.EQU	CANFD_RXIMR47_IM8,		8
	.EQU	CANFD_RXIMR47_IM7,		7
	.EQU	CANFD_RXIMR47_IM6,		6
	.EQU	CANFD_RXIMR47_IM5,		5
	.EQU	CANFD_RXIMR47_IM4,		4
	.EQU	CANFD_RXIMR47_IM3,		3
	.EQU	CANFD_RXIMR47_IM2,		2
	.EQU	CANFD_RXIMR47_IM1,		1
	.EQU	CANFD_RXIMR47_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR48,	0x40004940
//  0x4000 4940  CANFD_RXIMR48   Bits-------------------------------------
	.EQU	CANFD_RXIMR48_IM31,		31
	.EQU	CANFD_RXIMR48_IM30,		30
	.EQU	CANFD_RXIMR48_IM29,		29
	.EQU	CANFD_RXIMR48_IM28,		28
	.EQU	CANFD_RXIMR48_IM27,		27
	.EQU	CANFD_RXIMR48_IM26,		26
	.EQU	CANFD_RXIMR48_IM25,		25
	.EQU	CANFD_RXIMR48_IM24,		24
	.EQU	CANFD_RXIMR48_IM23,		23
	.EQU	CANFD_RXIMR48_IM22,		22
	.EQU	CANFD_RXIMR48_IM21,		21
	.EQU	CANFD_RXIMR48_IM20,		20
	.EQU	CANFD_RXIMR48_IM19,		19
	.EQU	CANFD_RXIMR48_IM18,		18
	.EQU	CANFD_RXIMR48_IM17,		17
	.EQU	CANFD_RXIMR48_IM16,		16
	.EQU	CANFD_RXIMR48_IM15,		15
	.EQU	CANFD_RXIMR48_IM14,		14
	.EQU	CANFD_RXIMR48_IM13,		13
	.EQU	CANFD_RXIMR48_IM12,		12
	.EQU	CANFD_RXIMR48_IM11,		11
	.EQU	CANFD_RXIMR48_IM10,		10
	.EQU	CANFD_RXIMR48_IM9,		9
	.EQU	CANFD_RXIMR48_IM8,		8
	.EQU	CANFD_RXIMR48_IM7,		7
	.EQU	CANFD_RXIMR48_IM6,		6
	.EQU	CANFD_RXIMR48_IM5,		5
	.EQU	CANFD_RXIMR48_IM4,		4
	.EQU	CANFD_RXIMR48_IM3,		3
	.EQU	CANFD_RXIMR48_IM2,		2
	.EQU	CANFD_RXIMR48_IM1,		1
	.EQU	CANFD_RXIMR48_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR49,	0x40004944
//  0x4000 4944  CANFD_RXIMR49   Bits-------------------------------------
	.EQU	CANFD_RXIMR49_IM31,		31
	.EQU	CANFD_RXIMR49_IM30,		30
	.EQU	CANFD_RXIMR49_IM29,		29
	.EQU	CANFD_RXIMR49_IM28,		28
	.EQU	CANFD_RXIMR49_IM27,		27
	.EQU	CANFD_RXIMR49_IM26,		26
	.EQU	CANFD_RXIMR49_IM25,		25
	.EQU	CANFD_RXIMR49_IM24,		24
	.EQU	CANFD_RXIMR49_IM23,		23
	.EQU	CANFD_RXIMR49_IM22,		22
	.EQU	CANFD_RXIMR49_IM21,		21
	.EQU	CANFD_RXIMR49_IM20,		20
	.EQU	CANFD_RXIMR49_IM19,		19
	.EQU	CANFD_RXIMR49_IM18,		18
	.EQU	CANFD_RXIMR49_IM17,		17
	.EQU	CANFD_RXIMR49_IM16,		16
	.EQU	CANFD_RXIMR49_IM15,		15
	.EQU	CANFD_RXIMR49_IM14,		14
	.EQU	CANFD_RXIMR49_IM13,		13
	.EQU	CANFD_RXIMR49_IM12,		12
	.EQU	CANFD_RXIMR49_IM11,		11
	.EQU	CANFD_RXIMR49_IM10,		10
	.EQU	CANFD_RXIMR49_IM9,		9
	.EQU	CANFD_RXIMR49_IM8,		8
	.EQU	CANFD_RXIMR49_IM7,		7
	.EQU	CANFD_RXIMR49_IM6,		6
	.EQU	CANFD_RXIMR49_IM5,		5
	.EQU	CANFD_RXIMR49_IM4,		4
	.EQU	CANFD_RXIMR49_IM3,		3
	.EQU	CANFD_RXIMR49_IM2,		2
	.EQU	CANFD_RXIMR49_IM1,		1
	.EQU	CANFD_RXIMR49_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR50,	0x40004948
//  0x4000 4948  CANFD_RXIMR50   Bits-------------------------------------
	.EQU	CANFD_RXIMR50_IM31,		31
	.EQU	CANFD_RXIMR50_IM30,		30
	.EQU	CANFD_RXIMR50_IM29,		29
	.EQU	CANFD_RXIMR50_IM28,		28
	.EQU	CANFD_RXIMR50_IM27,		27
	.EQU	CANFD_RXIMR50_IM26,		26
	.EQU	CANFD_RXIMR50_IM25,		25
	.EQU	CANFD_RXIMR50_IM24,		24
	.EQU	CANFD_RXIMR50_IM23,		23
	.EQU	CANFD_RXIMR50_IM22,		22
	.EQU	CANFD_RXIMR50_IM21,		21
	.EQU	CANFD_RXIMR50_IM20,		20
	.EQU	CANFD_RXIMR50_IM19,		19
	.EQU	CANFD_RXIMR50_IM18,		18
	.EQU	CANFD_RXIMR50_IM17,		17
	.EQU	CANFD_RXIMR50_IM16,		16
	.EQU	CANFD_RXIMR50_IM15,		15
	.EQU	CANFD_RXIMR50_IM14,		14
	.EQU	CANFD_RXIMR50_IM13,		13
	.EQU	CANFD_RXIMR50_IM12,		12
	.EQU	CANFD_RXIMR50_IM11,		11
	.EQU	CANFD_RXIMR50_IM10,		10
	.EQU	CANFD_RXIMR50_IM9,		9
	.EQU	CANFD_RXIMR50_IM8,		8
	.EQU	CANFD_RXIMR50_IM7,		7
	.EQU	CANFD_RXIMR50_IM6,		6
	.EQU	CANFD_RXIMR50_IM5,		5
	.EQU	CANFD_RXIMR50_IM4,		4
	.EQU	CANFD_RXIMR50_IM3,		3
	.EQU	CANFD_RXIMR50_IM2,		2
	.EQU	CANFD_RXIMR50_IM1,		1
	.EQU	CANFD_RXIMR50_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR51,	0x4000494C
//  0x4000 494C  CANFD_RXIMR51   Bits-------------------------------------
	.EQU	CANFD_RXIMR51_IM31,		31
	.EQU	CANFD_RXIMR51_IM30,		30
	.EQU	CANFD_RXIMR51_IM29,		29
	.EQU	CANFD_RXIMR51_IM28,		28
	.EQU	CANFD_RXIMR51_IM27,		27
	.EQU	CANFD_RXIMR51_IM26,		26
	.EQU	CANFD_RXIMR51_IM25,		25
	.EQU	CANFD_RXIMR51_IM24,		24
	.EQU	CANFD_RXIMR51_IM23,		23
	.EQU	CANFD_RXIMR51_IM22,		22
	.EQU	CANFD_RXIMR51_IM21,		21
	.EQU	CANFD_RXIMR51_IM20,		20
	.EQU	CANFD_RXIMR51_IM19,		19
	.EQU	CANFD_RXIMR51_IM18,		18
	.EQU	CANFD_RXIMR51_IM17,		17
	.EQU	CANFD_RXIMR51_IM16,		16
	.EQU	CANFD_RXIMR51_IM15,		15
	.EQU	CANFD_RXIMR51_IM14,		14
	.EQU	CANFD_RXIMR51_IM13,		13
	.EQU	CANFD_RXIMR51_IM12,		12
	.EQU	CANFD_RXIMR51_IM11,		11
	.EQU	CANFD_RXIMR51_IM10,		10
	.EQU	CANFD_RXIMR51_IM9,		9
	.EQU	CANFD_RXIMR51_IM8,		8
	.EQU	CANFD_RXIMR51_IM7,		7
	.EQU	CANFD_RXIMR51_IM6,		6
	.EQU	CANFD_RXIMR51_IM5,		5
	.EQU	CANFD_RXIMR51_IM4,		4
	.EQU	CANFD_RXIMR51_IM3,		3
	.EQU	CANFD_RXIMR51_IM2,		2
	.EQU	CANFD_RXIMR51_IM1,		1
	.EQU	CANFD_RXIMR51_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR52,	0x40004950
//  0x4000 4950  CANFD_RXIMR52   Bits-------------------------------------
	.EQU	CANFD_RXIMR52_IM31,		31
	.EQU	CANFD_RXIMR52_IM30,		30
	.EQU	CANFD_RXIMR52_IM29,		29
	.EQU	CANFD_RXIMR52_IM28,		28
	.EQU	CANFD_RXIMR52_IM27,		27
	.EQU	CANFD_RXIMR52_IM26,		26
	.EQU	CANFD_RXIMR52_IM25,		25
	.EQU	CANFD_RXIMR52_IM24,		24
	.EQU	CANFD_RXIMR52_IM23,		23
	.EQU	CANFD_RXIMR52_IM22,		22
	.EQU	CANFD_RXIMR52_IM21,		21
	.EQU	CANFD_RXIMR52_IM20,		20
	.EQU	CANFD_RXIMR52_IM19,		19
	.EQU	CANFD_RXIMR52_IM18,		18
	.EQU	CANFD_RXIMR52_IM17,		17
	.EQU	CANFD_RXIMR52_IM16,		16
	.EQU	CANFD_RXIMR52_IM15,		15
	.EQU	CANFD_RXIMR52_IM14,		14
	.EQU	CANFD_RXIMR52_IM13,		13
	.EQU	CANFD_RXIMR52_IM12,		12
	.EQU	CANFD_RXIMR52_IM11,		11
	.EQU	CANFD_RXIMR52_IM10,		10
	.EQU	CANFD_RXIMR52_IM9,		9
	.EQU	CANFD_RXIMR52_IM8,		8
	.EQU	CANFD_RXIMR52_IM7,		7
	.EQU	CANFD_RXIMR52_IM6,		6
	.EQU	CANFD_RXIMR52_IM5,		5
	.EQU	CANFD_RXIMR52_IM4,		4
	.EQU	CANFD_RXIMR52_IM3,		3
	.EQU	CANFD_RXIMR52_IM2,		2
	.EQU	CANFD_RXIMR52_IM1,		1
	.EQU	CANFD_RXIMR52_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR53,	0x40004954
//  0x4000 4954  CANFD_RXIMR53   Bits-------------------------------------
	.EQU	CANFD_RXIMR53_IM31,		31
	.EQU	CANFD_RXIMR53_IM30,		30
	.EQU	CANFD_RXIMR53_IM29,		29
	.EQU	CANFD_RXIMR53_IM28,		28
	.EQU	CANFD_RXIMR53_IM27,		27
	.EQU	CANFD_RXIMR53_IM26,		26
	.EQU	CANFD_RXIMR53_IM25,		25
	.EQU	CANFD_RXIMR53_IM24,		24
	.EQU	CANFD_RXIMR53_IM23,		23
	.EQU	CANFD_RXIMR53_IM22,		22
	.EQU	CANFD_RXIMR53_IM21,		21
	.EQU	CANFD_RXIMR53_IM20,		20
	.EQU	CANFD_RXIMR53_IM19,		19
	.EQU	CANFD_RXIMR53_IM18,		18
	.EQU	CANFD_RXIMR53_IM17,		17
	.EQU	CANFD_RXIMR53_IM16,		16
	.EQU	CANFD_RXIMR53_IM15,		15
	.EQU	CANFD_RXIMR53_IM14,		14
	.EQU	CANFD_RXIMR53_IM13,		13
	.EQU	CANFD_RXIMR53_IM12,		12
	.EQU	CANFD_RXIMR53_IM11,		11
	.EQU	CANFD_RXIMR53_IM10,		10
	.EQU	CANFD_RXIMR53_IM9,		9
	.EQU	CANFD_RXIMR53_IM8,		8
	.EQU	CANFD_RXIMR53_IM7,		7
	.EQU	CANFD_RXIMR53_IM6,		6
	.EQU	CANFD_RXIMR53_IM5,		5
	.EQU	CANFD_RXIMR53_IM4,		4
	.EQU	CANFD_RXIMR53_IM3,		3
	.EQU	CANFD_RXIMR53_IM2,		2
	.EQU	CANFD_RXIMR53_IM1,		1
	.EQU	CANFD_RXIMR53_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR54,	0x40004958
//  0x4000 4958  CANFD_RXIMR54   Bits-------------------------------------
	.EQU	CANFD_RXIMR54_IM31,		31
	.EQU	CANFD_RXIMR54_IM30,		30
	.EQU	CANFD_RXIMR54_IM29,		29
	.EQU	CANFD_RXIMR54_IM28,		28
	.EQU	CANFD_RXIMR54_IM27,		27
	.EQU	CANFD_RXIMR54_IM26,		26
	.EQU	CANFD_RXIMR54_IM25,		25
	.EQU	CANFD_RXIMR54_IM24,		24
	.EQU	CANFD_RXIMR54_IM23,		23
	.EQU	CANFD_RXIMR54_IM22,		22
	.EQU	CANFD_RXIMR54_IM21,		21
	.EQU	CANFD_RXIMR54_IM20,		20
	.EQU	CANFD_RXIMR54_IM19,		19
	.EQU	CANFD_RXIMR54_IM18,		18
	.EQU	CANFD_RXIMR54_IM17,		17
	.EQU	CANFD_RXIMR54_IM16,		16
	.EQU	CANFD_RXIMR54_IM15,		15
	.EQU	CANFD_RXIMR54_IM14,		14
	.EQU	CANFD_RXIMR54_IM13,		13
	.EQU	CANFD_RXIMR54_IM12,		12
	.EQU	CANFD_RXIMR54_IM11,		11
	.EQU	CANFD_RXIMR54_IM10,		10
	.EQU	CANFD_RXIMR54_IM9,		9
	.EQU	CANFD_RXIMR54_IM8,		8
	.EQU	CANFD_RXIMR54_IM7,		7
	.EQU	CANFD_RXIMR54_IM6,		6
	.EQU	CANFD_RXIMR54_IM5,		5
	.EQU	CANFD_RXIMR54_IM4,		4
	.EQU	CANFD_RXIMR54_IM3,		3
	.EQU	CANFD_RXIMR54_IM2,		2
	.EQU	CANFD_RXIMR54_IM1,		1
	.EQU	CANFD_RXIMR54_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR55,	0x4000495C
//  0x4000 495C  CANFD_RXIMR55   Bits-------------------------------------
	.EQU	CANFD_RXIMR55_IM31,		31
	.EQU	CANFD_RXIMR55_IM30,		30
	.EQU	CANFD_RXIMR55_IM29,		29
	.EQU	CANFD_RXIMR55_IM28,		28
	.EQU	CANFD_RXIMR55_IM27,		27
	.EQU	CANFD_RXIMR55_IM26,		26
	.EQU	CANFD_RXIMR55_IM25,		25
	.EQU	CANFD_RXIMR55_IM24,		24
	.EQU	CANFD_RXIMR55_IM23,		23
	.EQU	CANFD_RXIMR55_IM22,		22
	.EQU	CANFD_RXIMR55_IM21,		21
	.EQU	CANFD_RXIMR55_IM20,		20
	.EQU	CANFD_RXIMR55_IM19,		19
	.EQU	CANFD_RXIMR55_IM18,		18
	.EQU	CANFD_RXIMR55_IM17,		17
	.EQU	CANFD_RXIMR55_IM16,		16
	.EQU	CANFD_RXIMR55_IM15,		15
	.EQU	CANFD_RXIMR55_IM14,		14
	.EQU	CANFD_RXIMR55_IM13,		13
	.EQU	CANFD_RXIMR55_IM12,		12
	.EQU	CANFD_RXIMR55_IM11,		11
	.EQU	CANFD_RXIMR55_IM10,		10
	.EQU	CANFD_RXIMR55_IM9,		9
	.EQU	CANFD_RXIMR55_IM8,		8
	.EQU	CANFD_RXIMR55_IM7,		7
	.EQU	CANFD_RXIMR55_IM6,		6
	.EQU	CANFD_RXIMR55_IM5,		5
	.EQU	CANFD_RXIMR55_IM4,		4
	.EQU	CANFD_RXIMR55_IM3,		3
	.EQU	CANFD_RXIMR55_IM2,		2
	.EQU	CANFD_RXIMR55_IM1,		1
	.EQU	CANFD_RXIMR55_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR56,	0x40004960
//  0x4000 4960  CANFD_RXIMR56   Bits-------------------------------------
	.EQU	CANFD_RXIMR56_IM31,		31
	.EQU	CANFD_RXIMR56_IM30,		30
	.EQU	CANFD_RXIMR56_IM29,		29
	.EQU	CANFD_RXIMR56_IM28,		28
	.EQU	CANFD_RXIMR56_IM27,		27
	.EQU	CANFD_RXIMR56_IM26,		26
	.EQU	CANFD_RXIMR56_IM25,		25
	.EQU	CANFD_RXIMR56_IM24,		24
	.EQU	CANFD_RXIMR56_IM23,		23
	.EQU	CANFD_RXIMR56_IM22,		22
	.EQU	CANFD_RXIMR56_IM21,		21
	.EQU	CANFD_RXIMR56_IM20,		20
	.EQU	CANFD_RXIMR56_IM19,		19
	.EQU	CANFD_RXIMR56_IM18,		18
	.EQU	CANFD_RXIMR56_IM17,		17
	.EQU	CANFD_RXIMR56_IM16,		16
	.EQU	CANFD_RXIMR56_IM15,		15
	.EQU	CANFD_RXIMR56_IM14,		14
	.EQU	CANFD_RXIMR56_IM13,		13
	.EQU	CANFD_RXIMR56_IM12,		12
	.EQU	CANFD_RXIMR56_IM11,		11
	.EQU	CANFD_RXIMR56_IM10,		10
	.EQU	CANFD_RXIMR56_IM9,		9
	.EQU	CANFD_RXIMR56_IM8,		8
	.EQU	CANFD_RXIMR56_IM7,		7
	.EQU	CANFD_RXIMR56_IM6,		6
	.EQU	CANFD_RXIMR56_IM5,		5
	.EQU	CANFD_RXIMR56_IM4,		4
	.EQU	CANFD_RXIMR56_IM3,		3
	.EQU	CANFD_RXIMR56_IM2,		2
	.EQU	CANFD_RXIMR56_IM1,		1
	.EQU	CANFD_RXIMR56_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR57,	0x40004964
//  0x4000 4964  CANFD_RXIMR57   Bits-------------------------------------
	.EQU	CANFD_RXIMR57_IM31,		31
	.EQU	CANFD_RXIMR57_IM30,		30
	.EQU	CANFD_RXIMR57_IM29,		29
	.EQU	CANFD_RXIMR57_IM28,		28
	.EQU	CANFD_RXIMR57_IM27,		27
	.EQU	CANFD_RXIMR57_IM26,		26
	.EQU	CANFD_RXIMR57_IM25,		25
	.EQU	CANFD_RXIMR57_IM24,		24
	.EQU	CANFD_RXIMR57_IM23,		23
	.EQU	CANFD_RXIMR57_IM22,		22
	.EQU	CANFD_RXIMR57_IM21,		21
	.EQU	CANFD_RXIMR57_IM20,		20
	.EQU	CANFD_RXIMR57_IM19,		19
	.EQU	CANFD_RXIMR57_IM18,		18
	.EQU	CANFD_RXIMR57_IM17,		17
	.EQU	CANFD_RXIMR57_IM16,		16
	.EQU	CANFD_RXIMR57_IM15,		15
	.EQU	CANFD_RXIMR57_IM14,		14
	.EQU	CANFD_RXIMR57_IM13,		13
	.EQU	CANFD_RXIMR57_IM12,		12
	.EQU	CANFD_RXIMR57_IM11,		11
	.EQU	CANFD_RXIMR57_IM10,		10
	.EQU	CANFD_RXIMR57_IM9,		9
	.EQU	CANFD_RXIMR57_IM8,		8
	.EQU	CANFD_RXIMR57_IM7,		7
	.EQU	CANFD_RXIMR57_IM6,		6
	.EQU	CANFD_RXIMR57_IM5,		5
	.EQU	CANFD_RXIMR57_IM4,		4
	.EQU	CANFD_RXIMR57_IM3,		3
	.EQU	CANFD_RXIMR57_IM2,		2
	.EQU	CANFD_RXIMR57_IM1,		1
	.EQU	CANFD_RXIMR57_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR58,	0x40004968
//  0x4000 4968  CANFD_RXIMR58   Bits-------------------------------------
	.EQU	CANFD_RXIMR58_IM31,		31
	.EQU	CANFD_RXIMR58_IM30,		30
	.EQU	CANFD_RXIMR58_IM29,		29
	.EQU	CANFD_RXIMR58_IM28,		28
	.EQU	CANFD_RXIMR58_IM27,		27
	.EQU	CANFD_RXIMR58_IM26,		26
	.EQU	CANFD_RXIMR58_IM25,		25
	.EQU	CANFD_RXIMR58_IM24,		24
	.EQU	CANFD_RXIMR58_IM23,		23
	.EQU	CANFD_RXIMR58_IM22,		22
	.EQU	CANFD_RXIMR58_IM21,		21
	.EQU	CANFD_RXIMR58_IM20,		20
	.EQU	CANFD_RXIMR58_IM19,		19
	.EQU	CANFD_RXIMR58_IM18,		18
	.EQU	CANFD_RXIMR58_IM17,		17
	.EQU	CANFD_RXIMR58_IM16,		16
	.EQU	CANFD_RXIMR58_IM15,		15
	.EQU	CANFD_RXIMR58_IM14,		14
	.EQU	CANFD_RXIMR58_IM13,		13
	.EQU	CANFD_RXIMR58_IM12,		12
	.EQU	CANFD_RXIMR58_IM11,		11
	.EQU	CANFD_RXIMR58_IM10,		10
	.EQU	CANFD_RXIMR58_IM9,		9
	.EQU	CANFD_RXIMR58_IM8,		8
	.EQU	CANFD_RXIMR58_IM7,		7
	.EQU	CANFD_RXIMR58_IM6,		6
	.EQU	CANFD_RXIMR58_IM5,		5
	.EQU	CANFD_RXIMR58_IM4,		4
	.EQU	CANFD_RXIMR58_IM3,		3
	.EQU	CANFD_RXIMR58_IM2,		2
	.EQU	CANFD_RXIMR58_IM1,		1
	.EQU	CANFD_RXIMR58_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR59,	0x4000496C
//  0x4000 496C  CANFD_RXIMR59   Bits-------------------------------------
	.EQU	CANFD_RXIMR59_IM31,		31
	.EQU	CANFD_RXIMR59_IM30,		30
	.EQU	CANFD_RXIMR59_IM29,		29
	.EQU	CANFD_RXIMR59_IM28,		28
	.EQU	CANFD_RXIMR59_IM27,		27
	.EQU	CANFD_RXIMR59_IM26,		26
	.EQU	CANFD_RXIMR59_IM25,		25
	.EQU	CANFD_RXIMR59_IM24,		24
	.EQU	CANFD_RXIMR59_IM23,		23
	.EQU	CANFD_RXIMR59_IM22,		22
	.EQU	CANFD_RXIMR59_IM21,		21
	.EQU	CANFD_RXIMR59_IM20,		20
	.EQU	CANFD_RXIMR59_IM19,		19
	.EQU	CANFD_RXIMR59_IM18,		18
	.EQU	CANFD_RXIMR59_IM17,		17
	.EQU	CANFD_RXIMR59_IM16,		16
	.EQU	CANFD_RXIMR59_IM15,		15
	.EQU	CANFD_RXIMR59_IM14,		14
	.EQU	CANFD_RXIMR59_IM13,		13
	.EQU	CANFD_RXIMR59_IM12,		12
	.EQU	CANFD_RXIMR59_IM11,		11
	.EQU	CANFD_RXIMR59_IM10,		10
	.EQU	CANFD_RXIMR59_IM9,		9
	.EQU	CANFD_RXIMR59_IM8,		8
	.EQU	CANFD_RXIMR59_IM7,		7
	.EQU	CANFD_RXIMR59_IM6,		6
	.EQU	CANFD_RXIMR59_IM5,		5
	.EQU	CANFD_RXIMR59_IM4,		4
	.EQU	CANFD_RXIMR59_IM3,		3
	.EQU	CANFD_RXIMR59_IM2,		2
	.EQU	CANFD_RXIMR59_IM1,		1
	.EQU	CANFD_RXIMR59_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR60,	0x40004970
//  0x4000 4970  CANFD_RXIMR60   Bits-------------------------------------
	.EQU	CANFD_RXIMR60_IM31,		31
	.EQU	CANFD_RXIMR60_IM30,		30
	.EQU	CANFD_RXIMR60_IM29,		29
	.EQU	CANFD_RXIMR60_IM28,		28
	.EQU	CANFD_RXIMR60_IM27,		27
	.EQU	CANFD_RXIMR60_IM26,		26
	.EQU	CANFD_RXIMR60_IM25,		25
	.EQU	CANFD_RXIMR60_IM24,		24
	.EQU	CANFD_RXIMR60_IM23,		23
	.EQU	CANFD_RXIMR60_IM22,		22
	.EQU	CANFD_RXIMR60_IM21,		21
	.EQU	CANFD_RXIMR60_IM20,		20
	.EQU	CANFD_RXIMR60_IM19,		19
	.EQU	CANFD_RXIMR60_IM18,		18
	.EQU	CANFD_RXIMR60_IM17,		17
	.EQU	CANFD_RXIMR60_IM16,		16
	.EQU	CANFD_RXIMR60_IM15,		15
	.EQU	CANFD_RXIMR60_IM14,		14
	.EQU	CANFD_RXIMR60_IM13,		13
	.EQU	CANFD_RXIMR60_IM12,		12
	.EQU	CANFD_RXIMR60_IM11,		11
	.EQU	CANFD_RXIMR60_IM10,		10
	.EQU	CANFD_RXIMR60_IM9,		9
	.EQU	CANFD_RXIMR60_IM8,		8
	.EQU	CANFD_RXIMR60_IM7,		7
	.EQU	CANFD_RXIMR60_IM6,		6
	.EQU	CANFD_RXIMR60_IM5,		5
	.EQU	CANFD_RXIMR60_IM4,		4
	.EQU	CANFD_RXIMR60_IM3,		3
	.EQU	CANFD_RXIMR60_IM2,		2
	.EQU	CANFD_RXIMR60_IM1,		1
	.EQU	CANFD_RXIMR60_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR61,	0x40004974
//  0x4000 4974  CANFD_RXIMR61   Bits-------------------------------------
	.EQU	CANFD_RXIMR61_IM31,		31
	.EQU	CANFD_RXIMR61_IM30,		30
	.EQU	CANFD_RXIMR61_IM29,		29
	.EQU	CANFD_RXIMR61_IM28,		28
	.EQU	CANFD_RXIMR61_IM27,		27
	.EQU	CANFD_RXIMR61_IM26,		26
	.EQU	CANFD_RXIMR61_IM25,		25
	.EQU	CANFD_RXIMR61_IM24,		24
	.EQU	CANFD_RXIMR61_IM23,		23
	.EQU	CANFD_RXIMR61_IM22,		22
	.EQU	CANFD_RXIMR61_IM21,		21
	.EQU	CANFD_RXIMR61_IM20,		20
	.EQU	CANFD_RXIMR61_IM19,		19
	.EQU	CANFD_RXIMR61_IM18,		18
	.EQU	CANFD_RXIMR61_IM17,		17
	.EQU	CANFD_RXIMR61_IM16,		16
	.EQU	CANFD_RXIMR61_IM15,		15
	.EQU	CANFD_RXIMR61_IM14,		14
	.EQU	CANFD_RXIMR61_IM13,		13
	.EQU	CANFD_RXIMR61_IM12,		12
	.EQU	CANFD_RXIMR61_IM11,		11
	.EQU	CANFD_RXIMR61_IM10,		10
	.EQU	CANFD_RXIMR61_IM9,		9
	.EQU	CANFD_RXIMR61_IM8,		8
	.EQU	CANFD_RXIMR61_IM7,		7
	.EQU	CANFD_RXIMR61_IM6,		6
	.EQU	CANFD_RXIMR61_IM5,		5
	.EQU	CANFD_RXIMR61_IM4,		4
	.EQU	CANFD_RXIMR61_IM3,		3
	.EQU	CANFD_RXIMR61_IM2,		2
	.EQU	CANFD_RXIMR61_IM1,		1
	.EQU	CANFD_RXIMR61_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR62,	0x40004978
//  0x4000 4978  CANFD_RXIMR62   Bits-------------------------------------
	.EQU	CANFD_RXIMR62_IM31,		31
	.EQU	CANFD_RXIMR62_IM30,		30
	.EQU	CANFD_RXIMR62_IM29,		29
	.EQU	CANFD_RXIMR62_IM28,		28
	.EQU	CANFD_RXIMR62_IM27,		27
	.EQU	CANFD_RXIMR62_IM26,		26
	.EQU	CANFD_RXIMR62_IM25,		25
	.EQU	CANFD_RXIMR62_IM24,		24
	.EQU	CANFD_RXIMR62_IM23,		23
	.EQU	CANFD_RXIMR62_IM22,		22
	.EQU	CANFD_RXIMR62_IM21,		21
	.EQU	CANFD_RXIMR62_IM20,		20
	.EQU	CANFD_RXIMR62_IM19,		19
	.EQU	CANFD_RXIMR62_IM18,		18
	.EQU	CANFD_RXIMR62_IM17,		17
	.EQU	CANFD_RXIMR62_IM16,		16
	.EQU	CANFD_RXIMR62_IM15,		15
	.EQU	CANFD_RXIMR62_IM14,		14
	.EQU	CANFD_RXIMR62_IM13,		13
	.EQU	CANFD_RXIMR62_IM12,		12
	.EQU	CANFD_RXIMR62_IM11,		11
	.EQU	CANFD_RXIMR62_IM10,		10
	.EQU	CANFD_RXIMR62_IM9,		9
	.EQU	CANFD_RXIMR62_IM8,		8
	.EQU	CANFD_RXIMR62_IM7,		7
	.EQU	CANFD_RXIMR62_IM6,		6
	.EQU	CANFD_RXIMR62_IM5,		5
	.EQU	CANFD_RXIMR62_IM4,		4
	.EQU	CANFD_RXIMR62_IM3,		3
	.EQU	CANFD_RXIMR62_IM2,		2
	.EQU	CANFD_RXIMR62_IM1,		1
	.EQU	CANFD_RXIMR62_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_RXIMR63,	0x4000497C
//  0x4000 497C  CANFD_RXIMR63   Bits-------------------------------------
	.EQU	CANFD_RXIMR63_IM31,		31
	.EQU	CANFD_RXIMR63_IM30,		30
	.EQU	CANFD_RXIMR63_IM29,		29
	.EQU	CANFD_RXIMR63_IM28,		28
	.EQU	CANFD_RXIMR63_IM27,		27
	.EQU	CANFD_RXIMR63_IM26,		26
	.EQU	CANFD_RXIMR63_IM25,		25
	.EQU	CANFD_RXIMR63_IM24,		24
	.EQU	CANFD_RXIMR63_IM23,		23
	.EQU	CANFD_RXIMR63_IM22,		22
	.EQU	CANFD_RXIMR63_IM21,		21
	.EQU	CANFD_RXIMR63_IM20,		20
	.EQU	CANFD_RXIMR63_IM19,		19
	.EQU	CANFD_RXIMR63_IM18,		18
	.EQU	CANFD_RXIMR63_IM17,		17
	.EQU	CANFD_RXIMR63_IM16,		16
	.EQU	CANFD_RXIMR63_IM15,		15
	.EQU	CANFD_RXIMR63_IM14,		14
	.EQU	CANFD_RXIMR63_IM13,		13
	.EQU	CANFD_RXIMR63_IM12,		12
	.EQU	CANFD_RXIMR63_IM11,		11
	.EQU	CANFD_RXIMR63_IM10,		10
	.EQU	CANFD_RXIMR63_IM9,		9
	.EQU	CANFD_RXIMR63_IM8,		8
	.EQU	CANFD_RXIMR63_IM7,		7
	.EQU	CANFD_RXIMR63_IM6,		6
	.EQU	CANFD_RXIMR63_IM5,		5
	.EQU	CANFD_RXIMR63_IM4,		4
	.EQU	CANFD_RXIMR63_IM3,		3
	.EQU	CANFD_RXIMR63_IM2,		2
	.EQU	CANFD_RXIMR63_IM1,		1
	.EQU	CANFD_RXIMR63_IM0,		0
//  register-------------------------------------
	.EQU	CANFD_MECR,	0x40004AE0
//  0x4000 4AE0  CANFD_MECR   Bits-------------------------------------
	.EQU	CANFD_MECR_ECRWRDIS,		31
	.EQU	CANFD_MECR_HANCEI_MSK,		19
	.EQU	CANFD_MECR_FANCEI_MSK,		18
	.EQU	CANFD_MECR_CEI_MSK,		16
	.EQU	CANFD_MECR_HAERRIE,		15
	.EQU	CANFD_MECR_FAERRIE,		14
	.EQU	CANFD_MECR_EXTERRIE,		13
	.EQU	CANFD_MECR_RERRDIS,		9
	.EQU	CANFD_MECR_ECCDIS,		8
	.EQU	CANFD_MECR_NCEFAFRZ,		7
//  register-------------------------------------
	.EQU	CANFD_RERRAR,	0x40004AF0
//  0x4000 4AF0  CANFD_RERRAR   Bits-------------------------------------
	.EQU	CANFD_RERRAR_NCE,		24
	.EQU	CANFD_RERRAR_SAID2,		18
	.EQU	CANFD_RERRAR_SAID1,		17
	.EQU	CANFD_RERRAR_SAID0,		16
	.EQU	CANFD_RERRAR_ERRADDR13,		13
	.EQU	CANFD_RERRAR_ERRADDR12,		12
	.EQU	CANFD_RERRAR_ERRADDR11,		11
	.EQU	CANFD_RERRAR_ERRADDR10,		10
	.EQU	CANFD_RERRAR_ERRADDR9,		9
	.EQU	CANFD_RERRAR_ERRADDR8,		8
	.EQU	CANFD_RERRAR_ERRADDR7,		7
	.EQU	CANFD_RERRAR_ERRADDR6,		6
	.EQU	CANFD_RERRAR_ERRADDR5,		5
	.EQU	CANFD_RERRAR_ERRADDR4,		4
	.EQU	CANFD_RERRAR_ERRADDR3,		3
	.EQU	CANFD_RERRAR_ERRADDR2,		2
	.EQU	CANFD_RERRAR_ERRADDR1,		1
	.EQU	CANFD_RERRAR_ERRADDR0,		0
//  register-------------------------------------
	.EQU	CANFD_RERRDR,	0x40004AF4
//  0x4000 4AF4  CANFD_RERRDR   Bits-------------------------------------
	.EQU	CANFD_RERRDR_RDATA31,		31
	.EQU	CANFD_RERRDR_RDATA30,		30
	.EQU	CANFD_RERRDR_RDATA29,		29
	.EQU	CANFD_RERRDR_RDATA28,		28
	.EQU	CANFD_RERRDR_RDATA27,		27
	.EQU	CANFD_RERRDR_RDATA26,		26
	.EQU	CANFD_RERRDR_RDATA25,		25
	.EQU	CANFD_RERRDR_RDATA24,		24
	.EQU	CANFD_RERRDR_RDATA23,		23
	.EQU	CANFD_RERRDR_RDATA22,		22
	.EQU	CANFD_RERRDR_RDATA21,		21
	.EQU	CANFD_RERRDR_RDATA20,		20
	.EQU	CANFD_RERRDR_RDATA19,		19
	.EQU	CANFD_RERRDR_RDATA18,		18
	.EQU	CANFD_RERRDR_RDATA17,		17
	.EQU	CANFD_RERRDR_RDATA16,		16
	.EQU	CANFD_RERRDR_RDATA15,		15
	.EQU	CANFD_RERRDR_RDATA14,		14
	.EQU	CANFD_RERRDR_RDATA13,		13
	.EQU	CANFD_RERRDR_RDATA12,		12
	.EQU	CANFD_RERRDR_RDATA11,		11
	.EQU	CANFD_RERRDR_RDATA10,		10
	.EQU	CANFD_RERRDR_RDATA9,		9
	.EQU	CANFD_RERRDR_RDATA8,		8
	.EQU	CANFD_RERRDR_RDATA7,		7
	.EQU	CANFD_RERRDR_RDATA6,		6
	.EQU	CANFD_RERRDR_RDATA5,		5
	.EQU	CANFD_RERRDR_RDATA4,		4
	.EQU	CANFD_RERRDR_RDATA3,		3
	.EQU	CANFD_RERRDR_RDATA2,		2
	.EQU	CANFD_RERRDR_RDATA1,		1
	.EQU	CANFD_RERRDR_RDATA0,		0
//  register-------------------------------------
	.EQU	CANFD_RERRSYNR,	0x40004AF8
//  0x4000 4AF8  CANFD_RERRSYNR   Bits-------------------------------------
	.EQU	CANFD_RERRSYNR_BE3,		31
	.EQU	CANFD_RERRSYNR_SYND3_4,		28
	.EQU	CANFD_RERRSYNR_SYND3_3,		27
	.EQU	CANFD_RERRSYNR_SYND3_2,		26
	.EQU	CANFD_RERRSYNR_SYND3_1,		25
	.EQU	CANFD_RERRSYNR_SYND3_0,		24
	.EQU	CANFD_RERRSYNR_BE2,		23
	.EQU	CANFD_RERRSYNR_SYND2_4,		20
	.EQU	CANFD_RERRSYNR_SYND2_3,		19
	.EQU	CANFD_RERRSYNR_SYND2_2,		18
	.EQU	CANFD_RERRSYNR_SYND2_1,		17
	.EQU	CANFD_RERRSYNR_SYND2_0,		16
	.EQU	CANFD_RERRSYNR_BE1,		15
	.EQU	CANFD_RERRSYNR_SYND1_4,		12
	.EQU	CANFD_RERRSYNR_SYND1_3,		11
	.EQU	CANFD_RERRSYNR_SYND1_2,		10
	.EQU	CANFD_RERRSYNR_SYND1_1,		9
	.EQU	CANFD_RERRSYNR_SYND1_0,		8
	.EQU	CANFD_RERRSYNR_BE0,		7
	.EQU	CANFD_RERRSYNR_SYND0_4,		4
	.EQU	CANFD_RERRSYNR_SYND0_3,		3
	.EQU	CANFD_RERRSYNR_SYND0_2,		2
	.EQU	CANFD_RERRSYNR_SYND0_1,		1
	.EQU	CANFD_RERRSYNR_SYND0_0,		0
//  register-------------------------------------
	.EQU	CANFD_ERRSR,	0x40004AFC
//  0x4000 4AFC  CANFD_ERRSR   Bits-------------------------------------
	.EQU	CANFD_ERRSR_HANCEIF,		19
	.EQU	CANFD_ERRSR_FANCEIF,		18
	.EQU	CANFD_ERRSR_CEIF,		16
	.EQU	CANFD_ERRSR_HANCEIOF,		3
	.EQU	CANFD_ERRSR_FANCEIOF,		2
	.EQU	CANFD_ERRSR_CEIOF,		0
//  register-------------------------------------
	.EQU	CANFD_EPRS,	0x40004BF0
//  0x4000 4BF0  CANFD_EPRS   Bits-------------------------------------
	.EQU	CANFD_EPRS_EDPRESDIV9,		25
	.EQU	CANFD_EPRS_EDPRESDIV8,		24
	.EQU	CANFD_EPRS_EDPRESDIV7,		23
	.EQU	CANFD_EPRS_EDPRESDIV6,		22
	.EQU	CANFD_EPRS_EDPRESDIV5,		21
	.EQU	CANFD_EPRS_EDPRESDIV4,		20
	.EQU	CANFD_EPRS_EDPRESDIV3,		19
	.EQU	CANFD_EPRS_EDPRESDIV2,		18
	.EQU	CANFD_EPRS_EDPRESDIV1,		17
	.EQU	CANFD_EPRS_EDPRESDIV0,		16
	.EQU	CANFD_EPRS_ENPRESDIV9,		9
	.EQU	CANFD_EPRS_ENPRESDIV8,		8
	.EQU	CANFD_EPRS_ENPRESDIV7,		7
	.EQU	CANFD_EPRS_ENPRESDIV6,		6
	.EQU	CANFD_EPRS_ENPRESDIV5,		5
	.EQU	CANFD_EPRS_ENPRESDIV4,		4
	.EQU	CANFD_EPRS_ENPRESDIV3,		3
	.EQU	CANFD_EPRS_ENPRESDIV2,		2
	.EQU	CANFD_EPRS_ENPRESDIV1,		1
	.EQU	CANFD_EPRS_ENPRESDIV0,		0
//  register-------------------------------------
	.EQU	CANFD_ETDC,	0x40004BFC
//  0x4000 4BFC  CANFD_ETDC   Bits-------------------------------------
	.EQU	CANFD_ETDC_ETDCEN,		31
	.EQU	CANFD_ETDC_TDMDIS,		30
	.EQU	CANFD_ETDC_ETDCOFF6,		22
	.EQU	CANFD_ETDC_ETDCOFF5,		21
	.EQU	CANFD_ETDC_ETDCOFF4,		20
	.EQU	CANFD_ETDC_ETDCOFF3,		19
	.EQU	CANFD_ETDC_ETDCOFF2,		18
	.EQU	CANFD_ETDC_ETDCOFF1,		17
	.EQU	CANFD_ETDC_ETDCOFF0,		16
	.EQU	CANFD_ETDC_ETDCFAIL,		15
	.EQU	CANFD_ETDC_ETDCVAL7,		7
	.EQU	CANFD_ETDC_ETDCVAL6,		6
	.EQU	CANFD_ETDC_ETDCVAL5,		5
	.EQU	CANFD_ETDC_ETDCVAL4,		4
	.EQU	CANFD_ETDC_ETDCVAL3,		3
	.EQU	CANFD_ETDC_ETDCVAL2,		2
	.EQU	CANFD_ETDC_ETDCVAL1,		1
	.EQU	CANFD_ETDC_ETDCVAL0,		0
//  register-------------------------------------
	.EQU	CANFD_FDCTL,	0x40004C00
//  0x4000 4C00  CANFD_FDCTL   Bits-------------------------------------
	.EQU	CANFD_FDCTL_FDRATE,		31
	.EQU	CANFD_FDCTL_MBDSR1_1,		20
	.EQU	CANFD_FDCTL_MBDSR1_0,		19
	.EQU	CANFD_FDCTL_MBDSR0_1,		17
	.EQU	CANFD_FDCTL_MBDSR0_0,		16
	.EQU	CANFD_FDCTL_TDCEN,		15
	.EQU	CANFD_FDCTL_TDCFAIL,		14
	.EQU	CANFD_FDCTL_TDCOFF4,		12
	.EQU	CANFD_FDCTL_TDCOFF3,		11
	.EQU	CANFD_FDCTL_TDCOFF2,		10
	.EQU	CANFD_FDCTL_TDCOFF1,		9
	.EQU	CANFD_FDCTL_TDCOFF0,		8
	.EQU	CANFD_FDCTL_TDCVAL5,		5
	.EQU	CANFD_FDCTL_TDCVAL4,		4
	.EQU	CANFD_FDCTL_TDCVAL3,		3
	.EQU	CANFD_FDCTL_TDCVAL2,		2
	.EQU	CANFD_FDCTL_TDCVAL1,		1
	.EQU	CANFD_FDCTL_TDCVAL0,		0
//  register-------------------------------------
	.EQU	CANFD_FDCBT,	0x40004C04
//  0x4000 4C04  CANFD_FDCBT   Bits-------------------------------------
	.EQU	CANFD_FDCBT_FPRESDIV9,		29
	.EQU	CANFD_FDCBT_FPRESDIV8,		28
	.EQU	CANFD_FDCBT_FPRESDIV7,		27
	.EQU	CANFD_FDCBT_FPRESDIV6,		26
	.EQU	CANFD_FDCBT_FPRESDIV5,		25
	.EQU	CANFD_FDCBT_FPRESDIV4,		24
	.EQU	CANFD_FDCBT_FPRESDIV3,		23
	.EQU	CANFD_FDCBT_FPRESDIV2,		22
	.EQU	CANFD_FDCBT_FPRESDIV1,		21
	.EQU	CANFD_FDCBT_FPRESDIV0,		20
	.EQU	CANFD_FDCBT_FRJW2,		18
	.EQU	CANFD_FDCBT_FRJW1,		17
	.EQU	CANFD_FDCBT_FRJW0,		16
	.EQU	CANFD_FDCBT_FPROPSEG6,		14
	.EQU	CANFD_FDCBT_FPROPSEG5,		13
	.EQU	CANFD_FDCBT_FPROPSEG4,		12
	.EQU	CANFD_FDCBT_FPROPSEG3,		11
	.EQU	CANFD_FDCBT_FPROPSEG2,		10
	.EQU	CANFD_FDCBT_FPROPSEG1,		9
	.EQU	CANFD_FDCBT_FPROPSEG0,		8
	.EQU	CANFD_FDCBT_FPSEG1_2,		7
	.EQU	CANFD_FDCBT_FPSEG1_1,		6
	.EQU	CANFD_FDCBT_FPSEG1_0,		5
	.EQU	CANFD_FDCBT_FPSEG2_2,		2
	.EQU	CANFD_FDCBT_FPSEG2_1,		1
	.EQU	CANFD_FDCBT_FPSEG2_0,		0
//  register-------------------------------------
	.EQU	CANFD_FDCRC,	0x40004C08
//  0x4000 4C08  CANFD_FDCRC   Bits-------------------------------------
	.EQU	CANFD_FDCRC_FD_MBCRC6,		30
	.EQU	CANFD_FDCRC_FD_MBCRC5,		29
	.EQU	CANFD_FDCRC_FD_MBCRC4,		28
	.EQU	CANFD_FDCRC_FD_MBCRC3,		27
	.EQU	CANFD_FDCRC_FD_MBCRC2,		26
	.EQU	CANFD_FDCRC_FD_MBCRC1,		25
	.EQU	CANFD_FDCRC_FD_MBCRC0,		24
	.EQU	CANFD_FDCRC_FD_TXCRC20,		20
	.EQU	CANFD_FDCRC_FD_TXCRC19,		19
	.EQU	CANFD_FDCRC_FD_TXCRC18,		18
	.EQU	CANFD_FDCRC_FD_TXCRC17,		17
	.EQU	CANFD_FDCRC_FD_TXCRC16,		16
	.EQU	CANFD_FDCRC_FD_TXCRC15,		15
	.EQU	CANFD_FDCRC_FD_TXCRC14,		14
	.EQU	CANFD_FDCRC_FD_TXCRC13,		13
	.EQU	CANFD_FDCRC_FD_TXCRC12,		12
	.EQU	CANFD_FDCRC_FD_TXCRC11,		11
	.EQU	CANFD_FDCRC_FD_TXCRC10,		10
	.EQU	CANFD_FDCRC_FD_TXCRC9,		9
	.EQU	CANFD_FDCRC_FD_TXCRC8,		8
	.EQU	CANFD_FDCRC_FD_TXCRC7,		7
	.EQU	CANFD_FDCRC_FD_TXCRC6,		6
	.EQU	CANFD_FDCRC_FD_TXCRC5,		5
	.EQU	CANFD_FDCRC_FD_TXCRC4,		4
	.EQU	CANFD_FDCRC_FD_TXCRC3,		3
	.EQU	CANFD_FDCRC_FD_TXCRC2,		2
	.EQU	CANFD_FDCRC_FD_TXCRC1,		1
	.EQU	CANFD_FDCRC_FD_TXCRC0,		0
//  register-------------------------------------
	.EQU	CANFD_ERFCR,	0x40004C0C
//  0x4000 4C0C  CANFD_ERFCR   Bits-------------------------------------
	.EQU	CANFD_ERFCR_ERFEN,		31
	.EQU	CANFD_ERFCR_NEXIF6,		22
	.EQU	CANFD_ERFCR_NEXIF5,		21
	.EQU	CANFD_ERFCR_NEXIF4,		20
	.EQU	CANFD_ERFCR_NEXIF3,		19
	.EQU	CANFD_ERFCR_NEXIF2,		18
	.EQU	CANFD_ERFCR_NEXIF1,		17
	.EQU	CANFD_ERFCR_NEXIF0,		16
	.EQU	CANFD_ERFCR_NFE5,		13
	.EQU	CANFD_ERFCR_NFE4,		12
	.EQU	CANFD_ERFCR_NFE3,		11
	.EQU	CANFD_ERFCR_NFE2,		10
	.EQU	CANFD_ERFCR_NFE1,		9
	.EQU	CANFD_ERFCR_NFE0,		8
	.EQU	CANFD_ERFCR_ERFWM4,		4
	.EQU	CANFD_ERFCR_ERFWM3,		3
	.EQU	CANFD_ERFCR_ERFWM2,		2
	.EQU	CANFD_ERFCR_ERFWM1,		1
	.EQU	CANFD_ERFCR_ERFWM0,		0
//  register-------------------------------------
	.EQU	CANFD_ERFIER,	0x40004C10
//  0x4000 4C10  CANFD_ERFIER   Bits-------------------------------------
	.EQU	CANFD_ERFIER_ERFUFWIE,		31
	.EQU	CANFD_ERFIER_ERFOVFIE,		30
	.EQU	CANFD_ERFIER_ERFWMIIE,		29
	.EQU	CANFD_ERFIER_ERFDAIE,		28
//  register-------------------------------------
	.EQU	CANFD_ERFSR,	0x40004C14
//  0x4000 4C14  CANFD_ERFSR   Bits-------------------------------------
	.EQU	CANFD_ERFSR_ERFUFW,		31
	.EQU	CANFD_ERFSR_ERFOVF,		30
	.EQU	CANFD_ERFSR_ERFWMI,		29
	.EQU	CANFD_ERFSR_ERFDA,		28
	.EQU	CANFD_ERFSR_ERFCLR,		27
	.EQU	CANFD_ERFSR_ERFE,		17
	.EQU	CANFD_ERFSR_ERFF,		16
	.EQU	CANFD_ERFSR_ERFEL5,		5
	.EQU	CANFD_ERFSR_ERFEL4,		4
	.EQU	CANFD_ERFSR_ERFEL3,		3
	.EQU	CANFD_ERFSR_ERFEL2,		2
	.EQU	CANFD_ERFSR_ERFEL1,		1
	.EQU	CANFD_ERFSR_ERFEL0,		0
//  register-------------------------------------
	.EQU	CANFD_ERFFEL0,	0x40007000
//  0x4000 7000  CANFD_ERFFEL0   Bits-------------------------------------
	.EQU	CANFD_ERFFEL0_FEL31,		31
	.EQU	CANFD_ERFFEL0_FEL30,		30
	.EQU	CANFD_ERFFEL0_FEL29,		29
	.EQU	CANFD_ERFFEL0_FEL28,		28
	.EQU	CANFD_ERFFEL0_FEL27,		27
	.EQU	CANFD_ERFFEL0_FEL26,		26
	.EQU	CANFD_ERFFEL0_FEL25,		25
	.EQU	CANFD_ERFFEL0_FEL24,		24
	.EQU	CANFD_ERFFEL0_FEL23,		23
	.EQU	CANFD_ERFFEL0_FEL22,		22
	.EQU	CANFD_ERFFEL0_FEL21,		21
	.EQU	CANFD_ERFFEL0_FEL20,		20
	.EQU	CANFD_ERFFEL0_FEL19,		19
	.EQU	CANFD_ERFFEL0_FEL18,		18
	.EQU	CANFD_ERFFEL0_FEL17,		17
	.EQU	CANFD_ERFFEL0_FEL16,		16
	.EQU	CANFD_ERFFEL0_FEL15,		15
	.EQU	CANFD_ERFFEL0_FEL14,		14
	.EQU	CANFD_ERFFEL0_FEL13,		13
	.EQU	CANFD_ERFFEL0_FEL12,		12
	.EQU	CANFD_ERFFEL0_FEL11,		11
	.EQU	CANFD_ERFFEL0_FEL10,		10
	.EQU	CANFD_ERFFEL0_FEL9,		9
	.EQU	CANFD_ERFFEL0_FEL8,		8
	.EQU	CANFD_ERFFEL0_FEL7,		7
	.EQU	CANFD_ERFFEL0_FEL6,		6
	.EQU	CANFD_ERFFEL0_FEL5,		5
	.EQU	CANFD_ERFFEL0_FEL4,		4
	.EQU	CANFD_ERFFEL0_FEL3,		3
	.EQU	CANFD_ERFFEL0_FEL2,		2
	.EQU	CANFD_ERFFEL0_FEL1,		1
	.EQU	CANFD_ERFFEL0_FEL0,		0
//  register-------------------------------------
	.EQU	CANFD_ERFFEL1,	0x40007004
//  0x4000 7004  CANFD_ERFFEL1   Bits-------------------------------------
	.EQU	CANFD_ERFFEL1_FEL31,		31
	.EQU	CANFD_ERFFEL1_FEL30,		30
	.EQU	CANFD_ERFFEL1_FEL29,		29
	.EQU	CANFD_ERFFEL1_FEL28,		28
	.EQU	CANFD_ERFFEL1_FEL27,		27
	.EQU	CANFD_ERFFEL1_FEL26,		26
	.EQU	CANFD_ERFFEL1_FEL25,		25
	.EQU	CANFD_ERFFEL1_FEL24,		24
	.EQU	CANFD_ERFFEL1_FEL23,		23
	.EQU	CANFD_ERFFEL1_FEL22,		22
	.EQU	CANFD_ERFFEL1_FEL21,		21
	.EQU	CANFD_ERFFEL1_FEL20,		20
	.EQU	CANFD_ERFFEL1_FEL19,		19
	.EQU	CANFD_ERFFEL1_FEL18,		18
	.EQU	CANFD_ERFFEL1_FEL17,		17
	.EQU	CANFD_ERFFEL1_FEL16,		16
	.EQU	CANFD_ERFFEL1_FEL15,		15
	.EQU	CANFD_ERFFEL1_FEL14,		14
	.EQU	CANFD_ERFFEL1_FEL13,		13
	.EQU	CANFD_ERFFEL1_FEL12,		12
	.EQU	CANFD_ERFFEL1_FEL11,		11
	.EQU	CANFD_ERFFEL1_FEL10,		10
	.EQU	CANFD_ERFFEL1_FEL9,		9
	.EQU	CANFD_ERFFEL1_FEL8,		8
	.EQU	CANFD_ERFFEL1_FEL7,		7
	.EQU	CANFD_ERFFEL1_FEL6,		6
	.EQU	CANFD_ERFFEL1_FEL5,		5
	.EQU	CANFD_ERFFEL1_FEL4,		4
	.EQU	CANFD_ERFFEL1_FEL3,		3
	.EQU	CANFD_ERFFEL1_FEL2,		2
	.EQU	CANFD_ERFFEL1_FEL1,		1
	.EQU	CANFD_ERFFEL1_FEL0,		0
//  register-------------------------------------
	.EQU	CANFD_ERFFEL2,	0x40007008
//  0x4000 7008  CANFD_ERFFEL2   Bits-------------------------------------
	.EQU	CANFD_ERFFEL2_FEL31,		31
	.EQU	CANFD_ERFFEL2_FEL30,		30
	.EQU	CANFD_ERFFEL2_FEL29,		29
	.EQU	CANFD_ERFFEL2_FEL28,		28
	.EQU	CANFD_ERFFEL2_FEL27,		27
	.EQU	CANFD_ERFFEL2_FEL26,		26
	.EQU	CANFD_ERFFEL2_FEL25,		25
	.EQU	CANFD_ERFFEL2_FEL24,		24
	.EQU	CANFD_ERFFEL2_FEL23,		23
	.EQU	CANFD_ERFFEL2_FEL22,		22
	.EQU	CANFD_ERFFEL2_FEL21,		21
	.EQU	CANFD_ERFFEL2_FEL20,		20
	.EQU	CANFD_ERFFEL2_FEL19,		19
	.EQU	CANFD_ERFFEL2_FEL18,		18
	.EQU	CANFD_ERFFEL2_FEL17,		17
	.EQU	CANFD_ERFFEL2_FEL16,		16
	.EQU	CANFD_ERFFEL2_FEL15,		15
	.EQU	CANFD_ERFFEL2_FEL14,		14
	.EQU	CANFD_ERFFEL2_FEL13,		13
	.EQU	CANFD_ERFFEL2_FEL12,		12
	.EQU	CANFD_ERFFEL2_FEL11,		11
	.EQU	CANFD_ERFFEL2_FEL10,		10
	.EQU	CANFD_ERFFEL2_FEL9,		9
	.EQU	CANFD_ERFFEL2_FEL8,		8
	.EQU	CANFD_ERFFEL2_FEL7,		7
	.EQU	CANFD_ERFFEL2_FEL6,		6
	.EQU	CANFD_ERFFEL2_FEL5,		5
	.EQU	CANFD_ERFFEL2_FEL4,		4
	.EQU	CANFD_ERFFEL2_FEL3,		3
	.EQU	CANFD_ERFFEL2_FEL2,		2
	.EQU	CANFD_ERFFEL2_FEL1,		1
	.EQU	CANFD_ERFFEL2_FEL0,		0
//  register-------------------------------------
	.EQU	CANFD_ERFFEL3,	0x4000700C
//  0x4000 700C  CANFD_ERFFEL3   Bits-------------------------------------
	.EQU	CANFD_ERFFEL3_FEL31,		31
	.EQU	CANFD_ERFFEL3_FEL30,		30
	.EQU	CANFD_ERFFEL3_FEL29,		29
	.EQU	CANFD_ERFFEL3_FEL28,		28
	.EQU	CANFD_ERFFEL3_FEL27,		27
	.EQU	CANFD_ERFFEL3_FEL26,		26
	.EQU	CANFD_ERFFEL3_FEL25,		25
	.EQU	CANFD_ERFFEL3_FEL24,		24
	.EQU	CANFD_ERFFEL3_FEL23,		23
	.EQU	CANFD_ERFFEL3_FEL22,		22
	.EQU	CANFD_ERFFEL3_FEL21,		21
	.EQU	CANFD_ERFFEL3_FEL20,		20
	.EQU	CANFD_ERFFEL3_FEL19,		19
	.EQU	CANFD_ERFFEL3_FEL18,		18
	.EQU	CANFD_ERFFEL3_FEL17,		17
	.EQU	CANFD_ERFFEL3_FEL16,		16
	.EQU	CANFD_ERFFEL3_FEL15,		15
	.EQU	CANFD_ERFFEL3_FEL14,		14
	.EQU	CANFD_ERFFEL3_FEL13,		13
	.EQU	CANFD_ERFFEL3_FEL12,		12
	.EQU	CANFD_ERFFEL3_FEL11,		11
	.EQU	CANFD_ERFFEL3_FEL10,		10
	.EQU	CANFD_ERFFEL3_FEL9,		9
	.EQU	CANFD_ERFFEL3_FEL8,		8
	.EQU	CANFD_ERFFEL3_FEL7,		7
	.EQU	CANFD_ERFFEL3_FEL6,		6
	.EQU	CANFD_ERFFEL3_FEL5,		5
	.EQU	CANFD_ERFFEL3_FEL4,		4
	.EQU	CANFD_ERFFEL3_FEL3,		3
	.EQU	CANFD_ERFFEL3_FEL2,		2
	.EQU	CANFD_ERFFEL3_FEL1,		1
	.EQU	CANFD_ERFFEL3_FEL0,		0
//  register-------------------------------------
	.EQU	CANFD_ERFFEL4,	0x40007010
//  0x4000 7010  CANFD_ERFFEL4   Bits-------------------------------------
	.EQU	CANFD_ERFFEL4_FEL31,		31
	.EQU	CANFD_ERFFEL4_FEL30,		30
	.EQU	CANFD_ERFFEL4_FEL29,		29
	.EQU	CANFD_ERFFEL4_FEL28,		28
	.EQU	CANFD_ERFFEL4_FEL27,		27
	.EQU	CANFD_ERFFEL4_FEL26,		26
	.EQU	CANFD_ERFFEL4_FEL25,		25
	.EQU	CANFD_ERFFEL4_FEL24,		24
	.EQU	CANFD_ERFFEL4_FEL23,		23
	.EQU	CANFD_ERFFEL4_FEL22,		22
	.EQU	CANFD_ERFFEL4_FEL21,		21
	.EQU	CANFD_ERFFEL4_FEL20,		20
	.EQU	CANFD_ERFFEL4_FEL19,		19
	.EQU	CANFD_ERFFEL4_FEL18,		18
	.EQU	CANFD_ERFFEL4_FEL17,		17
	.EQU	CANFD_ERFFEL4_FEL16,		16
	.EQU	CANFD_ERFFEL4_FEL15,		15
	.EQU	CANFD_ERFFEL4_FEL14,		14
	.EQU	CANFD_ERFFEL4_FEL13,		13
	.EQU	CANFD_ERFFEL4_FEL12,		12
	.EQU	CANFD_ERFFEL4_FEL11,		11
	.EQU	CANFD_ERFFEL4_FEL10,		10
	.EQU	CANFD_ERFFEL4_FEL9,		9
	.EQU	CANFD_ERFFEL4_FEL8,		8
	.EQU	CANFD_ERFFEL4_FEL7,		7
	.EQU	CANFD_ERFFEL4_FEL6,		6
	.EQU	CANFD_ERFFEL4_FEL5,		5
	.EQU	CANFD_ERFFEL4_FEL4,		4
	.EQU	CANFD_ERFFEL4_FEL3,		3
	.EQU	CANFD_ERFFEL4_FEL2,		2
	.EQU	CANFD_ERFFEL4_FEL1,		1
	.EQU	CANFD_ERFFEL4_FEL0,		0
//  register-------------------------------------
	.EQU	CANFD_ERFFEL5,	0x40007014
//  0x4000 7014  CANFD_ERFFEL5   Bits-------------------------------------
	.EQU	CANFD_ERFFEL5_FEL31,		31
	.EQU	CANFD_ERFFEL5_FEL30,		30
	.EQU	CANFD_ERFFEL5_FEL29,		29
	.EQU	CANFD_ERFFEL5_FEL28,		28
	.EQU	CANFD_ERFFEL5_FEL27,		27
	.EQU	CANFD_ERFFEL5_FEL26,		26
	.EQU	CANFD_ERFFEL5_FEL25,		25
	.EQU	CANFD_ERFFEL5_FEL24,		24
	.EQU	CANFD_ERFFEL5_FEL23,		23
	.EQU	CANFD_ERFFEL5_FEL22,		22
	.EQU	CANFD_ERFFEL5_FEL21,		21
	.EQU	CANFD_ERFFEL5_FEL20,		20
	.EQU	CANFD_ERFFEL5_FEL19,		19
	.EQU	CANFD_ERFFEL5_FEL18,		18
	.EQU	CANFD_ERFFEL5_FEL17,		17
	.EQU	CANFD_ERFFEL5_FEL16,		16
	.EQU	CANFD_ERFFEL5_FEL15,		15
	.EQU	CANFD_ERFFEL5_FEL14,		14
	.EQU	CANFD_ERFFEL5_FEL13,		13
	.EQU	CANFD_ERFFEL5_FEL12,		12
	.EQU	CANFD_ERFFEL5_FEL11,		11
	.EQU	CANFD_ERFFEL5_FEL10,		10
	.EQU	CANFD_ERFFEL5_FEL9,		9
	.EQU	CANFD_ERFFEL5_FEL8,		8
	.EQU	CANFD_ERFFEL5_FEL7,		7
	.EQU	CANFD_ERFFEL5_FEL6,		6
	.EQU	CANFD_ERFFEL5_FEL5,		5
	.EQU	CANFD_ERFFEL5_FEL4,		4
	.EQU	CANFD_ERFFEL5_FEL3,		3
	.EQU	CANFD_ERFFEL5_FEL2,		2
	.EQU	CANFD_ERFFEL5_FEL1,		1
	.EQU	CANFD_ERFFEL5_FEL0,		0
//  register-------------------------------------
	.EQU	CANFD_DIV,		0x40007028
//  0x4000 7028  CANFD_DIV   Bits-------------------------------------
	.EQU	CANFD_DIV_CLK_DIV2,		4
	.EQU	CANFD_DIV_CLK_DIV1,		3
	.EQU	CANFD_DIV_CLK_DIV0,		2
	.EQU	CANFD_DIV_CLK_SEL1,		1
	.EQU	CANFD_DIV_CLK_SEL0,		0
